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SC_MODULE (Micro) {
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sc_in_clk clk;
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sc_in <sc_int<8>> mem_data;
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sc_out <bool> read, write, call;
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sc_out <sc_uint<13>> addr;
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sc_out <sc_int<8>> data;
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// testing wires
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sc_out <sc_uint<5>> test_aluOp;
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sc_out <sc_uint<14>> test_pc;
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sc_out <sc_uint<20>> test_inst;
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sc_out <sc_int<8>> reg_dump[8];
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// sc_out <bool> test_regWrite, test_r_nw, test_aluMux, test_regMux, test_wbMux, test_call;
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/*
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** module global variables
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*/
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/*
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** SIGNALS
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*/
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// -----
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sc_uint<14> tmp_pc_prev_addr;
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sc_signal<sc_uint<14>> pc_prev_addr;
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sc_signal<sc_uint<14>> pc_next_addr;
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sc_signal <sc_uint<20>> ir_inst;
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sc_signal <sc_uint<20>> if_next_data;
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sc_signal <sc_uint<4>> opcode;
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sc_signal <sc_uint<3>> rd;
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sc_signal <sc_uint<3>> rs;
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sc_signal <sc_uint<3>> rt;
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sc_signal <sc_uint<3>> sa;
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sc_signal <sc_uint<4>> opselect;
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sc_uint<20> tmp;
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sc_signal <sc_int<13>> offset;
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// controller output signal
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sc_signal <sc_uint<5>> aluOp;
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sc_signal <bool> regWrite, r, w, aluMux, regMux, wbMux, acc_call;
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sc_signal <sc_uint<3>> mux_reg_res;
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/*
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** Register File signals
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*/
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sc_signal <sc_int<8>> Rr1;
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sc_signal <sc_int<8>> Rr2;
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sc_signal <sc_int<8>> regs[8];
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sc_signal <sc_int<8>> id_next_A;
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sc_signal <sc_int<8>> id_next_B;
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sc_signal <sc_int<13>> id_next_Imm;
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sc_signal <sc_uint<3>> id_next_Sa;
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sc_signal <sc_uint<5>> id_next_AluOp;
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sc_signal <bool> id_next_r;
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sc_signal <bool> id_next_w;
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sc_signal <bool> id_next_AluMux;
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sc_signal <bool> id_next_WbMux;
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sc_signal <bool> id_next_call;
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sc_signal <bool> id_next_regWrite;
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sc_signal <sc_uint<3>> id_next_rd;
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sc_signal <sc_int<8>> alu_in_B;
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sc_signal <sc_int<8>> id_nex_imm_8bits;
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sc_signal <sc_int<8>> alu_out;
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sc_signal<bool> carry;
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sc_signal <sc_int<8>> exe_next_result;
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sc_signal <sc_int<13>> exe_next_Imm;
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sc_signal <bool> exe_next_r;
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sc_signal <bool> exe_next_w;
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sc_signal <bool> exe_next_WbMux;
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sc_signal <bool> exe_next_call;
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sc_signal <bool> exe_next_regWrite;
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sc_signal <sc_uint<3>> exe_next_rd;
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sc_signal <sc_int<8>> wb_next_result;
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sc_signal <sc_int<8>> wb_prev_mem_data;
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sc_signal <sc_int<8>> wb_next_mem_data;
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sc_signal <bool> wb_next_WbMux;
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sc_signal <bool> wb_next_regWrite;
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sc_signal <sc_uint<3>> wb_next_rd;
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sc_signal<sc_uint<13>> mem_addr;
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sc_signal <sc_int<8>> regFileData;
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sc_int<13> tmp_id_next_Imm;
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sc_signal <sc_int<8>> sig_mem_data;
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// -----
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