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The dataset generation failed
Error code: DatasetGenerationError
Exception: ArrowInvalid
Message: JSON parse error: Invalid value. in row 0
Traceback: Traceback (most recent call last):
File "/src/services/worker/.venv/lib/python3.9/site-packages/datasets/packaged_modules/json/json.py", line 160, in _generate_tables
df = pandas_read_json(f)
File "/src/services/worker/.venv/lib/python3.9/site-packages/datasets/packaged_modules/json/json.py", line 38, in pandas_read_json
return pd.read_json(path_or_buf, **kwargs)
File "/src/services/worker/.venv/lib/python3.9/site-packages/pandas/io/json/_json.py", line 815, in read_json
return json_reader.read()
File "/src/services/worker/.venv/lib/python3.9/site-packages/pandas/io/json/_json.py", line 1025, in read
obj = self._get_object_parser(self.data)
File "/src/services/worker/.venv/lib/python3.9/site-packages/pandas/io/json/_json.py", line 1051, in _get_object_parser
obj = FrameParser(json, **kwargs).parse()
File "/src/services/worker/.venv/lib/python3.9/site-packages/pandas/io/json/_json.py", line 1187, in parse
self._parse()
File "/src/services/worker/.venv/lib/python3.9/site-packages/pandas/io/json/_json.py", line 1403, in _parse
ujson_loads(json, precise_float=self.precise_float), dtype=None
ValueError: Expected object or value
During handling of the above exception, another exception occurred:
Traceback (most recent call last):
File "/src/services/worker/.venv/lib/python3.9/site-packages/datasets/builder.py", line 1854, in _prepare_split_single
for _, table in generator:
File "/src/services/worker/.venv/lib/python3.9/site-packages/datasets/packaged_modules/json/json.py", line 163, in _generate_tables
raise e
File "/src/services/worker/.venv/lib/python3.9/site-packages/datasets/packaged_modules/json/json.py", line 137, in _generate_tables
pa_table = paj.read_json(
File "pyarrow/_json.pyx", line 308, in pyarrow._json.read_json
File "pyarrow/error.pxi", line 154, in pyarrow.lib.pyarrow_internal_check_status
File "pyarrow/error.pxi", line 91, in pyarrow.lib.check_status
pyarrow.lib.ArrowInvalid: JSON parse error: Invalid value. in row 0
The above exception was the direct cause of the following exception:
Traceback (most recent call last):
File "/src/services/worker/src/worker/job_runners/config/parquet_and_info.py", line 1420, in compute_config_parquet_and_info_response
parquet_operations = convert_to_parquet(builder)
File "/src/services/worker/src/worker/job_runners/config/parquet_and_info.py", line 1052, in convert_to_parquet
builder.download_and_prepare(
File "/src/services/worker/.venv/lib/python3.9/site-packages/datasets/builder.py", line 924, in download_and_prepare
self._download_and_prepare(
File "/src/services/worker/.venv/lib/python3.9/site-packages/datasets/builder.py", line 1000, in _download_and_prepare
self._prepare_split(split_generator, **prepare_split_kwargs)
File "/src/services/worker/.venv/lib/python3.9/site-packages/datasets/builder.py", line 1741, in _prepare_split
for job_id, done, content in self._prepare_split_single(
File "/src/services/worker/.venv/lib/python3.9/site-packages/datasets/builder.py", line 1897, in _prepare_split_single
raise DatasetGenerationError("An error occurred while generating the dataset") from e
datasets.exceptions.DatasetGenerationError: An error occurred while generating the datasetNeed help to make the dataset viewer work? Make sure to review how to configure the dataset viewer, and open a discussion for direct support.
instruction
string | input
string | output
string |
|---|---|---|
OPENQASM 3.0;
include "stdgates.inc";
gate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8 {
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
}
gate unitary _gate_q_0 {
U(0, -pi/8, -pi/8) _gate_q_0;
}
gate mcx_vchain_0 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_1 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_2 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_3 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_5 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_6 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_7 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_9 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_10 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_11 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_13 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_14 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_15 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_17 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_18 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_19 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_21 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_22 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_23 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_25 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_26 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_27 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_29 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_30 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_32 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_33 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate unitary_34 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_35 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_36 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_37 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_38 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_39 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_40 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_41 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_42 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_43 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate unitary_44 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_45 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate mcphase(_gate_p_0) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_0 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_1 _gate_q_9;
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_2 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_3 _gate_q_9;
mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_5 _gate_q_8;
mcx_vchain_6 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_7 _gate_q_8;
mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_9 _gate_q_8;
mcx_vchain_10 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_11 _gate_q_8;
mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_13 _gate_q_7;
mcx_vchain_14 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_15 _gate_q_7;
mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_17 _gate_q_7;
mcx_vchain_18 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_19 _gate_q_7;
mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_21 _gate_q_6;
mcx_vchain_22 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_23 _gate_q_6;
mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_25 _gate_q_6;
mcx_vchain_26 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_27 _gate_q_6;
mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_29 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_30 _gate_q_5;
mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_32 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_33 _gate_q_5;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_34 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_35 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_36 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_37 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_38 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_39 _gate_q_3;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_40 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_41 _gate_q_3;
cx _gate_q_0, _gate_q_2;
unitary_42 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_43 _gate_q_2;
cx _gate_q_0, _gate_q_2;
unitary_44 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_45 _gate_q_2;
crz(pi/256) _gate_q_0, _gate_q_1;
p(pi/512) _gate_q_0;
}
gate mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcphase(pi) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate Oracle _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
}
gate Diffuser _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
}
bit[10] c;
qubit[10] q;
h q[0];
h q[1];
h q[2];
h q[3];
h q[4];
h q[5];
h q[6];
h q[7];
h q[8];
h q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
c[0] = measure q[0];
c[1] = measure q[1];
c[2] = measure q[2];
c[3] = measure q[3];
c[4] = measure q[4];
c[5] = measure q[5];
c[6] = measure q[6];
c[7] = measure q[7];
c[8] = measure q[8];
c[9] = measure q[9];
|
0000000000
|
|
OPENQASM 3.0;
include "stdgates.inc";
gate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8 {
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
}
gate unitary _gate_q_0 {
U(0, -pi/8, -pi/8) _gate_q_0;
}
gate mcx_vchain_0 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_1 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_2 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_3 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_5 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_6 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_7 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_9 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_10 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_11 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_13 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_14 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_15 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_17 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_18 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_19 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_21 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_22 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_23 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_25 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_26 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_27 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_29 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_30 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_32 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_33 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate unitary_34 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_35 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_36 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_37 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_38 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_39 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_40 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_41 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_42 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_43 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate unitary_44 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_45 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate mcphase(_gate_p_0) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_0 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_1 _gate_q_9;
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_2 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_3 _gate_q_9;
mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_5 _gate_q_8;
mcx_vchain_6 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_7 _gate_q_8;
mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_9 _gate_q_8;
mcx_vchain_10 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_11 _gate_q_8;
mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_13 _gate_q_7;
mcx_vchain_14 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_15 _gate_q_7;
mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_17 _gate_q_7;
mcx_vchain_18 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_19 _gate_q_7;
mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_21 _gate_q_6;
mcx_vchain_22 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_23 _gate_q_6;
mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_25 _gate_q_6;
mcx_vchain_26 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_27 _gate_q_6;
mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_29 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_30 _gate_q_5;
mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_32 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_33 _gate_q_5;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_34 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_35 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_36 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_37 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_38 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_39 _gate_q_3;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_40 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_41 _gate_q_3;
cx _gate_q_0, _gate_q_2;
unitary_42 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_43 _gate_q_2;
cx _gate_q_0, _gate_q_2;
unitary_44 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_45 _gate_q_2;
crz(pi/256) _gate_q_0, _gate_q_1;
p(pi/512) _gate_q_0;
}
gate mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcphase(pi) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate Oracle _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
}
gate Diffuser _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
}
bit[10] c;
qubit[10] q;
h q[0];
h q[1];
h q[2];
h q[3];
h q[4];
h q[5];
h q[6];
h q[7];
h q[8];
h q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
c[0] = measure q[0];
c[1] = measure q[1];
c[2] = measure q[2];
c[3] = measure q[3];
c[4] = measure q[4];
c[5] = measure q[5];
c[6] = measure q[6];
c[7] = measure q[7];
c[8] = measure q[8];
c[9] = measure q[9];
|
0000000001
|
|
OPENQASM 3.0;
include "stdgates.inc";
gate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8 {
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
}
gate unitary _gate_q_0 {
U(0, -pi/8, -pi/8) _gate_q_0;
}
gate mcx_vchain_0 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_1 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_2 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_3 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_5 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_6 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_7 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_9 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_10 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_11 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_13 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_14 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_15 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_17 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_18 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_19 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_21 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_22 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_23 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_25 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_26 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_27 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_29 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_30 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_32 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_33 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate unitary_34 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_35 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_36 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_37 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_38 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_39 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_40 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_41 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_42 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_43 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate unitary_44 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_45 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate mcphase(_gate_p_0) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_0 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_1 _gate_q_9;
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_2 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_3 _gate_q_9;
mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_5 _gate_q_8;
mcx_vchain_6 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_7 _gate_q_8;
mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_9 _gate_q_8;
mcx_vchain_10 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_11 _gate_q_8;
mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_13 _gate_q_7;
mcx_vchain_14 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_15 _gate_q_7;
mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_17 _gate_q_7;
mcx_vchain_18 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_19 _gate_q_7;
mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_21 _gate_q_6;
mcx_vchain_22 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_23 _gate_q_6;
mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_25 _gate_q_6;
mcx_vchain_26 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_27 _gate_q_6;
mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_29 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_30 _gate_q_5;
mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_32 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_33 _gate_q_5;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_34 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_35 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_36 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_37 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_38 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_39 _gate_q_3;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_40 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_41 _gate_q_3;
cx _gate_q_0, _gate_q_2;
unitary_42 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_43 _gate_q_2;
cx _gate_q_0, _gate_q_2;
unitary_44 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_45 _gate_q_2;
crz(pi/256) _gate_q_0, _gate_q_1;
p(pi/512) _gate_q_0;
}
gate mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcphase(pi) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate Oracle _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
x _gate_q_0;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
x _gate_q_0;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
}
gate Diffuser _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
}
bit[10] c;
qubit[10] q;
h q[0];
h q[1];
h q[2];
h q[3];
h q[4];
h q[5];
h q[6];
h q[7];
h q[8];
h q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
c[0] = measure q[0];
c[1] = measure q[1];
c[2] = measure q[2];
c[3] = measure q[3];
c[4] = measure q[4];
c[5] = measure q[5];
c[6] = measure q[6];
c[7] = measure q[7];
c[8] = measure q[8];
c[9] = measure q[9];
|
0000000010
|
|
OPENQASM 3.0;
include "stdgates.inc";
gate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8 {
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
}
gate unitary _gate_q_0 {
U(0, -pi/8, -pi/8) _gate_q_0;
}
gate mcx_vchain_0 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_1 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_2 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_3 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_5 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_6 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_7 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_9 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_10 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_11 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_13 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_14 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_15 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_17 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_18 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_19 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_21 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_22 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_23 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_25 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_26 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_27 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_29 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_30 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_32 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_33 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate unitary_34 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_35 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_36 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_37 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_38 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_39 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_40 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_41 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_42 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_43 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate unitary_44 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_45 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate mcphase(_gate_p_0) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_0 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_1 _gate_q_9;
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_2 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_3 _gate_q_9;
mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_5 _gate_q_8;
mcx_vchain_6 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_7 _gate_q_8;
mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_9 _gate_q_8;
mcx_vchain_10 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_11 _gate_q_8;
mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_13 _gate_q_7;
mcx_vchain_14 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_15 _gate_q_7;
mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_17 _gate_q_7;
mcx_vchain_18 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_19 _gate_q_7;
mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_21 _gate_q_6;
mcx_vchain_22 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_23 _gate_q_6;
mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_25 _gate_q_6;
mcx_vchain_26 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_27 _gate_q_6;
mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_29 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_30 _gate_q_5;
mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_32 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_33 _gate_q_5;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_34 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_35 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_36 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_37 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_38 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_39 _gate_q_3;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_40 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_41 _gate_q_3;
cx _gate_q_0, _gate_q_2;
unitary_42 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_43 _gate_q_2;
cx _gate_q_0, _gate_q_2;
unitary_44 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_45 _gate_q_2;
crz(pi/256) _gate_q_0, _gate_q_1;
p(pi/512) _gate_q_0;
}
gate mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcphase(pi) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate Oracle _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
}
gate Diffuser _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
}
bit[10] c;
qubit[10] q;
h q[0];
h q[1];
h q[2];
h q[3];
h q[4];
h q[5];
h q[6];
h q[7];
h q[8];
h q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
c[0] = measure q[0];
c[1] = measure q[1];
c[2] = measure q[2];
c[3] = measure q[3];
c[4] = measure q[4];
c[5] = measure q[5];
c[6] = measure q[6];
c[7] = measure q[7];
c[8] = measure q[8];
c[9] = measure q[9];
|
0000000011
|
|
OPENQASM 3.0;
include "stdgates.inc";
gate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8 {
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
}
gate unitary _gate_q_0 {
U(0, -pi/8, -pi/8) _gate_q_0;
}
gate mcx_vchain_0 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_1 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_2 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_3 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_5 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_6 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_7 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_9 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_10 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_11 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_13 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_14 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_15 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_17 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_18 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_19 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_21 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_22 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_23 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_25 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_26 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_27 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_29 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_30 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_32 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_33 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate unitary_34 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_35 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_36 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_37 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_38 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_39 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_40 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_41 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_42 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_43 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate unitary_44 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_45 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate mcphase(_gate_p_0) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_0 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_1 _gate_q_9;
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_2 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_3 _gate_q_9;
mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_5 _gate_q_8;
mcx_vchain_6 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_7 _gate_q_8;
mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_9 _gate_q_8;
mcx_vchain_10 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_11 _gate_q_8;
mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_13 _gate_q_7;
mcx_vchain_14 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_15 _gate_q_7;
mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_17 _gate_q_7;
mcx_vchain_18 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_19 _gate_q_7;
mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_21 _gate_q_6;
mcx_vchain_22 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_23 _gate_q_6;
mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_25 _gate_q_6;
mcx_vchain_26 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_27 _gate_q_6;
mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_29 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_30 _gate_q_5;
mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_32 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_33 _gate_q_5;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_34 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_35 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_36 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_37 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_38 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_39 _gate_q_3;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_40 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_41 _gate_q_3;
cx _gate_q_0, _gate_q_2;
unitary_42 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_43 _gate_q_2;
cx _gate_q_0, _gate_q_2;
unitary_44 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_45 _gate_q_2;
crz(pi/256) _gate_q_0, _gate_q_1;
p(pi/512) _gate_q_0;
}
gate mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcphase(pi) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate Oracle _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
x _gate_q_0;
x _gate_q_1;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
}
gate Diffuser _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
}
bit[10] c;
qubit[10] q;
h q[0];
h q[1];
h q[2];
h q[3];
h q[4];
h q[5];
h q[6];
h q[7];
h q[8];
h q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
c[0] = measure q[0];
c[1] = measure q[1];
c[2] = measure q[2];
c[3] = measure q[3];
c[4] = measure q[4];
c[5] = measure q[5];
c[6] = measure q[6];
c[7] = measure q[7];
c[8] = measure q[8];
c[9] = measure q[9];
|
0000000100
|
|
OPENQASM 3.0;
include "stdgates.inc";
gate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8 {
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
}
gate unitary _gate_q_0 {
U(0, -pi/8, -pi/8) _gate_q_0;
}
gate mcx_vchain_0 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_1 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_2 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_3 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_5 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_6 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_7 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_9 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_10 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_11 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_13 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_14 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_15 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_17 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_18 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_19 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_21 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_22 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_23 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_25 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_26 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_27 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_29 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_30 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_32 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_33 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate unitary_34 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_35 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_36 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_37 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_38 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_39 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_40 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_41 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_42 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_43 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate unitary_44 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_45 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate mcphase(_gate_p_0) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_0 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_1 _gate_q_9;
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_2 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_3 _gate_q_9;
mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_5 _gate_q_8;
mcx_vchain_6 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_7 _gate_q_8;
mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_9 _gate_q_8;
mcx_vchain_10 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_11 _gate_q_8;
mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_13 _gate_q_7;
mcx_vchain_14 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_15 _gate_q_7;
mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_17 _gate_q_7;
mcx_vchain_18 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_19 _gate_q_7;
mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_21 _gate_q_6;
mcx_vchain_22 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_23 _gate_q_6;
mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_25 _gate_q_6;
mcx_vchain_26 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_27 _gate_q_6;
mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_29 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_30 _gate_q_5;
mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_32 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_33 _gate_q_5;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_34 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_35 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_36 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_37 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_38 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_39 _gate_q_3;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_40 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_41 _gate_q_3;
cx _gate_q_0, _gate_q_2;
unitary_42 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_43 _gate_q_2;
cx _gate_q_0, _gate_q_2;
unitary_44 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_45 _gate_q_2;
crz(pi/256) _gate_q_0, _gate_q_1;
p(pi/512) _gate_q_0;
}
gate mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcphase(pi) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate Oracle _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
x _gate_q_1;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
x _gate_q_1;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
}
gate Diffuser _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
}
bit[10] c;
qubit[10] q;
h q[0];
h q[1];
h q[2];
h q[3];
h q[4];
h q[5];
h q[6];
h q[7];
h q[8];
h q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
c[0] = measure q[0];
c[1] = measure q[1];
c[2] = measure q[2];
c[3] = measure q[3];
c[4] = measure q[4];
c[5] = measure q[5];
c[6] = measure q[6];
c[7] = measure q[7];
c[8] = measure q[8];
c[9] = measure q[9];
|
0000000101
|
|
OPENQASM 3.0;
include "stdgates.inc";
gate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8 {
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
ccx _gate_q_4, _gate_q_8, _gate_q_5;
h _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
cx _gate_q_7, _gate_q_8;
h _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
cx _gate_q_6, _gate_q_7;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_1, _gate_q_6;
t _gate_q_6;
cx _gate_q_0, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
cx _gate_q_6, _gate_q_7;
t _gate_q_7;
cx _gate_q_2, _gate_q_7;
tdg _gate_q_7;
h _gate_q_7;
cx _gate_q_7, _gate_q_8;
t _gate_q_8;
cx _gate_q_3, _gate_q_8;
tdg _gate_q_8;
h _gate_q_8;
}
gate unitary _gate_q_0 {
U(0, -pi/8, -pi/8) _gate_q_0;
}
gate mcx_vchain_0 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_1 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_2 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_3 _gate_q_0 {
U(0, -7*pi/8, 9*pi/8) _gate_q_0;
}
gate mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_5 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_6 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_7 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_9 _gate_q_0 {
U(0, -pi/16, -pi/16) _gate_q_0;
}
gate mcx_vchain_10 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_11 _gate_q_0 {
U(0, -15*pi/16, 3.3379421944391554) _gate_q_0;
}
gate mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_13 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_14 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_15 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6 {
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
ccx _gate_q_3, _gate_q_6, _gate_q_4;
h _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
cx _gate_q_5, _gate_q_6;
h _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
cx _gate_q_1, _gate_q_5;
t _gate_q_5;
cx _gate_q_0, _gate_q_5;
tdg _gate_q_5;
h _gate_q_5;
cx _gate_q_5, _gate_q_6;
t _gate_q_6;
cx _gate_q_2, _gate_q_6;
tdg _gate_q_6;
h _gate_q_6;
}
gate unitary_17 _gate_q_0 {
U(0, -pi/32, -pi/32) _gate_q_0;
}
gate mcx_vchain_18 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_19 _gate_q_0 {
U(0, -3.043417883165112, 3.2397674240144743) _gate_q_0;
}
gate mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_21 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_22 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_23 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_25 _gate_q_0 {
U(0, -pi/64, -pi/64) _gate_q_0;
}
gate mcx_vchain_26 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_27 _gate_q_0 {
U(0, -3.0925052683774528, 3.1906800388021335) _gate_q_0;
}
gate mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_29 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_30 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4 {
h _gate_q_3;
p(pi/8) _gate_q_0;
p(pi/8) _gate_q_1;
p(pi/8) _gate_q_2;
p(pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_1;
p(-pi/8) _gate_q_1;
cx _gate_q_0, _gate_q_1;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
p(pi/8) _gate_q_2;
cx _gate_q_1, _gate_q_2;
p(-pi/8) _gate_q_2;
cx _gate_q_0, _gate_q_2;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_1, _gate_q_3;
p(pi/8) _gate_q_3;
cx _gate_q_2, _gate_q_3;
p(-pi/8) _gate_q_3;
cx _gate_q_0, _gate_q_3;
h _gate_q_3;
}
gate unitary_32 _gate_q_0 {
U(0, -pi/128, -pi/128) _gate_q_0;
}
gate unitary_33 _gate_q_0 {
U(0, -3.117048960983623, 3.1661363461959633) _gate_q_0;
}
gate unitary_34 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_35 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_36 _gate_q_0 {
U(0, -pi/256, -pi/256) _gate_q_0;
}
gate unitary_37 _gate_q_0 {
U(0, -3.129320807286708, 3.153864499892878) _gate_q_0;
}
gate unitary_38 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_39 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_40 _gate_q_0 {
U(0, -pi/512, -pi/512) _gate_q_0;
}
gate unitary_41 _gate_q_0 {
U(0, -3.1354567304382504, 3.147728576741336) _gate_q_0;
}
gate unitary_42 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_43 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate unitary_44 _gate_q_0 {
U(0, -pi/1024, -pi/1024) _gate_q_0;
}
gate unitary_45 _gate_q_0 {
U(0, -3.138524692014022, 3.1446606151655643) _gate_q_0;
}
gate mcphase(_gate_p_0) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_0 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_1 _gate_q_9;
mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_9, _gate_q_5, _gate_q_6, _gate_q_7;
unitary _gate_q_9;
mcx_vchain_2 _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9, _gate_q_3, _gate_q_4;
unitary_3 _gate_q_9;
mcx_vchain_4 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_5 _gate_q_8;
mcx_vchain_6 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_7 _gate_q_8;
mcx_vchain_8 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_8, _gate_q_4, _gate_q_5;
unitary_9 _gate_q_8;
mcx_vchain_10 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_2, _gate_q_3;
unitary_11 _gate_q_8;
mcx_vchain_12 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_13 _gate_q_7;
mcx_vchain_14 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_15 _gate_q_7;
mcx_vchain_16 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_7, _gate_q_4, _gate_q_5;
unitary_17 _gate_q_7;
mcx_vchain_18 _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_3;
unitary_19 _gate_q_7;
mcx_vchain_20 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_21 _gate_q_6;
mcx_vchain_22 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_23 _gate_q_6;
mcx_vchain_24 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_6, _gate_q_3;
unitary_25 _gate_q_6;
mcx_vchain_26 _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_2;
unitary_27 _gate_q_6;
mcx_vchain_28 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_29 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_30 _gate_q_5;
mcx_vchain_31 _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_5, _gate_q_3;
unitary_32 _gate_q_5;
ccx _gate_q_3, _gate_q_4, _gate_q_5;
unitary_33 _gate_q_5;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_34 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_35 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_4;
unitary_36 _gate_q_4;
ccx _gate_q_2, _gate_q_3, _gate_q_4;
unitary_37 _gate_q_4;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_38 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_39 _gate_q_3;
ccx _gate_q_0, _gate_q_1, _gate_q_3;
unitary_40 _gate_q_3;
cx _gate_q_2, _gate_q_3;
unitary_41 _gate_q_3;
cx _gate_q_0, _gate_q_2;
unitary_42 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_43 _gate_q_2;
cx _gate_q_0, _gate_q_2;
unitary_44 _gate_q_2;
cx _gate_q_1, _gate_q_2;
unitary_45 _gate_q_2;
crz(pi/256) _gate_q_0, _gate_q_1;
p(pi/512) _gate_q_0;
}
gate mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcphase(pi) _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
}
gate Oracle _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
x _gate_q_0;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
mcmt _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
x _gate_q_0;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
}
gate Diffuser _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9 {
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_9;
mcx _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_3, _gate_q_4, _gate_q_5, _gate_q_6, _gate_q_7, _gate_q_8, _gate_q_9;
h _gate_q_9;
x _gate_q_0;
x _gate_q_1;
x _gate_q_2;
x _gate_q_3;
x _gate_q_4;
x _gate_q_5;
x _gate_q_6;
x _gate_q_7;
x _gate_q_8;
x _gate_q_9;
h _gate_q_0;
h _gate_q_1;
h _gate_q_2;
h _gate_q_3;
h _gate_q_4;
h _gate_q_5;
h _gate_q_6;
h _gate_q_7;
h _gate_q_8;
h _gate_q_9;
}
bit[10] c;
qubit[10] q;
h q[0];
h q[1];
h q[2];
h q[3];
h q[4];
h q[5];
h q[6];
h q[7];
h q[8];
h q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Oracle q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
Diffuser q[0], q[1], q[2], q[3], q[4], q[5], q[6], q[7], q[8], q[9];
c[0] = measure q[0];
c[1] = measure q[1];
c[2] = measure q[2];
c[3] = measure q[3];
c[4] = measure q[4];
c[5] = measure q[5];
c[6] = measure q[6];
c[7] = measure q[7];
c[8] = measure q[8];
c[9] = measure q[9];
|
0000000110
|
|
"OPENQASM 3.0;\ninclude \"stdgates.inc\";\ngate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_(...TRUNCATED)
|
0000000111
|
|
"OPENQASM 3.0;\ninclude \"stdgates.inc\";\ngate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_(...TRUNCATED)
|
0000001000
|
|
"OPENQASM 3.0;\ninclude \"stdgates.inc\";\ngate mcx_vchain _gate_q_0, _gate_q_1, _gate_q_2, _gate_q_(...TRUNCATED)
|
0000001001
|
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