@@ -0,0 +1,2400 @@
+package net.katsuster.ememu.riscv;%0A%0Aimport net.katsuster.ememu.generic.*;%0A%0A/**%0A * Inter-Integrated Circuit (I2C)%0A *%0A * %E5%8F%82%E8%80%83: OpenCores I2C controller core%0A *       I2C-Master Core Specifications Rev.0.9%0A */%0Apublic class I2C implements ParentCore %7B%0A    private I2CSlave slave;%0A%0A    public static final int REG_PRERLO  = 0x0000;%0A    public static final int REG_PRERHI  = 0x0004;%0A    public static final int REG_CTR     = 0x0008;%0A    public static final int REG_TXRRXR  = 0x000c;%0A    public static final int REG_CRSR    = 0x0010;%0A%0A    public I2C() %7B%0A        slave = new I2CSlave();%0A    %7D%0A%0A    @Override%0A    public SlaveCore64 getSlaveCore() %7B%0A        return slave;%0A    %7D%0A%0A    class I2CSlave extends Controller32 %7B%0A        public I2CSlave() %7B%0A            addReg(REG_PRERLO,  %22PRERLO%22, 0x00000000);%0A            addReg(REG_PRERHI,  %22PRERHI%22, 0x00000000);%0A            addReg(REG_CTR,  %22CTR%22, 0x00000000);%0A            addReg(REG_TXRRXR,  %22TXRRXR%22, 0x00000000);%0A            addReg(REG_CRSR,  %22CRSR%22, 0x00000000);%0A        %7D%0A%0A        @Override%0A        public int readWord(BusMaster64 m, long addr) %7B%0A            int regaddr;%0A            int result;%0A%0A            regaddr = (int) (addr & BitOp.getAddressMask(LEN_WORD_BITS));%0A%0A            switch (regaddr) %7B%0A            case REG_TXRRXR:%0A                result = 0;%0A                System.out.printf(%22I2C TXRX: read 0x%25x%5Cn%22, result);%0A                break;%0A            default:%0A                result = super.readWord(m, regaddr);%0A                break;%0A            %7D%0A%0A            return result;%0A        %7D%0A%0A        @Override%0A        public void writeWord(BusMaster64 m, long addr, int data) %7B%0A            int regaddr;%0A%0A            regaddr = (int) (addr & BitOp.getAddressMask(LEN_WORD_BITS));%0A%0A            switch (regaddr) %7B%0A            case REG_PRERLO:%0A                System.out.printf(%22I2C PRERLO: write 0x%25x%5Cn%22, data);%0A                super.writeWord(m, regaddr, data);%0A                break;%0A            case REG_PRERHI:%0A                System.out.printf(%22I2C PRERHI: write 0x%25x%5Cn%22, data);%0A                super.writeWord(m, regaddr, data);%0A                break;%0A            case REG_TXRRXR:%0A                System.out.printf(%22I2C TXRX: write 0x%25x%5Cn%22, data);%0A                super.writeWord(m, regaddr, data);%0A                break;%0A            default:%0A                super.writeWord(m, regaddr, data);%0A                break;%0A            %7D%0A        %7D%0A    %7D%0A%7D%0A

add dummy I2C core