question: What are the clean-cut pros and cons of HBM vs GDDR Memory in graphics cards?
comment: HBR has higher bandwidth, meaning it is faster to access. It's also more power efficient per for the same performance. However it's more expensive, for the time being.
passages: HBM is a type of memory required for the operation of any PCIe graphics card, and is placed directly beside the GPU itself on the graphics card. This is different to standard GDDR as standard GDDR memory sits on the PCB of the graphics card. The main advantages of having the memory mounted so close to the GPU itself are as follows; reduced latency due to signals travelling a shorter distance, more bandwidth due to more space for data lanes, and decreased power consumption due to inherent differences to GDDR on the microscopic level. The latest revision of HBM is HBM2.
   HBM achieves higher bandwidth while using less power in a substantially smaller form factor than DDR4 or GDDR5. This is achieved by stacking up to eight DRAM dies (thus being a Three-dimensional integrated circuit), including an optional base die with a memory controller, which are interconnected by through-silicon vias (TSVs) and microbumps. The HBM technology is similar in principle but incompatible with the Hybrid Memory Cube interface developed by Micron Technology. 
   The larger number of connections to the memory, relative to DDR4 or GDDR5, required a new method of connecting the HBM memory to the GPU (or other processor). AMD and Nvidia have both used purpose-built silicon chips, called "interposers", to connect the memory and GPU. This interposer has the added advantage of requiring the memory and processor to be physically close, decreasing memory paths. However, as semiconductor device fabrication is significantly more expensive than printed circuit board manufacture, this adds cost to the final product.
  
  Section::::Technology.:Interface.
   The development of HBM was completed in 2013, when SK Hynix built the first HBM memory chip. HBM was adopted as industry standard JESD235 by JEDEC in October 2013, following a proposal by AMD and SK Hynix in 2010. High volume manufacturing began at a Hynix facility in Icheon, South Korea, in 2015.
  
  The first GPU utilizing HBM is AMD Fiji which was released in June 2015 powering the AMD Radeon R9 Fury X.
   GDDR was initially known as DDR SGRAM. It was commercially introduced as a 16Mb memory chip by Samsung Electronics in 1998.
  
  Section::::High Bandwidth Memory (HBM).
  
  High Bandwidth Memory (HBM) is a high-performance RAM interface for 3D-stacked SDRAM from Samsung, AMD and SK Hynix. It is designed to be used in conjunction with high-performance graphics accelerators and network devices. The first HBM memory chip was produced by SK Hynix in 2013.
  
  Section::::Timeline.
  
  Section::::Timeline.:SDRAM.
  
  section begin="SDRAM timeline"/
  
  Section::::Timeline.:SGRAM and HBM.
  
   section end="SDRAM timeline"/
  
  Section::::See also.
  
  BULLET::::- GDDR (graphics DDR) and its subtypes GDDR2, GDDR3, GDDR4, and GDDR5
   High Bandwidth Memory
  
  High Bandwidth Memory (HBM) is a high-performance RAM interface for 3D-stacked SDRAM from Samsung, AMD and SK Hynix. It is to be used in conjunction with high-performance graphics accelerators and network devices. The first HBM memory chip was produced by SK Hynix in 2013, and the first devices to use HBM were the AMD Fiji GPUs in 2015.
  
  High Bandwidth Memory has been adopted by JEDEC as an industry standard in October 2013. The second generation, HBM2, was accepted by JEDEC in January 2016.
  
  Section::::Technology.
   These methods became especially popular during the seventh generation of video game consoles that included PlayStation 3 (PS3) and Xbox 360. Historically, Game consoles often have relatively weak central processing units (CPUs) compared to the top-of-line desktop computer counterparts. This is a design choice to devote more power and transistor budget to the graphics processing units (GPUs). For example, the 7th generation CPUs were not manufactured with modern out of order execution processors, but instead use in-order processors with high clock speeds and deep pipelines. In addition, most types of computing systems have main memory located hundreds of clock cycles away from the processing elements. Therefore, as CPUs have become faster and main memory capacity much larger, there is massive data consumption that occurs that only increases the potential occurrence of Von Neumann bottlenecking, where there are cache misses in the shared bus. As a consequence of this, locality of reference methods have been used to control performance, requiring improvement of memory access patterns to fix bottlenecking. Some of the software issues were also similar to those encountered on the Itanium, requiring loop unrolling for upfront scheduling.
   BULLET::::- Memory Clock: 400 MHz (BFG Technologies 6200 OC 410 MHz, PNY and EVGA 533 MHz)
  
  BULLET::::- Pixel Pipelines: 4
  
  BULLET::::- Memory: 256 (BFG Technologies 6200 OC PCI and EVGA e-Ge-Force 6200 PCI) / 128 (BFG Technologies 3DFuzion GeForce 6200 PCI) MB DDR on a 64-bit interface
  
  Section::::GeForce 6100 and 6150 series.
   Gaming PCs use hardware accelerated video cards which offer high-end rasterisation-based rendering/image quality. The graphics card is the most important part determining the capabilities of a gaming PC. Memory capacity on 3D cards is usually at least 256 MB to 12 GB. The amount of video RAM is more important while gaming in higher resolution or using high resolution textures and extensive modding. Having at least 2GB to 4GB of VRAM or more is suggested for today's standards when gaming. The type of memory used, however, is an important factor. Current VRAM standards are at GDDR5, GDDR5X, GDDR6, and HBM2. Modern graphics cards use the PCI Express expansion slot. Two or more graphics cards can be used simultaneously on motherboards supporting SLI or ATI CrossFire technology, for nVidia and AMD based cards respectively. Both technologies allow for between two and four graphics cards, although nVidia now only recommends two, of the same model, to be used in unison to process and render an image.
   BULLET::::- Both MVPG and ADMF are used by DB2 to access hiperpools. Hiperpools are portions of a buffer pool located in a hiperspace.
  
  BULLET::::- VM Minidisk Caching
  
  Until the mid-1990s Central and Expanded Storage were physically different areas of memory on the processor. Since the mid-1990s Central and Expanded Storage were merely assignment choices for the underlying processor memory.
  
  These choices were made based on specific expected uses:
  
  For example, Expanded Storage is required for the Hiperbatch function (which uses the MVPG instruction to access its hiperspaces).
   BULLET::::- Package: 1088-ball flip chip BGA
  
  BULLET::::- Memory: DDR2 from 400- to 800 MHz; MCH supports DIMM or memory down with optional 32-/64-bit and ECC configurations
  
  BULLET::::- Bus: One local expansion bus for general control or expanded peripheral connections
  
  BULLET::::- PCI Express: PCIe root complex interface in 1 ×8, 2 ×4, or 2 ×1 configurations
  
  BULLET::::- Storage: 2× SATA (Gen1 or Gen2) interfaces
  
  BULLET::::- Networking: 3× 10/100/1000 Ethernet MACs supporting RGMII or RMII, and Management Data Input/Output (MDIO)
  
  BULLET::::- USB: 2× Universal Serial Bus (1.1 or 2.0) interfaces
  
  BULLET::::- GPIO: 36× General Purpose Input/Output ports
   Various manufacturers of graphics cards continued to produce AGP cards for the shrinking AGP user-base. The first bridged cards were the GeForce 6600 and ATI Radeon X800 XL boards, released during 2004-5. In 2009 AGP cards from Nvidia had a ceiling of the GeForce 7 Series. In 2011 DirectX 10-capable AGP cards from AMD vendors (Club 3D, HIS, Sapphire, Jaton, Visiontek, Diamond, etc.) included the Radeon HD 2400, 3450, 3650, 3850, 4350, 4650, and 4670. The HD 5000 AGP series mentioned in the AMD Catalyst software was never available. There were many problems with the AMD Catalyst 11.2 - 11.6 AGP hotfix drivers under Windows 7 with the HD 4000 series AGP video cards; use of 10.12 or 11.1 AGP hotfix drivers is the recommended workaround. Several of the vendors listed above make available past versions of the AGP drivers.
   The disadvantage of this design is lower performance because system RAM usually runs slower than dedicated graphics RAM, and there is more contention as the memory bus has to be shared with the rest of the system. It may also cause performance issues with the rest of the system if it is not designed with the fact in mind that some RAM will be 'taken away' by graphics. 
   SMP (multi-processor/multi-core) are not yet supported.
  
  64bit drivers are available for selected Platforms.
  
  Section::::Currently supported mice.
  
  BULLET::::- Logitech Cordless Mouse for Notebooks
  
  BULLET::::- Logitech Cordless Click
  
  BULLET::::- Logitech MX 1000 Laser Mouse
  
  BULLET::::- Logitech Media Play Cordless
  
  BULLET::::- Logitech V500 Cordless Mouse
  
  BULLET::::- Logitech G3/MX518 Optical Mouse
  
  BULLET::::- Logitech Cordless Click Plus
  
  BULLET::::- Logitech V200 Cordless Mouse
  
  BULLET::::- Logitech Cordless Mini Optical Mouse
  
  BULLET::::- Logitech LX7 Cordless Optical Mouse
  
  BULLET::::- Logitech LX5 Cordless Optical Mouse
  
  BULLET::::- Logitech G5 Laser Mouse
  
  BULLET::::- Logitech G7 Laser Mouse
  
  BULLET::::- Logitech MX610 Laser Cordless Mouse
  
  BULLET::::- Logitech MX610 Left Handed Laser Cordless Mouse
   Section::::Third-party chips.:VRC7.
  
  BULLET::::- Manufacturer: Konami, Yamaha
  
  BULLET::::- Games used in: "Lagrange Point", ""
  
  The VRC7 is a very advanced MMC chip from Konami, not only supporting bank switching and IRQ counting equivalent to the VRC6 but also containing a YM2413 derivative providing 6 channels of FM Synthesis audio. This advanced audio is used only in the Famicom game "Lagrange Point"; while the Japanese version of "Tiny Toon Adventures 2" also used the VRC7, it does not make use of the extended audio.
  
  Section::::Third-party chips.:Namco 163.
  
  BULLET::::- Manufacturer: Namco
   At Hot Chips in August 2016, both Samsung and Hynix announced the next generation HBM memory technologies. Both companies announced high performance products expected to have increased density, increased bandwidth, and lower power. Samsung also announced a lower-cost version of HBM under development targeting mass markets. Removing the buffer die and decreasing the number of TSVs lowers cost, though at the expense of a decreased overall bandwidth (200 GB/s).
  
  Section::::See also.
  
  BULLET::::- Stacked DRAM
  
  BULLET::::- eDRAM
  
  BULLET::::- Chip stack multi-chip module
  
  BULLET::::- Hybrid Memory Cube: stacked memory standard from Micron Technology (2011)
  
  Section::::External links.
   Elpida Memory developed the first 8GB DRAM chip (stacked with four DDR3 SDRAM dies) in September 2009, and released it in June 2011. TSMC announced plans for 3D IC production with TSV technology in January 2010. In 2011, SK Hynix introduced 16GB DDR3 SDRAM (40nm class) using TSV technology, Samsung Electronics introduced 3D-stacked 32GB DDR3 (30nm class) based on TSV in September, and then Samsung and Micron Technology announced TSV-based Hybrid Memory Cube (HMC) technology in October. High Bandwidth Memory (HBM), developed by Samsung, AMD, and SK Hynix, uses stacked chips and TSVs. The first HBM memory chip was manufactured by SK Hynix in 2013.
   JEDEC's Wide I/O and Wide I/O 2 are seen as the mobile computing counterparts to the desktop/server-oriented HMC in that both involve 3D die stacks.
  
  In August 2018, Micron announced a move away from HMC to pursue competing high-performance memory technologies such as GDDR6 and HBM.
  
  Section::::See also.
  
  BULLET::::- MCDRAM
  
  BULLET::::- Memristor
  
  BULLET::::- Stacked DRAM
  
  BULLET::::- Chip stack multi-chip modules
  
  BULLET::::- High Bandwidth Memory (HBM), developed by AMD and Hynix, used in AMD's Fiji, and Nvidia's Pascal
  
  Section::::External links.
  
  BULLET::::- HMC 1.0 Specification
  
  BULLET::::- HMC 2.0 Specification download form
   BULLET::::- Processing Units: 'GT' cards use enthusiast/performance-level graphics cores, but a portion of them are disabled; the Radeon X800GT has only 8 of the potential 16 pipelines available, while the Radeon X1900GT has 12 of the potential 16 processing units available.
  
  BULLET::::- Memory Interface: 'GT' cards are all based on graphics cores using a 256-bit memory interface.
   "Graphics double data rate SDRAM (GDDR SDRAM)" is a type of specialized DDR SDRAM designed to be used as the main memory of graphics processing units (GPUs). GDDR SDRAM is distinct from commodity types of DDR SDRAM such as DDR3, although they share some core technologies. Their primary characteristics are higher clock frequencies for both the DRAM core and I/O interface, which provides greater memory bandwidth for GPUs. As of 2018, there are six, successive generations of GDDR: GDDR2, GDDR3, GDDR4, GDDR5, and GDDR5X, GDDR6
  
  Section::::Versions.:Pseudostatic RAM (PSRAM).
   BULLET::::- Processing Units: Cards with this suffix will have a large number of processing units available, all that the graphics core has. To date, this amounts to a total of 16 "pipelines."
  
  BULLET::::- Memory Interface: To date, all cards with this suffix have a 256-bit memory interface.
   The size of the cumulative total of virtual address spaces is still limited by the amount of secondary storage available.
  
  Section::::See also.
  
  BULLET::::- Bélády's anomaly
  
  BULLET::::- Demand paging, a "lazy" paging scheme
  
  BULLET::::- Expanded memory
  
  BULLET::::- Memory management
  
  BULLET::::- Memory segmentation
  
  BULLET::::- Page (computer memory)
  
  BULLET::::- Page cache, a disk cache that utilizes virtual memory mechanism
  
  BULLET::::- Page replacement algorithm
  
  BULLET::::- Page table
  
  BULLET::::- Physical memory, a subject of paging
  
  BULLET::::- Virtual memory, an abstraction that paging may create
  
  Section::::External links.
  
  BULLET::::- Swap Facts and quetions by Ubuntu Documentation
   BULLET::::- Fiji (Pirate Islands family), comes with UVD 6.0 and High Bandwidth Memory (HBM 1)
  
  integrated into APUs:
  
  BULLET::::- Carrizo, comes with UVD 6.0
  
  BULLET::::- Bristol Ridge
  
  BULLET::::- Stoney Ridge
  
  Section::::Iterations.:GCN 4th generation.
  
  GPUs of the Arctic Islands-family were introduced in Q2 of 2016 with the AMD Radeon 400 series. The 3D-engine (i.e. GCA (Graphics and Compute array) or GFX) is identical to that found in the Tonga-chips. But Polaris feature a newer Display Controller engine, UVD version 6.3, etc.
   HBM memory bus is very wide in comparison to other DRAM memories such as DDR4 or GDDR5. An HBM stack of four DRAM dies (4Hi) has two 128bit channels per die for a total of 8 channels and a width of 1024 bits in total. A graphics card/GPU with four 4Hi HBM stacks would therefore have a memory bus with a width of 4096 bits. In comparison, the bus width of GDDR memories is 32 bits, with 16 channels for a graphics card with a 512bit memory interface. HBM supports up to 4 GB per package.
   BULLET::::- 128 MB max memory
  
  BULLET::::- S3 Vision864 video controller with 1 MB (expandable to 2 MB)
  
  BULLET::::- ISA/VESA local bus architecture
  
  BULLET::::- 450DX2/Sp (small desktop) or 450DX2/Dp (Desktop)
  
  BULLET::::- Intel 486DX2 at 50 MHz
  
  BULLET::::- 128 MB max memory
  
  BULLET::::- S3 Vision864 video controller with 1 MB (expandable to 2 MB)
  
  BULLET::::- ISA/VESA Local bus architecture
  
  BULLET::::- 466DX2/Sp (small desktop), 466DX2/Dp (desktop) or 466DX2/Tp (tower)
  
  BULLET::::- Intel 486DX2 at 66 MHz
  
  BULLET::::- 128 MB max memory
  
  BULLET::::- S3 Vision864 video controller with 1MB (expandable to 2MB)
  
  BULLET::::- ISA/VESA Local bus or ISA/PCI architecture
  
  BULLET::::- 100DX4/Sp (small desktop) or 100DX4/Tp (Tower)
  
  BULLET::::- Intel 486DX4 at 100 MHz
  