code:
<!DOCTYPE html>

	<meta charset="utf-8">
	<meta name="viewport" content="width=device-width, initial-scale=1">

	<title>Libreboot project documentation</title>

Libreboot project documentation

				Information about this release can be found at release.html.
				Always check libreboot.org for updates.

				What is libreboot?

				How do I know what version I'm running?

Table of contents

Hardware compatibility list - GNU/Linux is expected to be running on your device.

How to install libreboot

How to install GNU/Linux on a libreboot system

					How to use the git repository and build libreboot from source

Maintaining libreboot

Hardware security

Hardware maintenance

GRUB payload

Miscellaneous

About the libreboot project

				Libreboot originally began during December 2013, as a commercial effort
				by Gluglug to achieve
				RYF endorsement for a modified ThinkPad X60
				(the first system to ever be added to libreboot).

				Back then, the name libreboot didn't exist; the project was nameless,
				referring to itself as a deblobbed version of coreboot. The project named
				itself libreboot at some point during early 2014, and has since rapidly expanded
				to support more hardware and become more user-friendly.

				Libreboot is a coreboot distribution (distro) with proprietary software removed,
				intended to be a free
				(libre) 'BIOS' replacement for your computer. The project is aimed at users, attempting to make
				coreboot as easy to use as possible.
				Read the full Free Software definition.

				Libreboot has many practical advantages over proprietary boot firmware,
				such as faster boot speeds and better security. You can
				install GNU/Linux with encrypted /boot/,
				verify GPG signatures on your kernel,
				run a full operating system directly
				from the flash chip (planned for a future release), and more.

				The libreboot project has three main goals:

						Recommend and distribute only free software.
						Coreboot distributes certain pieces of proprietary software which is needed on some systems.
						Examples can include things like CPU microcode updates, memory initialization blobs and so on.
						The coreboot project sometimes recommends adding more blobs which it does not distribute, such
						as the Video BIOS or Intel's Management Engine. However, a lot of dedicated and talented
						individuals in coreboot work hard to replace these blobs whenever possible.

						Support as much hardware as possible!
						Libreboot supports less hardware than coreboot, because most systems from coreboot still require
						certain proprietary software to work properly. Libreboot is an attempt to support as much
						hardware as possible, without any proprietary software.

						Make coreboot easy to use.
						Coreboot is notoriously difficult to install, due to an overall lack of user-focussed
						documentation and support. Most people will simply give up before attempting to install coreboot.

						Libreboot attempts to bridge this divide, making sure that everything from building
						to installing coreboot is automated, as much as is feasibly possible. Secondly, the project
						produces documentation aimed at non-technical users. Thirdly, the project attempts
						to provide excellent user support via mailing lists and IRC.

						Libreboot already comes with a payload (GRUB), flashrom and other needed parts. Everything
						is fully integrated, in a way where most of the complicated steps that are otherwise required,
						are instead done for the user in advance.

						You can download ROM images for your libreboot system and install them, without having
						to build anything from source. The build system is also fully automated, so building
						from source is easy if you wanted to do that (for whatever reason).

				Libreboot is a coreboot distribution, not a coreboot fork

					Libreboot is not a fork of coreboot. Every so often, the project re-bases on the latest
					version of coreboot, with the number of custom patches in use minimized.

					All new coreboot development should be done in coreboot (upstream), not libreboot!
					Libreboot is about deblobbing and packaging coreboot in a user-friendly way, where most work
					is already done for the user.

					For example, if you wanted to add a new board to libreboot, you should add it to coreboot first.
					Libreboot will automatically receive your code at a later date, when it updates itself.

					The deblobbed coreboot tree used in libreboot is referred to as coreboot-libre,
					to distinguish it as a component of libreboot.

				Libreboot is a 'stable' version of coreboot

						Coreboot uses the rolling release model,
						which means that it is not guaranteed to be stable, or to even work at all on a given day.
						Coreboot does have a strict code review process, but being such a large project with so many contributors, regressions
						are always possible.

						Libreboot freezes on a particular revision of coreboot, making sure that everything works properly,
						making fixes on top of that and repeating this during each subsequent update to a later version
						of coreboot. By doing this, it provides a stronger guarantee to the user that the firmware
						will be reliable, and not break their system.

Back to top of page.

How do I know what version I'm running?

				If you are at least 127 commits after release 20150518
				(commit message build/roms/helper: add version information to CBFS)
				(or you have any upstream stable release of libreboot after 20150518), then you can
				press C at the GRUB console, and use this command to find out what version of libreboot you have:

				cat (cbfsdisk)/lbversion

				This will also work on non-release images (the version string is automatically generated,
				using git describe --tags HEAD), built from the git repository.
				A file named version will also be included in the archives that you downloaded (if you are
				using release archives).

				If it exists, you can also extract this lbversion file by using the cbfstool utility
				which libreboot includes, from a ROM image that you either dumped or haven't flashed yet.
				In GNU/Linux, run cbfstool on your ROM image (libreboot.rom, in this example):

				$ ./cbfstool libreboot.rom extract -n lbversion -f lbversion

				You will now have a file, named lbversion, which you can read in whatever program
				it is that you use for reading/writing text files.

				For git, it's easy. Just check the git log.

				For releases on or below 20150518, or snapshots generated from the git repository below 127 commits
				after 20150518, you can find a file named commitid inside the archives. If you are using
				pre-built ROM images from the libreboot project, you can press C in GRUB for access to the terminal,
				and then run this command:

				lscoreboot

				You may find a date in here, detailing when that ROM image was built. For pre-built images distributed
				by the libreboot project, this is a rough approximation of what version you have, because the version
				numbers are dated, and the release archives are typically built on the same day as the release; you can
				correlate that with the release information in release.html.

				You can also check the documentation that came with your archives, and in docs/release.html will be
				the information about the version of libreboot that you are using.

				Generally speaking, it is advisable to use the latest version of libreboot.

			Copyright ©  2014, 2015 Francis Rowe <info@gluglug.org.uk>

			Permission is granted to copy, distribute and/or modify this document
			under the terms of the GNU Free Documentation License, Version 1.3
			or any later version published by the Free Software Foundation;
			with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
			A copy of the license can be found at gfdl-1.3.txt

			Updated versions of the license (when available) can be found at
			https://www.gnu.org/licenses/licenses.html

			UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
			EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
			AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF
			ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS,
			IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION,
			WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR
			PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS,
			ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT
			KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT
			ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU.

			TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
			TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION,
			NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT,
			INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES,
			COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR
			USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN
			ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR
			DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR
			IN PART, THIS LIMITATION MAY NOT APPLY TO YOU.

			The disclaimer of warranties and limitation of liability provided
			above shall be interpreted in a manner that, to the extent
			possible, most closely approximates an absolute disclaimer and
			waiver of all liability.


code:
<!DOCTYPE html>

	<meta charset="utf-8">
	<meta name="viewport" content="width=device-width, initial-scale=1">

	<title>EHCI debugging on the BeagleBone Black</title>

EHCI debugging on the BeagleBone Black

Back to previous index

EHCI debugging

Find
					USB port on the target that supports EHCI debug

Initial
					setup of BBB to act as EHCI debug dongle

Patch
					BBB's <tt>g_dbgp</tt> module (optional, but highly recommended)

Configure
					libreboot with EHCI debug

Selecting
							<tt>HCD Index</tt> and <tt>USB Debug port</tt>

How to get the debug
					logs

Eneble
					EHCI Debug on the target's kernel (optional, recommended)

References

If your computer does not boot after installing libreboot, it is
			very useful to get debug logs from it, from the payload (grub) and/or
			the kernel (if gets to there). All of them stream debug logs on the
			available serial (RS-232) by default. However, most of todays laptops
			lack RS-232 port. The other option is to stream the logs to USB EHCI
			debug port.

This section explains step-by-step how to setup BBB as a
			“USB EHCI debug dongle” and configure libreboot and the
			linux kernel to stream logs to it (TODO: grub).

I will refer to three computers:

host - this is the computer you use, have
				tools, compiler, Internet, etc

BBB - Beaglebone Black (rev. B or higher, i
				use rev. C)

target - the computer you are trying to
				install liberboot

Find USB port
			on the target that supports EHCI debug

			Not all USB controllers support EHCI debug (see: EHCI
				Debug Port ). Even more, if a USB controller supports EHCI debug, it
			is available only on a single port that might or might
			not be exposed externally.

You need running OS (GNU/Linux) on your target for this step
				(If you’ve flashed libreboot and it does not boot, you have to
				flush back the stock bios)

You need USB memory stick (the data on it will not be
				touched).

The EHCI debugging can not be done through external hub, BBB
				must be connected directly to the debug port of the controller (so, no
				hubs)

Download1 this
				shell script.

Plug the usb stick in the first available usb port

Run the script, you will get output similar to following:

The following PCI devices support a USB debug port (says lspci): 0000:00:1a.0 0000:00:1d.0
The following PCI devices support a USB debug port (says the kernel): 0000:00:1a.0 0000:00:1d.0
*PCI device 0000:00:1a.0, USB bus 3, USB physical port 1*
*PCI device 0000:00:1d.0, USB bus 4, USB physical port 2*
Currently connected high-speed devices:
/:  Bus 04.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/2p, 480M
	|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/8p, 480M
		|__ Port 7: Dev 14, If 0, Class=Hub, Driver=hub/4p, 480M
			|__ Port 1: Dev 15, If 0, Class=Hub, Driver=hub/4p, 480M
			|__ Port 3: Dev 17, If 0, Class=Hub, Driver=hub/2p, 480M
			|__ Port 4: Dev 18, If 0, Class=Hub, Driver=hub/4p, 480M
/:  Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/2p, 480M
	|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/6p, 480M
/:  *Bus 01*.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/4p, 480M
	|__ *Port 3: Dev 31, If 0, Class=Mass Storage, Driver=usb-storage, 480M*

The buses the support debug are Bus 3 (0000:00:1a.0) on Port 1
				and Bus 4 (0000:00:1d.0) on port 2. Your usb stick is plugged on Bus
				1, Port 3

Repeat the steps, plugging the USB stick in the next available
				port

Go through all available ports and remember(write down) those
				for which bus/port of the usb stick matches one of the bus/port that
				support debug (bold).

Remember (write down) for each port (external plug) you found
			that supports debug: PCI device id, the bus id, the port number, and
			the physical location of the usb plug.

If you do not find a match, you can not get debug over EHCI.
			Sorry.

			1 The guys from coreboot were talking about including the
			script in coreboot distribution (check the status).

Initial setup of
			BBB to act as EHCI debug dongle

BBB must be powered with a barrel power connector since the
			mini-B USB plug will be used for the EHCI debug stream. So you will
			need:

power supply (5V, 2A(10W) is sufficient).

an extra usb cable: A to mini-B

			(On BBB) The linux kernel includes module (g_dbgp that enables one of the usb ports on a computer to behave as EHCI
			debug dongle. Make sure you have this module available on your BBB
			(Debian 7.8 that comes with BBB should have it), if not, you should
			compile it yourself (see next section):

ls /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget/g_dbgp.ko

		Unload all other
		g_*
		modules:

# lsmod
# rmmod g_multi
...

			Then load
			g_dbgp
			:

# modprobe g_dbgp
# lsmod # should show that g_dbgp is loaded, and no other g_*

			Plug the mini-B side of the USB cable in your BBB and the A side in
			your target. Then one of the usb devices on your target (with
			lsusb
			) should be:

Bus 001 Device 024: ID 0525:c0de Netchip Technology, Inc.

If you see the device on the target, you are good to continue to
			the next step.

			Patch BBB’s
			g_dbgp
			module (optional, but highly recommended)

			For the reasons why you need this, see: EHCI Gadget Debug.
Make
			sure that you have cross compiling environment for
			arm-linux-gnueabihf
			setup on your host.

On BBB: uname -r - this will give you version
				number like 3.8.13-bone70 (I will refer to this as: $mav.$miv-$lv:
				where mav=3.8, miv=13, lv=bone70

Get the BBB kernel ready on your host for cross-compiling:

$ cd $work_dir
$ git clone https://github.com/beagleboard/kernel.git
$ cd kernel
$ git checkout $mav (see above)
$ ./patch.sh
$ wget http://arago-project.org/git/projects/?p=am33x-cm3.git\;a=blob_plain\;f=bin/am335x-pm-firmware.bin\;hb=HEAD -O kernel/firmware/am335x-pm-firmware.bin
$ cp configs/beaglebone kernel/arch/arm/configs/beaglebone_defconfig

Download the patch from here

tar -xf Ehci-debug-gadget-patches.tar.gz (will
				create dir: usbdebug-gadget)

Note that there are two patches (patch_1 and patch_2) for each
				of the two different version of the kernel (3.8 and 3.10). I will use
				3.8. (If using kernel 3.12 patch_1 is not needed)

cd kernel (note that this is one more level: you
				should be in $work_dir/kernel/kernel)

Apply the patches:

git apply ../usbdebug-gadget/v3.8-debug-gadget/0001-usb-dbgp-gadget-Fix-re-connecting-after-USB-disconne.patch
git apply ../usbdebug-gadget/v3.8-debug-gadget/0002-usb-serial-gadget-no-TTY-hangup-on-USB-disconnect-WI.patch
;
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- beaglebone_defconfig -j4@

				You should also apply the linux-libre deblob script to turn it into linux-libre
				(deletes all the blobs from the linux kernel).
				fsfla website
				- see scripts.

Get your current BBB kernel config (from: /boot/config-<ver>)
				and copy it to your host as $work_dir/kernel/kernel/.config

make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- oldconfig - all default answers

Set proper version number:

On your host, edit $work_dir/kernel/kernel/.config
						(the one you’ve just copied from BBB), find the line CONFIG_LOCALVERSION="<something
							or empty>" and change it to CONFIG_LOCALVERSION="-$lv",
						so it will look something like: CONFIG_LOCALVERSION="-bone70"

Also, make sure that: CONFIG_USB_G_DBGP=m (If
				not, make menuconfig, and set @Device Drivers-> USB
					Support -> USB Gadget Support -> EHCI Debug Device Gadget=m

Build the module:

$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4 (is it possoble to build only the gadget modules)
$ mkdir ../tmp && make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- INSTALL_MOD_PATH=../tmp modules_install

on BBB, backup /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget
				(i.e. mv
					/lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget $HOME)

copy the freshly compiled usb/gadget dir to /lib/modules/3.8.13-bone70/kernel/drivers/usb

restart BBB

Remove all g_* modules (rmmod
					g_<>)

modprobpe g_dbgp

Configure libreboot with
			EHCI debug

			Libreboot(coreboot) should be configured with debug turned on and to
			push debug messages to the EHCI debug port.
If you’ve
			downloaded the binary distribution, you can check if it is properly
			configured in the following way:

Go to the libreboot dist root directory cd
					$libreboot_bin

Locate the rom image for your target (I will call it: $img_path)

Running the following command will extract the config in a
				file ./my_config:

./cbfstool/i686/cbfstool $img_path extract -n config -f ./my_config

Make sure that the following params in the config are set as
				following:

CONFIG_USBDEBUG=y (Generic Drivers -> USB 2.0 EHCI debug dongle support)
CONFIG_USBDEBUG_IN_ROMSTAGE=y (Generic Drivers -> Enable early (pre-RAM) usbdebug)
CONFIG_USBDEBUG_HCD_INDEX=<HCD Index of usb controller - see below> (Generic Drivers -> Index for EHCI controller to use with usbdebug)
CONFIG_USBDEBUG_DEFAULT_PORT=<USB Debug port - see below> (Generic Drivers -> Default USB port to use as Debug Port)

			The following three are behind radio button in the menu. Only the first
			one2 should be =	y

USBDEBUG_DONGLE_STD=y                       (Generic Drivers -> Type of dongle (Net20DC or compatible) -> Net20DC or compatible)
CONFIG_USBDEBUG_DONGLE_BEAGLEBONE=n         (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone)
CONFIG_USBDEBUG_DONGLE_BEAGLEBONE_BLACK=n   (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone Black)

			2 The g_dbgp	module on BeagleBone Black (Rev. C) reports it self as Net20DC, the
			other options are for older BB(B) - ver1. This is documented here
			(also tested/verified).

			Then:

CONFIG_CONSOLE_USB=y (Console -> USB dongle console output)

			Also
			Debugging ---> Output verbose XYZ
			) (FIXME somebody verify these):

CONFIG_DEBUG_CBFS=y (Output verbose CBFS debug messages )
CONFIG_HAVE_DEBUG_RAM_SETUP=y (??? What/where is this)
CONFIG_DEBUG_RAM_SETUP=y (Output verbose RAM init debug messages)
CONFIG_DEBUG_SMI=y      (Output verbose SMI debug messages)
CONFIG_DEBUG_ACPI=y     (Output verbose ACPI debug messages )
CONFIG_DEBUG_USBDEBUG=y (Output verbose USB 2.0 EHCI debug dongle messages)

If some of the above mentioned configuration options are not as
			specified, you have to configure and compile libreboot yourself. Please
			refer to the doc(FIXME: link about compiling libreboot.

			Selecting
			HCD Index
			and
			USB Debug port

			This applies (and works) only if the USB controller that supports debug
			(found in the first section) is from Intel.
If the PCI ID of the
			port you found in the first section is
			0000:00:1a.0
			or
			0000:00:1d.0
			, you are ok. Otherwise you have to try without guarantee that will
			work.

			If the externally exposed port is on a bus with
			PCI ID == 0000:00:1a.0
			then for
			CONFIG_USBDEBUG_HCD_INDEX
			choose 2, otherwise choose 0
			.

			For
			CONFIG_USBDEBUG_DEFAULT_PORT
			choose the port from the first section that correspond to the
			PCI ID

			Notes:
The above is based on the implementation of
			coreboot/src/southbridge/intel/common/usb_debug.c : pci_ehci_dbg_dev()
			.
This is enough as it applies for the supported GM45/G45
			Thinkpads. coreboot support some other contollers too, but they are
			irellevent for libreboot (for now).

On T500 (with switchable GPU) the debug ports for both intel
				controllers is exposed.

On x200t the debug ports for both intel controllers is
				exposed.

How to get the debug logs

Plug the USB cable in the target’s debug port (the one
				you found in step 1) and BBB’s mini-B USB

Make sure no other then g_dbgp of the g_*
				modules is loaded on your BBB

On the BBB:

stty -icrnl -inlcr -F /dev/ttyGS0
cat /dev/ttyGS0

Power on the target with libreboot

You should see debug logs comming on your BBB console

			Note that this is not permanent on BBB, if you reboot it, you have to
			rmmod g_*
			and
			modprobe g_dbgp

Eneble
			EHCI Debug on the target’s kernel (optional, recommended)

You have to know how to compile kernel for your target.

Check if early debugging is already enabled: grep
					CONFIG_EARLY_PRINTK_DBGP /boot/config-<ver>

If enabled, you do not have to compile the kernel (skip this
				step). Otherwise, prepare kernel source for your distribution and
				select (Kernel hacking -> Early printk via EHCI debug
					port). Compile and install the new kernel.

Edit your grub configuration and add following to the kenel
				parameters2021: earlyprintk=dbgp,keep.
				Also, try: earlyprintk=dbgp<N>,keep where N
				is the debug port id if the first does not work.

References

			10 EHCI
				Debug Port

			11 coreboot
				EHCI debug gadget demonstration

			12 EHCI
				Gadget Debug

			13 Ehci-debug-gadget-patches.tar.gz

			14 Compiling
				the BeagleBone Black Kernel

			15
			http://dumb-looks-free.blogspot.ca/2014/06/beaglebone-black-bbb-compile-kernel.html

			16
			http://dumb-looks-free.blogspot.fr/2014/06/beaglebone-black-bbb-kernal-headers.html

			17 Building
				BBB Kernel

			18
			http://komposter.com.ua/documents/USB-2.0-Debug-Port%28John-Keys%29.pdf

			19 Exploring
				USB at the Hardware/Software Interface

			20
			https://www.kernel.org/doc/Documentation/x86/earlyprintk.txt

			21 https://wiki.ubuntu.com/Kernel/Debugging/USBearlyprintk

			TODO:

grub does not send messages to EHCI debug. Investigate.

The section “Configure libreboot with EHCI debug”
				can be skipped/simplified if a common configuration works for all
				relevant targets is selected as defualt

Patch and compule g_dbgp on BBB instead cross-compile

Find a simple way to send debug messages from targets userland

			Copyright © 2015 Alex David <opdecirkel@gmail.com>

			Permission is granted to copy, distribute and/or modify this document
			under the terms of the GNU Free Documentation License, Version 1.3
			or any later version published by the Free Software Foundation;
			with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
			A copy of the license can be found at ../gfdl-1.3.txt

			Updated versions of the license (when available) can be found at
			https://www.gnu.org/licenses/licenses.html

			UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
			EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
			AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF
			ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS,
			IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION,
			WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR
			PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS,
			ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT
			KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT
			ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU.

			TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
			TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION,
			NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT,
			INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES,
			COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR
			USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN
			ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR
			DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR
			IN PART, THIS LIMITATION MAY NOT APPLY TO YOU.

			The disclaimer of warranties and limitation of liability provided
			above shall be interpreted in a manner that, to the extent
			possible, most closely approximates an absolute disclaimer and
			waiver of all liability.

repo_name: Amlouden/libreboot

license: mit


code:
<!DOCTYPE html>

	<meta charset="utf-8">
	<meta name="viewport" content="width=device-width, initial-scale=1">

	<title>How to program an SPI flash chip with the BeagleBone Black</title>

How to program an SPI flash chip with the BeagleBone Black

				This document exists as a guide for reading from or writing to an SPI flash chip with the BeagleBone Black,
				using the flashrom software.
				BeagleBone Black rev. C was used when creating this guide, but earlier revisions
				may also work.

Back to previous index

Hardware requirements

				Shopping list (pictures of this hardware is shown later):

						External SPI programmer: BeagleBone Black (rev. C)
						is highly recommended. Sometimes referred to as 'BBB'.
						This page contains a list of distributors.
						farnell sells them - http://farnell.com/
						- If you can't get a BBB, there are other programmers listed on flashrom.org, but
						not all of them will be suitable for libreboot's purpose. (some may also require blobs. all BBs and BBBs though can be used without blobs).
						There are also some programmers not listed on flashrom.org, that can also work.
						A BB (original beaglebone) should work as well, though you might have to replace the distro
						that it came with.

						Electrical/insulative tape: cover the entire bottom surface of the BBB (the part that
						rests on a surface). This is important, when placing the BBB on top of a board
						so that nothing shorts. - easy to find in most hardware/electronics stores

						Clip for connecting to the flash chip: if you have a SOIC-16
						flash chip (16 pins), you will need the Pomona 5252
						or equivalent. For SOIC-8 flash chips (8 pins), you will
						need the Pomona 5250 or equivalent. Do check which chip you have,
						before ordering a clip. Also, make sure to buy at least two clips
						(they break easily).
						- Farnell sells these, and ships to many countries. http://farnell.com/
						- Some people find these difficult to get, especially in South America. If you have more links to suppliers,
						please contact the libreboot project with the relevant information.
						- if you can't get a pomona clip, some other clips might work (eg 3M) but are not always reliable. You can also
						directly solder the wires to the chip, if that suits you. The clip is just for convenience, really.

						External 3.3V DC power supply, for powering the flash chip.
						An ATX power supply / PSU (common on Intel/AMD desktop computers) will work for this.
						A lab PSU (DC) will also work (adjusted to 3.3V). Etc.

Getting a multimeter might be worthwhile, to verify that it's supplying 3.3V

						External 5V DC power supply (barrel connector), for powering the BBB.
						The BeagleBone can have power supplied via USB, but a
						dedicated power supply is recommended.  These should be easy to find in most places
						that sell electronics. - OPTIONAL. Only needed if not powering with the USB cable, or if you want
						to use EHCI debug

						Pin header / jumper cables (2.54mm / 0.1" headers)
						You should get male-male, male-female and female-female
						cables in 10cm size. Just get a load of them.
						other possible names for these cables:

flying leads

dupont (this is just one possible brand name)

Often used on breadboards, so they might be called breadboard cables

Maybe they are called wires instead of cables or leads

They are also the same cables used on the GPIOs on the RPi

adafruit.com sells them, and there are others

Some people find these difficult to buy. Contact the libreboot project if you have more links to sellers.

You might also be able to make these cables yourself.

						For PSU connections, long cables (e.g. 20cm) is fine, and you can extend it longer than that if needed.

						Mini USB A-B cable (the BeagleBone probably already comes
						with one.) - OPTIONAL - only needed for EHCI debug or for serial/ssh access without ethernet cable (g_multi kernel module)

						FTDI TTL cable or debug board, for accessing the serial console on your BBB.
						This page contains
						a list. - OPTIONAL - only needed for serial console on the BBB, if not using SSH via ethernet cable

				Back to top of page.

Setting up the 3.3V DC PSU

				ATX PSU pinouts are on wikipedia

				You can use pin 1 or 2 (orange wire) on a 20-pin or 24-pin ATX PSU for 3.3V,
				and any of the ground/earth sources (black cables) for ground.
				Short PS_ON# / Power on (green wire. pin 16 on 24-pin ATX PSU, or pin 14 on a 20-pin ATX PSU) to a ground
				(black. there is one right next to it) using a wire/paperclip/jumper then
				power on the PSU by grounding PS_ON# (this is also how an ATX motherboard turns on a PSU).

				DO **NOT** use pin 4, 6, do **NOT** use pin 19 or 20 (on a 20-pin ATX PSU), and
				DO **NOT** use pin 21, 22 or 23 (on a 24-pin ATX PSU). Those wires (the red ones) are 5V, and they **WILL**
				kill your flash chip. ***NEVER*** supply more than 3.3V to your flash chip.
				(that is, if it's a 3.3V flash chip. 5V and 1.8V SPI flash chips do exist, but they are rare. always
				check what voltage your chip takes. most take 3.3V)

				You only need one 3.3V supply and one ground for the flash chip, after grounding PS_ON#.

				The male end of a 0.1" or 2.54mm header cable is not thick enough to remain permanently
				connected to the ATX PSU on its own.
				When connecting header cables to the connector on the ATX PSU, use a female end attached to
				a thicker piece of wire (you could use a paper clip), or wedge the male end of the jumper cable
				into the sides of the hole in the connector, instead of going through the centre.

				Here is an example set up:

Accessing the operating system on the BBB

				The operating system on your BBB will probably have an SSH daemon
				running where the root account has no password. Use SSH to access
				the operating system and set a root password. By default, the OS
				on your BBB will most likely use DHCP, so it should already have an IP
				address.

				You will also be using the OS on your BBB for programming an SPI flash chip.

Alternatives to SSH (in case SSH fails)

					You can also use a serial FTDI debug board with GNU Screen, to access the serial console.

					# screen /dev/ttyUSB0 115200

					Here are some example photos:

					You can also connect the USB cable from the BBB to another computer and a new network interface will appear,
					with its own IP address. This is directly accessible from SSH, or screen:

					# screen /dev/ttyACM0 115200

					You can also access the uboot console, using the serial method
					instead of SSH.

Setting up spidev on the BBB

				Log on as root on the BBB, using either SSH or a serial console as defined in
				#bbb_access. Make sure that you have internet access
				on your BBB.

				Follow the instructions at http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0
				up to (and excluding) the point where it tells you to modify uEnv.txt

				You need to update the software on the BBB first. If you have an
				element14 brand BBB (sold by Premier Farnell plc. stores like
				Farnell element14, Newark element14, and Embest), you may need
				to work around a bug
				in the LED aging init script before you can update your
				software. If you don't have a file named
				/etc/init.d/led_aging.sh, you can skip this step and update your
				software as described below. Otherwise, replace the contents of
				this file with:

#!/bin/sh -e
### BEGIN INIT INFO
# Provides:          led_aging.sh
# Required-Start:    $local_fs
# Required-Stop:     $local_fs
# Default-Start:     2 3 4 5
# Default-Stop:      0 1 6
# Short-Description: Start LED aging
# Description:       Starts LED aging (whatever that is)
### END INIT INFO

x=$(/bin/ps -ef | /bin/grep "[l]ed_acc")
if [ ! -n "$x" -a -x /usr/bin/led_acc ]; then
    /usr/bin/led_acc &
fi

				Run apt-get update and apt-get upgrade then reboot the BBB, before continuing.

				Check that the firmware exists:

				# ls /lib/firmware/BB-SPI0-01-00A0.*

				Output:

/lib/firmware/BB-SPI0-01-00A0.dtbo

				Then:

				# echo BB-SPI0-01 > /sys/devices/bone_capemgr.*/slots

				# cat /sys/devices/bone_capemgr.*/slots

				Output:

 0: 54:PF---
 1: 55:PF---
 2: 56:PF---
 3: 57:PF---
 4: ff:P-O-L Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G
 5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI
 7: ff:P-O-L Override Board Name,00A0,Override Manuf,BB-SPI0-01

				Verify that the spidev device now exists:

				# ls -al /dev/spid*

				Output:

crw-rw---T 1 root spi 153, 0 Nov 19 21:07 /dev/spidev1.0

				Now the BBB is ready to be used for flashing. Make this persist
				across reboots:

				In /etc/default/capemgr add CAPE=BB-SPI0-01 at the end
				(or change the existing CAPE= entry to say that, if an
				entry already exists.

				Get flashrom from the libreboot_util release archive, or build it from libreboot_src/git if you need to.
				An ARM binary (statically compiled) for flashrom exists in libreboot_util releases. Put the flashrom binary
				on your BBB.

				You may also need ich9gen, if you will be flashing an ICH9-M laptop (such as the X200). Get it from libreboot_util,
				or build it from libreboot_src, and put the ARM binary for it on your BBB.

				Finally, get the ROM image that you would like to flash and put that on your BBB.

				Now test flashrom:

				# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512

				Output:

Calibrating delay loop... OK.
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.

				This means that it's working (the clip isn't connected to any flash chip,
				so the error is fine).

			Connecting the Pomona 5250/5252

				Use this image for reference when connecting the pomona to the BBB:
				http://beagleboard.org/Support/bone101#headers
				(D0 = MISO or connects to MISO).

				The following shows how to connect clip to the BBB	(on the P9 header), for SOIC-16 (clip: Pomona 5252):

 NC              -       - 21
 1               -       - 17
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 18              -       - 3.3V (PSU)
 22              -       - NC - this is pin 1 on the flash chip
This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

You may also need to connect pins 1 and 9 (tie to 3.3V supply). These are HOLD# and WP#.
On some systems they are held high, if the flash chip is attached to the board.
If you're flashing a chip that isn't connected to a board, you'll almost certainly
have to connect them.

SOIC16 pinout (more info available online, or in the datasheet for your flash chip):
HOLD	1-16	SCK
VDD	2-15	MOSI
N/C	3-14	N/C
N/C	4-13	N/C
N/C	5-12	N/C
N/C	6-11	N/C
SS	7-10	GND
MISO	8-9	WP

				The following shows how to connect clip to the BBB	(on the P9 header), for SOIC-8 (clip: Pomona 5250):

 18              -       - 1
 22              -       - NC
 NC              -       - 21
 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

You may also need to connect pins 3 and 7 (tie to 3.3V supply). These are HOLD# and WP#.
On some systems they are held high, if the flash chip is attached to the board.
If you're flashing a chip that isn't connected to a board, you'll almost certainly
have to connect them.

SOIC8 pinout (more info available online, or in the datasheet for your flash chip):
SS	1-8	VDD
MISO	2-7	HOLD
WP	3-6	SCK
GND	4-5	MOSI

				NC = no connection

				DO NOT connect 3.3V (PSU) yet. ONLY connect this once the pomona is connected to the flash chip.

				You also need to connect the BLACK wire (ground/earth) from the 3.3V PSU to pin 2 on the BBB (P9 header).
				It is safe to install this now
				(that is, before you connect the pomona to the flash chip); in fact, you should.

				if you need to extend the 3.3v psu leads, just use the same colour M-F leads, but keep all other
				leads short (10cm or less)

				You should now have something that looks like this:

			Back to top of page.

Notes about stability

				http://flashrom.org/ISP
				is what we typically do in libreboot, though not always. That page
				has some notes about using resistors to affect stability. Currently,
				we use spispeed=512 (512kHz) but it is possible to use higher speeds while
				maintaining stability.

				tty0_ in #libreboot was able to get better flashing speeds with the following configuration:

"coax" with 0.1 mm core  and aluminum foley (from my kitchen), add 100 Ohm resistors (serial)

put heatshrink above the foley, for: CS, CLK, D0, D1

Twisted pair used as core (in case more capacitors are needed)

						See this image:
						http://i.imgur.com/qHGxKpj.jpg

He was able to flash at 50MHz (lower speeds are also fine).

			Copyright ©  2014, 2015 Francis Rowe <info@gluglug.org.uk>

			Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>

			Permission is granted to copy, distribute and/or modify this document
			under the terms of the GNU Free Documentation License, Version 1.3
			or any later version published by the Free Software Foundation;
			with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
			A copy of the license can be found at ../gfdl-1.3.txt

			Updated versions of the license (when available) can be found at
			https://www.gnu.org/licenses/licenses.html

			UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
			EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
			AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF
			ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS,
			IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION,
			WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR
			PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS,
			ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT
			KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT
			ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU.

			TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
			TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION,
			NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT,
			INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES,
			COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR
			USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN
			ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR
			DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR
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			The disclaimer of warranties and limitation of liability provided
			above shall be interpreted in a manner that, to the extent
			possible, most closely approximates an absolute disclaimer and
			waiver of all liability.


code:
<!DOCTYPE html>

	<meta charset="utf-8">
	<meta name="viewport" content="width=device-width, initial-scale=1">

	<title>Installing libreboot</title>

Installing libreboot

				This section relates to installing libreboot on supported targets.

				Back to previous index

Software methods

List of ROM images in libreboot

How to update or install libreboot (if you are already running libreboot or coreboot)

KFSN4-DRE: initial installation guide (if running the proprietary firmware)

ThinkPad X60/T60: Initial installation guide (if running the proprietary firmware)

MacBook2,1: Initial installation guide (if running the proprietary firmware)

Hardware methods

How to program an SPI flash chip with the BeagleBone Black

How to configure EHCI debugging on the BeagleBone Black

ThinkPad X60: Recovery guide

ThinkPad X60 Tablet: Recovery guide

ThinkPad T60: Recovery guide

ThinkPad X200/X200S/X200T (needed if running the proprietary firmware, or to unbrick)

ThinkPad R400 (needed if running the proprietary firmware, or to unbrick)

ThinkPad R500 (needed if running the proprietary firmware, or to unbrick)

ThinkPad T400 (needed if running the proprietary firmware, or to unbrick)

ThinkPad T500 (needed if running the proprietary firmware, or to unbrick)

List of ROM images in libreboot

				Libreboot distributes pre-compiled ROM images, built from the libreboot source code.
				These images are provided for user convenience, so that they don't have
				to build anything from source on their own.

				The ROM images in each archive use the following at the end of the file name,
				if they are built with the GRUB payload: _keymap_mode.rom

				Available modes: vesafb or txtmode. The vesafb ROM images are recommended, in most cases;
				txtmode ROM images come with MemTest86+, which requires text-mode instead of the usual framebuffer used
				by coreboot native graphics initialization.

				keymap can be one of several keymaps that keyboard supports (there are quite a few),
				which affects the keyboard layout configuration that is used in GRUB. It doesn't matter
				which ROM image you choose here, as far as the keymap in GNU/Linux is concerned.

				Keymaps are named appropriately according to each keyboard layout
				support in GRUB. To learn how these keymaps are created, see
				../grub/index.html#grub_keyboard

QEMU

					Libreboot comes with ROM images built for QEMU, by default:

					Examples of how to use libreboot ROM images in QEMU:

$ qemu-system-i386 -M q35 -m 512 -bios qemu_q35_ich9_keymap_mode.rom

$ qemu-system-i386 -M pc -m 512 -bios qemu_i440fx_piix4_keymap_mode.rom

					You can optionally specify the -serial stdio argument, so that QEMU will emulate
					a serial terminal on the standard input/output (most likely your terminal emulator or TTY).

					Other arguments are available for QEMU. The manual will contain more information.

				Back to top of page.

How to update or install libreboot (if you are already running libreboot or coreboot)

				On all current targets, updating libreboot can be accomplished without disassembly and,
				therefore, without having to externally re-flash using any dedicated hardware. In other words,
				you can do everything entirely in software, directly from the OS that is running on your libreboot
				system.

					If you are using libreboot_src or git, then make sure that you built the sources first (see ../git/index.html#build).

				Look at the list of ROM images to see which image is compatible with your device.

Are you currently running the original, proprietary firmware?

					If you are currently running the proprietary firmware (not libreboot or coreboot),
					then the flashing instructions for your system are going to be different.

					X60/T60 users running the proprietary firmware should refer to #flashrom_lenovobios.
					MacBook2,1 users running Apple EFI should refer to #flashrom_macbook21

					X200 users, refer to x200_external.html,
					R400 users refer to r400_external.html,
					R500 users refer to r500_external.html,
					T400 users refer to t400_external.html,
					T500 users refer to t500_external.html

ASUS KFSN4-DRE?

					Internal flashing should work just fine, even if you are
					currently booting the proprietary firmware.

					Libreboot currently lacks documentation for externally
					re-flashing an LPC flash chip. However, these boards have
					the flash chip inside of a PLCC socket, and it is possible
					to hot-swap the chips. If you want to back up your
					known-working image, simply hot-swap the chip for one that
					is the same capacity, after having dumped a copy of the
					current firmware (flashrom -p internal -r yourchosenname.rom),
					and then flash that chip with the known-working image.
					Check whether the system still boots, and if it does, then
					it should be safe to flash the new image (because you now
					have a backup of the old image).

					Keeping at least one spare LPC PLCC chip with working firmware
					on it is highly recommended, in case of bricks.

						DO NOT hot-swap the chip with your bare hands. Use a PLCC
						chip extractor. These can be found online.
						See http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools

					Do check the HCL entry: ../hcl/kfsn4-dre.html

Are you currently running libreboot (or coreboot)?

					X60/T60 users should be fine with this guide. If you write-protected the flash chip, please refer to
					x60_unbrick.html, x60tablet_unbrick.html
					or t60_unbrick.html. This probably does not apply to you. Most people
					do not write-protect the flash chip, so you probably didn't either.

					Similarly, it is possible to write-protect the flash chip in coreboot or libreboot on GM45 laptops
					(X200/R400/R500/T400/T500). If you did this, then you will need to use the links above for flashing,
					treating your laptop as though it currently has the proprietary firmware (because write-protected SPI flash
					requires external re-flashing, as is also the case when running the proprietary firmware).

					If you did not write-protect the flash chip, or it came to you without any write-protection
					(libreboot does not write-protect the flash chip by default, so this probably applies to you),
					read on!

MAC address on GM45 (X200/R400/T400/T500)

					Users of the X200/R400/T400/T500 take note: The MAC address for the onboard ethernet chipset
					is located inside the flash chip. Libreboot ROM images for these laptops contain a generic MAC
					address by default (00:F5:F0:40:71:FE), but this is not what you want.
					Make sure to change the MAC address inside the ROM image, before flashing it.
					The instructions on ../hcl/gm45_remove_me.html#ich9gen
					show how to do this.

					It is important that you change the default MAC address, before flashing. It will be printed on a sticker
					at the bottom of the laptop, or it will be printed on a sticker next to or underneath the RAM. Alternatively,
					and assuming that your current firmware has the correct MAC address in it, you can get it from your OS.

						R500 users: your laptop lacks a GbE region, because it has a different NIC. You do not need to change the MAC
						address on this laptop; it will already be correct. You can simply flash the available ROM images for the R500, as-is.
						See ../hcl/r500.html#nogbe.

Flash chip size

					Use this to find out:

					# dmidecode | grep ROM\ Size

All good?

Excellent! Moving on...

					Download the libreboot_util.tar.xz archive, and extract it. Inside, you will find
					a directory called flashrom. This contains statically compiled executable files of
					the flashrom utility, which you will use to re-flash your libreboot system.

					Simply use cd on your terminal, to switch to the libreboot_util directory. Inside,
					there is a script called flash, which will detect what CPU architecture you have
					(e.g. i686, x86_64) and use the appropriate executable. It is also possible for you to
					build these executables from the libreboot source code archives.

						How to update the flash chip contents:

						$ sudo ./flash update yourrom.rom

						Ocassionally, coreboot changes the name of a given board. If flashrom complains about a board mismatch, but
						you are sure that you chose the correct ROM image, then run this alternative command:

						$ sudo ./flash forceupdate yourrom.rom

						You should see "Verifying flash... VERIFIED." written at the end of the flashrom output. Shut down
						after you see this, and then boot up again after a few seconds.

Back to top of page

ThinkPad X60/T60: Initial installation guide (if running the proprietary firmware)

This is for the ThinkPad X60 and T60 while running Lenovo BIOS. If you already have coreboot or libreboot running,
			then go to #flashrom instead!

If you are flashing a Lenovo ThinkPad T60, be sure to read ../hcl/index.html#supported_t60_list

					If you are using libreboot_src or git, then make sure that you built the sources first (see ../git/index.html#build).

					Warning: this guide will not instruct the user how to backup the original Lenovo BIOS firmware. These backups
					are tied to each system, and will not work on any other.
					For that, please refer to http://www.coreboot.org/Board:lenovo/x60/Installation.

						If you're using libreboot 20150518, note that there is a mistake in the flashing script.
						Apply this patch to the BASH script named flash (this is the script for flashing
						libreboot into your X60): x60flashscript.patch.
						This patch is merged in the main git repository, and in all releases after 20150518.

					The first half of the procedure is as follows:

					$ sudo ./flash i945lenovo_firstflash yourrom.rom.

					You should see within the output the following:

					"Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000 are swapped".

					You should also see within the output the following:

					"Your flash chip is in an unknown state", "FAILED" and "DO NOT REBOOT OR POWEROFF"

					Seeing this means that the operation was a resounding success! DON'T PANIC.

					See this link for more details:
					http://thread.gmane.org/gmane.linux.bios.flashrom/575.

					If the above is what you see, then SHUT DOWN. Wait a few seconds, and then boot; libreboot is running, but there is a 2nd procedure *needed* (see below).

					When you have booted up again, you must also do this:

					$ sudo ./flash i945lenovo_secondflash yourrom.rom

					If flashing fails at this stage, try the following:

					$ sudo ./flashrom/i686/flashrom -p internal:laptop=force_I_want_a_brick -w yourrom.rom

					You should see within the output the following:

					"Updated BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is untranslated"

					You should also see within the output the following:

					"Verifying flash... VERIFIED."

Back to top of page.

MacBook2,1: Initial installation guide (if running the proprietary firmware)

					If you have a MacBook1,1, refer to ../hcl/index.html#macbook11 for flashing instructions.

					This is for the MacBook2,1 while running Apple EFI firmware. If you already have
					coreboot or libreboot running, then go to #flashrom instead!

				Be sure to read the information in ../hcl/index.html#macbook21.

					Warning: this guide will not instruct the user how to backup the original Apple EFI firmware.
					For that, please refer to http://www.coreboot.org/Board:apple/macbook21.

					If you are using libreboot_src or git, then make sure that you built the sources first (see ../git/index.html#build).

				Look at the list of ROM images to see which image is compatible with your device.

					Use this flashing script, to install libreboot:

					$ sudo ./flash i945apple_firstflash yourrom.rom

					You should also see within the output the following:

					"Verifying flash... VERIFIED."

					Shut down.

Back to top of page.

			Copyright ©  2014, 2015 Francis Rowe <info@gluglug.org.uk>

			Permission is granted to copy, distribute and/or modify this document
			under the terms of the GNU Free Documentation License, Version 1.3
			or any later version published by the Free Software Foundation;
			with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
			A copy of the license can be found at ../gfdl-1.3.txt

			Updated versions of the license (when available) can be found at
			https://www.gnu.org/licenses/licenses.html

			UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
			EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
			AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF
			ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS,
			IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION,
			WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR
			PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS,
			ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT
			KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT
			ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU.

			TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
			TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION,
			NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT,
			INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES,
			COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR
			USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN
			ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR
			DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR
			IN PART, THIS LIMITATION MAY NOT APPLY TO YOU.

			The disclaimer of warranties and limitation of liability provided
			above shall be interpreted in a manner that, to the extent
			possible, most closely approximates an absolute disclaimer and
			waiver of all liability.


code:
<!DOCTYPE html>

	<meta charset="utf-8">
	<meta name="viewport" content="width=device-width, initial-scale=1">

	<title>ThinkPad R400: flashing tutorial (BeagleBone Black)</title>

Flashing the R400 with a BeagleBone Black

Initial flashing instructions for R400.

				This guide is for those who want libreboot on their ThinkPad R400
				while they still have the original Lenovo BIOS present. This guide
				can also be followed (adapted) if you brick your R400, to know how
				to recover.

				Before following this section, please make sure to setup your libreboot ROM properly first.
				Although ROM images are provided pre-built in libreboot, there are some modifications that
				you need to make to the one you chose before flashing. (instructions referenced later in
				this guide)

Back to main index

Libreboot T400

				You may also be interested in the smaller, more portable Libreboot T400.

Serial port

				EHCI debug might not be needed. It has been reported that the docking station
				for this laptop has a serial port, so it might be possible to use that instead.

LCD compatibly

				Not all LCD panels are compatible yet. See ../hcl/gm45_lcd.html.

A note about CPUs

				ThinkWiki has a list of CPUs
				for this system. The Core 2 Duo P8400 and P8600 are believed to work in libreboot.
				The Core 2 Duo T9600 was confirmed to work, so the T9400 probably also works.
				The Core 2 Duo T5870/5670 and Celeron M 575/585 are untested!

Quad-core CPUs

					Although blocked by lenovobios (as was reported), it is reported that there are quad-core CPUs
					for GM45. This laptop has socketed CPUs, so it might be possible to use them
					(they are untested in coreboot; support may have to be added).
					Core 2 Quad Q9000, Q9100 or QX9300.

					Look at this link:

					https://en.wikipedia.org/wiki/List_of_Intel_Core_2_microprocessors#Quad-Core_Notebook_processors

A note about GPUs

				Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this
				is referred to as "switchable graphics". In the BIOS setup program
				for lenovobios, you can specify that the system will use one or the other (but not both).

				Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization.
				On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so
				native graphics initialization works all the same.

CPU paste required

				See #paste.

Flash chip size

				Use this to find out:

				# dmidecode | grep ROM\ Size

				Back to top of page.

MAC address

				On the R400, the MAC address for the onboard
				gigabit ethernet chipset is stored inside the flash chip,
				along with other configuration data.

				Keep a note of the MAC address before disassembly; this is
				very important, because you will need to insert this into
				the libreboot ROM image before flashing it.
				It will be written in one of these locations:

Initial BBB configuration

				Refer to bbb_setup.html for how to
				setup the BBB for flashing.

				The following shows how to connect clip to the BBB	(on the P9 header), for SOIC-16 (clip: Pomona 5252):

POMONA 5252 (correlate with the BBB guide)
===  ethernet jack and VGA port ====
 NC              -       - 21
 1               -       - 17
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 18              -       - 3.3V (PSU)
 22              -       - NC - this is pin 1 on the flash chip
===  SATA port ===
This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

				The following shows how to connect clip to the BBB	(on the P9 header), for SOIC-8 (clip: Pomona 5250):

POMONA 5250 (correlate with the BBB guide)
===  RAM slots ====
 18              -       - 1
 22              -       - NC
 NC              -       - 21
 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
===  slot where the AC jack is connected ===
This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

Disassembly

					Remove all screws:

					Remove the HDD and optical drive:

					Remove the hinge screws:

					Remove the palm rest and keyboard:

					Remove these screws, and then remove the bezel:

					Remove the speaker screws, but don't remove the speakers yet
					(just set them loose):

					Remove these screws, and then remove the metal plate:

					Remove the antennas from the wifi card, and then
					start unrouting them:

					Disconnect the LCD cable from the motherboard:

					Remove the hinge screws, and then remove the LCD panel:

					Remove this:

					Remove this long cable (there are 3 connections):

					Disconnect the speaker cable, and remove the speakers:

					Remove the heatsink screws, remove the fan
					and then remove the heatsink/fan:

					Remove the NVRAM battery:

					Remove this screw:

					Disconnect the AC jack:

					Remove this screw and then remove what is under it:

					Remove this:

					Lift the motherboard (which is still inside the cage)
					from the side on the right, removing it completely:

					Remove all screws, marking each hole so that you know
					where to re-insert them. You should place the screws in
					a layout corresponding to the order that they were in
					before removal:

					Remove the motherboard from the cage, and the SPI flash
					chip will be next to the memory slots:

					Connect your programmer, then connect GND and 3.3V

					A dedicated 3.3V PSU was used to create this guide, but
					at ATX PSU is also fine:

					Of course, make sure to turn on your PSU:

					Now, you should be ready to install libreboot.

					Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively,
					libreboot also distributes flashrom source code which can be built.

					Log in as root on your BBB, using the instructions in bbb_setup.html#bbb_access.

					Test that flashrom works:

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512

					In this case, the output was:

flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi.
Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi.
Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
Please specify which chip definition to use with the -c <chipname> option.

					How to backup factory.rom (change the -c option as neeed, for your flash chip):

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom

					Note: the -c option is not required in libreboot's patched flashrom, because
					the redundant flash chip definitions in flashchips.c have been removed.

					Now compare the 3 images:

					# sha512sum factory*.rom

					If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not
					the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware
					that could be replicated in coreboot and libreboot.

					Follow the instructions at ../hcl/gm45_remove_me.html#ich9gen
					to change the MAC address inside the libreboot ROM image, before flashing it.
					Although there is a default MAC address inside the ROM image, this is not what you want. Make sure
					to always change the MAC address to one that is correct for your system.

					Now flash it:

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V

					You might see errors, but if it says Verifying flash... VERIFIED at the end, then it's flashed and should boot.
					If you see errors, try again (and again, and again); the message Chip content is identical to the requested image
					is also an indication of a successful installation.

					Example output from running the command (see above):

flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
Reading old flash chip contents... done.
Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
ERASE FAILED!
Reading current flash chip contents... done. Looking for another erase function.
Erase/write done.
Verifying flash... VERIFIED.

				Back to top of page.

Thermal paste (IMPORTANT)

				Because part of this procedure involved removing the heatsink, you will need to apply new paste.
				Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with.

				When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth.
				Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems.

				NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste.
				Other guides online detail the proper application procedure.

Wifi

				The R400 typically comes with an Intel wifi chipset, which does not
				work without proprietary software. For a list of wifi chipsets that
				work without proprietary software, see
				../hcl/index.html#recommended_wifi.

				Some R400 laptops might come with an Atheros chipset, but this is 802.11g only.

				It is recommended that you install a new wifi chipset. This can only
				be done after installing libreboot, because the original firmware has
				a whitelist of approved chips, and it will refuse to boot if you
				use an 'unauthorized' wifi card.

				The following photos show an Atheros AR5B95 being installed, to
				replace the Intel chip that this R400 came with:

WWAN

				If you have a WWAN/3G card and/or sim card reader, remove them permanently.
				The WWAN-3G card has proprietary firmware inside; the technology is
				identical to what is used in mobile phones, so it can also track your movements.

				Not to be confused with wifi (wifi is fine).

Memory

				You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs
				(speed/size). Non-matching pairs won't work. You can also install a
				single module (meaning, one of the slots will be empty) in slot 0.

				Make sure that the RAM you buy is the 2Rx8 density.

				The following photo shows 8GiB (2x4GiB) of RAM installed:

				Boot it!

				You should see something like this:

				Now install GNU/Linux.

			Copyright ©  2014, 2015 Francis Rowe <info@gluglug.org.uk>

			Permission is granted to copy, distribute and/or modify this document
			under the terms of the GNU Free Documentation License, Version 1.3
			or any later version published by the Free Software Foundation;
			with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
			A copy of the license can be found at ../gfdl-1.3.txt

			Updated versions of the license (when available) can be found at
			https://www.gnu.org/licenses/licenses.html

			UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
			EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
			AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF
			ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS,
			IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION,
			WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR
			PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS,
			ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT
			KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT
			ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU.

			TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
			TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION,
			NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT,
			INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES,
			COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR
			USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN
			ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR
			DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR
			IN PART, THIS LIMITATION MAY NOT APPLY TO YOU.

			The disclaimer of warranties and limitation of liability provided
			above shall be interpreted in a manner that, to the extent
			possible, most closely approximates an absolute disclaimer and
			waiver of all liability.


code:
<!DOCTYPE html>

	<meta charset="utf-8">
	<meta name="viewport" content="width=device-width, initial-scale=1">

	<title>ThinkPad R500: flashing tutorial (BeagleBone Black)</title>

Flashing the R500 with a BeagleBone Black

Initial flashing instructions for R500.

				This guide is for those who want libreboot on their ThinkPad R500
				while they still have the original Lenovo BIOS present. This guide
				can also be followed (adapted) if you brick your R500, to know how
				to recover.

				Before following this section, please make sure to setup your libreboot ROM properly first.
				Although ROM images are provided pre-built in libreboot, there are some modifications that
				you need to make to the one you chose before flashing. (instructions referenced later in
				this guide)

					NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you
					must build for it from source using the libreboot git repository.

Back to main index

Serial port

				EHCI debug might not be needed. It has been reported that the docking station
				for this laptop has a serial port, so it might be possible to use that instead.

LCD compatibly

				Not all LCD panels are known to be compatible yet. See ../hcl/gm45_lcd.html.

A note about CPUs

				ThinkWiki has a list of CPUs
				for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in libreboot.
				The Core 2 Duo T9600 was confirmed to work (on a different laptop, but still GM45), so the T9400 probably also works.
				The Core 2 Duo T5870/5670 and Celeron M 575/585 are untested!

Quad-core CPUs

					Although blocked by lenovobios (as was reported), it is reported that there are quad-core CPUs
					for GM45. This laptop has socketed CPUs, so it might be possible to use them
					(they are untested in coreboot; support may have to be added).
					Core 2 Quad Q9000, Q9100 or QX9300.

					Look at this link:

					https://en.wikipedia.org/wiki/List_of_Intel_Core_2_microprocessors#Quad-Core_Notebook_processors

A note about GPUs

				ThinkWiki lists
				two possible GPUs: Intel or ATI. Only the Intel GPUs work in libreboot; the ATI
				GPUs require a proprietary Video BIOS, and so those are unsupported in libreboot.

				On other GM45 laptops in libreboot (e.g. T400, T500), so-called switchable graphics
				is used, which means that the laptop will have both an ATI and Intel GPU, or it will
				only have Intel, depending on which variation you have. On the systems with ATI and Intel,
				you can disable the ATI GPU and use only the Intel GPU, which works in libreboot.

						It is unknown whether R500 laptops with an ATI GPU still have an Intel GPU, where you could
						disable the ATI GPU and use the Intel GPU. These are budget laptops, so it's highly likely
						that Lenovo decided on this model to ship with one GPU or the other, but not both (GPUs cost money).

						It is **HIGHLY** recommended, when ordering an R500 laptop, to **ENSURE** that the
						one you're ordering has an Intel GPU.

CPU paste required

				See #paste.

Flash chip size

				Use this to find out:

				# dmidecode | grep ROM\ Size

				It is believed that all R500 laptops have only SOIC-8 (4MiB) chips.

				Back to top of page.

MAC address

				Unlike other GM45 thinkpads, the R500 has a different onboard gigabit NIC,
				where the MAC address is built-in. You do not need to change the MAC address
				at all on this laptop; simply flash the provided ROM images, as-is.

Initial BBB configuration

				Refer to bbb_setup.html for how to
				setup the BBB for flashing.

				The following shows how to connect clip to the BBB	(on the P9 header), for SOIC-8 (clip: Pomona 5250):

POMONA 5250 (correlate with the BBB guide)
===  VGA and ethernet socket ===
 18              -       - 1
 22              -       - NC
 NC              -       - 21
 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
===  DVD drive ===
This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

Disassembly

					Remove the motherboard from the cage, and the SPI flash
					chip will be next to the memory slots:

					The following image is for illustration only, to show how a SOIC-8 clip is connected.
					This photo is from a T500, which has a different arrangement to the R500:

					Connect your programmer, then connect GND and 3.3V

					A dedicated 3.3V PSU was used to create this guide, but
					at ATX PSU is also fine:

					Of course, make sure to turn on your PSU:

					Now, you should be ready to install libreboot.

					Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively,
					libreboot also distributes flashrom source code which can be built.

					Log in as root on your BBB, using the instructions in bbb_setup.html#bbb_access.

					Test that flashrom works:

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512

					In this case, the output was:

flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi.
Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi.
Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
Please specify which chip definition to use with the -c <chipname> option.

					How to backup factory.rom (change the -c option as neeed, for your flash chip):

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom

					Note: the -c option is not required in libreboot's patched flashrom, because
					the redundant flash chip definitions in flashchips.c have been removed.

					Now compare the 3 images:

					# sha512sum factory*.rom

					If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not
					the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware
					that could be replicated in coreboot and libreboot.

					Now flash it:

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V

					You might see errors, but if it says Verifying flash... VERIFIED at the end, then it's flashed and should boot.
					If you see errors, try again (and again, and again); the message Chip content is identical to the requested image
					is also an indication of a successful installation.

					Example output from running the command (see above):

flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
Reading old flash chip contents... done.
Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
ERASE FAILED!
Reading current flash chip contents... done. Looking for another erase function.
Erase/write done.
Verifying flash... VERIFIED.

				Back to top of page.

Thermal paste (IMPORTANT)

				Because part of this procedure involved removing the heatsink, you will need to apply new paste.
				Arctic Silver 5 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with.

				When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth.
				Then apply new paste. AS5 is also much better than the default paste used on these systems.

				NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste.
				Other guides online detail the proper application procedure.

Wifi

				The R500 typically comes with an Intel wifi chipset, which does not
				work without proprietary software. For a list of wifi chipsets that
				work without proprietary software, see
				../hcl/index.html#recommended_wifi.

				Some R500 laptops might come with an Atheros chipset, but this is 802.11g only.

				It is recommended that you install a new wifi chipset. This can only
				be done after installing libreboot, because the original firmware has
				a whitelist of approved chips, and it will refuse to boot if you
				use an 'unauthorized' wifi card.

				The following photos show an Atheros AR5B95 being installed, to
				replace the Intel chip that this R500 came with:

WWAN

				If you have a WWAN/3G card and/or sim card reader, remove them permanently.
				The WWAN-3G card has proprietary firmware inside; the technology is
				identical to what is used in mobile phones, so it can also track your movements.

				Not to be confused with wifi (wifi is fine).

Memory

				You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs
				(speed/size). Non-matching pairs won't work. You can also install a
				single module (meaning, one of the slots will be empty) in slot 0.

				Make sure that the RAM you buy is the 2Rx8 density.

				The following photo shows 8GiB (2x4GiB) of RAM installed:

				Boot it!

				You should see something like this:

				Now install GNU/Linux.

			Copyright ©  2015 Francis Rowe <info@gluglug.org.uk>

			Permission is granted to copy, distribute and/or modify this document
			under the terms of the GNU Free Documentation License, Version 1.3
			or any later version published by the Free Software Foundation;
			with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
			A copy of the license can be found at ../gfdl-1.3.txt

			Updated versions of the license (when available) can be found at
			https://www.gnu.org/licenses/licenses.html

			UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
			EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
			AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF
			ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS,
			IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION,
			WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR
			PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS,
			ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT
			KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT
			ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU.

			TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
			TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION,
			NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT,
			INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES,
			COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR
			USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN
			ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR
			DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR
			IN PART, THIS LIMITATION MAY NOT APPLY TO YOU.

			The disclaimer of warranties and limitation of liability provided
			above shall be interpreted in a manner that, to the extent
			possible, most closely approximates an absolute disclaimer and
			waiver of all liability.


code:
<!DOCTYPE html>

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	<title>ThinkPad T400: flashing tutorial (BeagleBone Black)</title>

Flashing the T400 with a BeagleBone Black

Initial flashing instructions for T400.

				This guide is for those who want libreboot on their ThinkPad T400
				while they still have the original Lenovo BIOS present. This guide
				can also be followed (adapted) if you brick your T400, to know how
				to recover.

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T400 laptops with libreboot pre-installed

				If you don't want to install libreboot yourself, companies exist that sell these laptops
				with libreboot pre-installed, along with a free GNU/Linux distribution.

				Check the suppliers page for more information.

Serial port

				EHCI debug might not be needed. It has been reported that the docking station
				for this laptop has a serial port, so it might be possible to use that instead.

LCD compatibly

				Not all LCD panels are compatible yet. See ../hcl/gm45_lcd.html.

A note about CPUs

				ThinkWiki has a list of CPUs
				for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in libreboot.
				The T9600 was confirmed to work, so the T9500/T9550 probably also work.

Quad-core CPUs

					Although blocked by lenovobios (as was reported), it is reported that there are quad-core CPUs
					for GM45. This laptop has socketed CPUs, so it might be possible to use them
					(they are untested in coreboot; support may have to be added).
					Core 2 Quad Q9000, Q9100 or QX9300.

					Look at this link:

					https://en.wikipedia.org/wiki/List_of_Intel_Core_2_microprocessors#Quad-Core_Notebook_processors

A note about GPUs

				Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this
				is referred to as "switchable graphics". In the BIOS setup program
				for lenovobios, you can specify that the system will use one or the other (but not both).

				Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization.
				On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so
				native graphics initialization works all the same.

CPU paste required

				See #paste.

Flash chip size

				Use this to find out:

				# dmidecode | grep ROM\ Size

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MAC address

				On the T400, the MAC address for the onboard
				gigabit ethernet chipset is stored inside the flash chip,
				along with other configuration data.

				Keep a note of the MAC address before disassembly; this is
				very important, because you will need to insert this into
				the libreboot ROM image before flashing it.
				It will be written in one of these locations:

Initial BBB configuration

				Refer to bbb_setup.html for how to
				configure the BBB for flashing.

				The following shows how to connect clip to the BBB	(on the P9 header), for SOIC-16 (clip: Pomona 5252):

POMONA 5252 (correlate with the BBB guide)
===  ethernet jack and VGA port ====
 NC              -       - 21
 1               -       - 17
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 18              -       - 3.3V (PSU)
 22              -       - NC - this is pin 1 on the flash chip
===  SATA port ===
This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

				The following shows how to connect clip to the BBB	(on the P9 header), for SOIC-8 (clip: Pomona 5250):

POMONA 5250 (correlate with the BBB guide)
===  RAM slots ====
 18              -       - 1
 22              -       - NC
 NC              -       - 21
 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
===  slot where the AC jack is connected ===

This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

				The procedure

					Remove all screws, placing them in the order that you removed them:

					Remove those three screws then remove the rear bezel:

					Remove the speakers:

					Remove the wifi:

					Remove this cable:

					Unroute those antenna wires:

					Remove the LCD assembly:

					Disconnect the NVRAM battery:

					Disconnect the fan:

					Unscrew these:

					Unscrew the heatsink, then lift it off:

					Disconnect the power jack:

					Loosen this:

					Remove this:

					Unscrew these:

					Remove this:

					Unscrew this:

					Remove the motherboard (the cage is still attached) from
					the right hand side, then lift it out:

					Remove these screws, placing the screws in the same layout
					and marking each screw hole (so that you know what ones
					to put the screws back into later):

					Separate the motherboard:

					Connect your programmer, then connect GND and 3.3V

					A dedicated 3.3V PSU was used to create this guide, but
					at ATX PSU is also fine:

					Of course, make sure to turn on your PSU:

					Now, you should be ready to install libreboot.

					Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively,
					libreboot also distributes flashrom source code which can be built.

					Log in as root on your BBB, using the instructions in bbb_setup.html#bbb_access.

					Test that flashrom works:

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512

					In this case, the output was:

flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi.
Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi.
Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
Please specify which chip definition to use with the -c <chipname> option.

					How to backup factory.rom (change the -c option as neeed, for your flash chip):

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom

					Note: the -c option is not required in libreboot's patched flashrom, because
					the redundant flash chip definitions in flashchips.c have been removed.

					Now compare the 3 images:

					# sha512sum factory*.rom

					If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not
					the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware
					that could be replicated in coreboot and libreboot.

					Follow the instructions at ../hcl/gm45_remove_me.html#ich9gen
					to change the MAC address inside the libreboot ROM image, before flashing it.
					Although there is a default MAC address inside the ROM image, this is not what you want. Make sure
					to always change the MAC address to one that is correct for your system.

					Now flash it:

					# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V

					You might see errors, but if it says Verifying flash... VERIFIED at the end, then it's flashed and should boot.
					If you see errors, try again (and again, and again); the message Chip content is identical to the requested image
					is also an indication of a successful installation.

					Example output from running the command (see above):

flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
Reading old flash chip contents... done.
Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
ERASE FAILED!
Reading current flash chip contents... done. Looking for another erase function.
Erase/write done.
Verifying flash... VERIFIED.

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Thermal paste (IMPORTANT)

				Because part of this procedure involved removing the heatsink, you will need to apply new paste.
				Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with.

				When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth.
				Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems.

				NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste.
				Other guides online detail the proper application procedure.

Wifi

				The T400 typically comes with an Intel wifi chipset, which does not
				work without proprietary software. For a list of wifi chipsets that
				work without proprietary software, see
				../hcl/index.html#recommended_wifi.

				Some T400 laptops might come with an Atheros chipset, but this is 802.11g only.

				It is recommended that you install a new wifi chipset. This can only
				be done after installing libreboot, because the original firmware has
				a whitelist of approved chips, and it will refuse to boot if you
				use an 'unauthorized' wifi card.

				The following photos show an Atheros AR5B95 being installed, to
				replace the Intel chip that this T400 came with:

WWAN

				If you have a WWAN/3G card and/or sim card reader, remove them permanently.
				The WWAN-3G card has proprietary firmware inside; the technology is
				identical to what is used in mobile phones, so it can also track your movements.

				Not to be confused with wifi (wifi is fine).

Memory

				You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs
				(speed/size). Non-matching pairs won't work. You can also install a
				single module (meaning, one of the slots will be empty) in slot 0.

				Make sure that the RAM you buy is the 2Rx8 density.

				The following photo shows 8GiB (2x4GiB) of RAM installed:

				Boot it!

				You should see something like this:

				Now install GNU/Linux.

			Copyright ©  2015 Francis Rowe <info@gluglug.org.uk>

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			A copy of the license can be found at ../gfdl-1.3.txt

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