code:
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Libreboot task list

				Back to index.html.

			Important tasks for the libreboot project

				This page is part of the git repository, so feel free to submit patches
				adding to or removing from this list. (adapting the HTML should be simple enough)

Special news that affects libreboot

					Coreboot (upstream) is adopting a new release model. See
					http://www.coreboot.org/pipermail/coreboot/2015-July/080120.html
					- TODO: think about how this affects libreboot, and see what can be done to make effective use of this policy change.

Board ports

					Someone linked to
					this news post
					about a PCI-E graphics card for which a free VBIOS replacement exists. This card uses the same
					chipset as the onboard GPU in the ASUS KFSN4-DRE mainboard, which is already supported in libreboot.
					This graphics card will allow certain desktop motherboards to be viable in libreboot.

					patch for linux (kernel) to add coreboot framebuffer support

					Libreboot has so far been biased towards Intel. This needs to end (the sooner, the better). A nice start:

							ASUS KGPE-D16: this is a very modern board. It has support for both Fam10h and Fam15h AMD CPUs. The board is still
							new, and still in production. See
							these coreboot mailing list posts:

							post 1 and
							post 2

							The board is fully functional (blobs not required), and will be an instant addition to libreboot.
							See https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php

							Raptor Engineering Inc (USA) has ported
							this board to coreboot, and is using the port internally on their computing cluster, for
							the research that they do. This is the same company that ported
							the ASUS KFSN4-DRE which is supported in libreboot.
							The owner (and the
							person who ported the board to coreboot), Timothy Pearson (tpearson on freenode IRC) has reached out to the community,
							in request for funding. This funding will pay for the many months of work (at least 4-5 months, for over 10000
							lines of code any many patches that will need to be split up) to get the code
							upstreamed into coreboot. This is not as simple as just releasing the code; coreboot has a very strict code
							review process (in place to ensure quality control). The patches will have to be split up, with people's
							concerns and comments addressed over a long period, with patches constantly rebased to keep up with the
							latest coreboot master branch. In order to get this done in a decent enough time frame, Raptor Engineering will need
							to work on a more-or-less full-time basis. The funding amounts that he has asked for, are as follows:

35K USD - This pays for basic support (Fam10h), plus upstreaming. Minifree Ltd (Francis Rowe's company, sometimes known as Gluglug) will pay for this.

									The following will be crowd-funded:

									15K USD - pays for S3 (suspend/resume), stable text-mode graphics initialization and Fam15h CPU support

20K USD stretch goal - upstreaming (crowd funded)

									Excess funding from the crowd funding campaign (when started) will be used to subsidize Minifree's costs, and will support the libreboot project.

							Although Raptor would be working for many months to get this upstreamed (merged in coreboot's master branch
							in the git repository), libreboot would merge it more or less instantly, probably in the same week that the
							code is released for review. Raptor would also of course be rebasing the patches on a regular basis, as part
							of the review process, so even if it takes longer for the patches to be merged in coreboot, libreboot would have
							support for this board.

							This is a very high-end board, making for a powerful server or workstation (desktop) system
							that should easily be more than powerful enough for almost everyone. Timothy has replaced the AGESA
							source in coreboot with native initialization code for AMD. The work that he has done can easily be
							extended to support more hardware, so getting this code out and upstreamed is very important.

							Francis Rowe (lead developer of libreboot) is working with Timothy to get a crowd funding campaign started,
							and trying to get as many people as possible interested in pledging towards the campaign.

							If you are interested in donating towards the campaign (once it begins), register your interest by contacting
							Francis Rowe, using the information on the maintainers page.

									TYAN S8230 is very similar, and could probably be ported based on the KGPE-D16. Same GPU too.
									http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=665&SKU=600000194

											W83627 (SuperIO) might have a public datasheet.
											Board-specific wiring (PCI interrupts, DIMM voltage selection). etc.
											Board seems to use socketed SOIC-8 SPI flash according to tpearson, based on photos available online - looks like a ZIF socket or something else, a clip retaining the chip.

											tpearson says: Tyan seems to have done the same thing as Asus did and built a whole lot of custom power control circuitry out of FETs.
											According to him, this will take much effort to reverse engineer.

											IPMI firmware is non-free but optional (for iKVM feature, remote management like Intel ME).  Not sure if add-on module or baked in.
											In either case, it might be removed or otherwise excluded because it's a HUGE backdoor. Unlike Intel ME, this isn't signed so can be
											removed, and also replaced theoretically. Is the protocol standard public? If so, might be easy/feasible to replace with free code.
											https://github.com/facebook/openbmc - also linked from
											https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php
											- might be possible adapt this.
											- You
											 might need to use the vendor tools running from under the proprietary BIOS to wipe the Flash chip holding the IPMI firmware,
											 if it's baked in. (on KGPE-D16, it's an add-on card so just don't add the add-on card - also SOIC-16 according to tpearson. but not sure what form factor used on S8230 - it better not be bl***y WSON).

											SAS controller requires firmware, but optional. (same thing on KGPE-D16). Board also has SATA, so it's fine.
											NOTE: SAS firmware is already flashed onto the SAS controller, to a dedicated chip. Not uploaded/handled by coreboot or linux kernel.

											tpearson says: power control circuits are a potential issue, not a definite one. it all depends on how Tyan decided to wire things up
											if they engineered things properly, it should actually be transparent.
											ASUS did not, and required work to get it going (see the notes document)

							Lenovo G505S (works without CPU microcode updates).
							Videos BIOS is not yet fully replaced (openatom doesn't have a working framebuffer, yet, but
							it can draw a bitmap in user space, using a special utility) -
							openatom in github.
							SMU needs replacing (ruik/funfuctor/patrickg/mrnuke might be able to help).

							F2A85-M and E350M1 (libreboot_*_headless.rom). Test openatom (video BIOS replacement). SMU firmware is a problem. XHCI firmware is a problem.

Look into the rockchip (rk3288. note: mali gpu. one or two blobs might need replacing.
								see this page
								for example) and IBM 'POWER8' platforms - NOTE: ARM systems use the depthcharge payload
								which afaik is free-sw. For GRUB, see https://wiki.linaro.org/LEG/Engineering/Grub2

									asus chromebook c201. paulk is working on it. See libreboot mailing list post
									https://lists.nongnu.org/archive/html/libreboot/2015-08/msg00009.html for
									details

									http://review.coreboot.org/#/c/11112/(merged)

									http://review.coreboot.org/#/c/11113/

									http://review.coreboot.org/#/c/11114/

									http://review.coreboot.org/#/c/11116/

									http://review.coreboot.org/#/c/11115/(merged)

									http://review.coreboot.org/#/c/11117/

									http://review.coreboot.org/#/c/11119/

									http://review.coreboot.org/#/c/11118/(merged)

									http://git.code.paulk.fr/gitweb/?p=depthcharge.git;a=shortlog;h=refs/heads/next

									http://git.code.paulk.fr/gitweb/?p=depthcharge.git;a=commit;h=5ca76d1cb8fda74c93a6c65dab8a776d72e1f61a

									http://git.code.paulk.fr/gitweb/?p=depthcharge.git;a=commit;h=01c61f3c0ca96d49c2d33e0bf93e1d4779664011

									http://git.paulk.fr/gitweb/?p=embedded-freedom-scripts.git;a=summary
									http://www.chromium.org/chromium-os/chromiumos-design-docs/firmware-boot-and-recovery

									http://www.chromium.org/chromium-os/chromiumos-design-docs/verified-boot

									http://www.chromium.org/chromium-os/chromiumos-design-docs/verified-boot-crypto

There may be others

This list needs to expand!

					That doesn't mean Intel is off the table just yet:

							Intel D510MO motherboard (desktop), pineview chipset. damo22 got raminit working, and is working on finishing the port for coreboot.
							southbridge NM10 (basically rebranded ich7).
							not sure about video init (does it have native graphics initialization?). TODO: review it for libreboot once damo22 pushes
							the code to coreboot for review. damo22 says it should work with several CPUs (Atom D510 D525 N5x etc - but he's unsure).
							TODO: find other boards similar that could be ported. damo22's one has an Intel Atom D510 CPU.

							ThinkPad W500: they all use switchable graphics (ATI+Intel). Unknown if PM45 is compatible with GM45.

							ThinkPad X61: ICH8, i965
							lubko in #coreboot. https://github.com/lkundrak/coreboot/tree/x61
							- raminit still isn't done, there might be other parts that need to be finished (probably EC).
							This system comes with a ME, but it's optional like in GM45, and can be removed.

T61: http://review.coreboot.org/#/c/8482/

							ThinkPad R60, Z61 - probably very similar to X60/T60, with few modifications required
							(probably only the changes based on logs acquired by following
							http://www.coreboot.org/Motherboard_Porting_Guide)

							Non-lenovo GM45 laptops:

								Dell Latitude E6400 - quite a few of these online. This is a good laptop to target in coreboot and libreboot.
								NOTE: EC support. ALSO: DDR2 memory (coreboot raminit for GM45 currently only supports DDR3)

							Desktop system: Dell Optiplex 755. There are lots of these available online.
							ICH9. DDR2 RAM (needs work in coreboot). No EC (it's a desktop). It will require
							quite a bit of work in coreboot, but this is a very good candidate.
							The ME can probably be removed and disabled, using ich9gen without any modifications
							(or with few modifications). Where are the datasheets? Schematics?

Back to top of page.

Platform-specific bugs

					Several serious bugs exist on the ThinkPad R500, which makes
					the system virtually unusable. See hcl/r500/index.html#issues.

					GM45: investigate S3/raminit on all models (CPU stepping/cpuid).
					See hcl/x200.html#ram_s3_microcode

					all thinkpads: When the system is running, plugging in an ethernet cable
					doesn't always work (no network), you have to try several times. Booting with
					an ethernet cable attached is reliable. Debug this and fix it.

					KFSN4-DRE: investigate the 30 second bootblock delay.
					More info

					KFSN4-DRE: jittery text-mode graphics.
					More info

					Fix these issues on GM45/GS45 targets:

							X200: text-mode is broken. only framebuffer graphics work. Git-bisect is needed.

							X60: on the latest coreboot-libre update lately (during June 2015), keyboard works intermittently.
							Bisect and fix.

							X200/X60: battery drained even while system is "off" on some systems. investigate.
							Could just be the Ethernet controller waiting for a Wake-on-LAN frame.
							'ethtool -s net0 wol d' disables wake on lan until the next boot. There are a lot of ways to make it permanent: netctl. systemd, udev, cron
							- wake on lan was tested, and isn't the issue. It is probably how coreboot handles power off state
							(see the code that handles power_on_after_fail)

							Sound (internal speaker) broken on T500 (works in lenovobios). external speaker/headphones work.
							- probably a different hda_verb
							- different HDA verbs are now used, test this again
							- worked while system was disassambled, but booted (loose), stopped working when re-assembling. Not sure what's going on here.

							Fix remaining incompatible LCD panels in native graphics on T500 and T400.
							See hcl/gm45_lcd.html.
							- EDID related, or difference in how VGA ROM does init. Investigate.

							T400/T500/R400 (tested on T400): UART (serial port) doesn't work. Investigate.
							(already tried enabling early h8 dock option. some RE with superiotool is needed).
							- kmalkki has an R400. He says he can be contracted for it. (try to DIY first)

					Finish all work listed in future/index.html

					Fix these issues on i945 targets (X60/T60/macbook21)

							i945: fix VRAM size (currently 8MB. should be 64MB).
							See future/index.html#i945_vram_size.

							Fix remaining incompatible LCD panels in native graphics on T60.
							See future/index.html#lcd_i945_incompatibility.
							- EDID related, or difference in how VGA ROM does init. Investigate.

							i945: the intel video driver used to initialize the display without native graphics initialization
							and without the extracted video BIOS. It no longer does, so investigate why it does not, and fix
							the regression (fix has to be done in the kernel, Linux).
							See http://www.coreboot.org/pipermail/coreboot/2014-June/078104.html and
							http://www.coreboot.org/pipermail/coreboot/2014-June/078105.html

							Add fake_vbt tables on i945 systems (also GM45).

							Commit 26ca08caf81ad2dcc9c8246a743d82ffb464c767 in coreboot, see the while (1) loop that
							waits for the panel to power up on i945. This is an infinite loop if the panel doesn't power up.
							Fix it. Also, are there panels that don't power up? Test this, and fix it.

					Look into the notes an http://www.thinkwiki.org/wiki/Problem_with_high_pitch_noises

Back to top of page.

			Flashing from lenovobios to libreboot (and vice versa)

					mtjm says: francis7: please add this issue to your current tasks list (inspired by what GNUtoo-irssi wrote): have the script for flashing from Lenovo BIOS verify that the image is swapped (i.e. last 64 KiB is just 0xff bytes, second to last 64 KiB isn't) and fail before writing to flash if it isn't

					Implement everything outlined in
					hcl/gm45_remove_me.html#demefactory
					and test it.

Back to top of page.

Payloads

					Add ProteanOS payload to systems with big enough flash chips. (eg X200/R400).
					This page (outdated, but still useful according to the maintainer) has some info:
					http://www.proteanos.com/doc/plat/porting/.
					pehjota says that once the port is done, prokit can be modified to generate the entire
					distribution as a vmlinuz and initrd.img file.

Back to top of page.

Build system

Patch the coreboot build system, so that version information is still reliably generated
				(e.g. in the logs), which is currently lacking because libreboot deletes the .git directory
				(because the git history contains the deleted blobs, so libreboot has to delete it). It could
				just be a small patch that hardcodes the coreboot version information, for that coreboot version,
				each time libreboot rebases on a new version of coreboot.

				patrickg says: francis7: we have you covered: have your libreboot script add a file ".coreboot-version" to the top-level directory, containing the appropriate version number information. that will be used if git describe doesn't work (eg. because .git is missing)

Make memtest86+ build using coreboot's own crossgcc toolchain. Currently,
				memtest86+ doesn't even work at all when cross-compiled using the toolchain in x86-64 trisquel7

					Make libreboot (all of it!) build reproducibly. This is very important.

Talk to h01ger in coreboot about the coreboot part (he did reproducible.debian.net/coreboot/coreboot.html

							h01ger says ------ fchmmr: please keep the reproducible-builds@lists.alioth.debian.org mailing list posted - i'm aware of http://projects.mtjm.eu/work_packages/16 :-)

https://reproducible.debian.net/coreboot/coreboot.html

							check coreboot mailing list, eg:
							http://www.coreboot.org/pipermail/coreboot/2015-June/079994.html

							Check GRUB in Debian (or GRUB upstream) for how to make that reproducible
							if Debian has done this already (they are working on reproducible builds)
							- h01ger says reproducible.debian.net/grub2

							https://wiki.debian.org/ReproducibleBuilds

							Join #debian-reproducible on OFTC IRC.

							merged in master (coreboot) - pay attention to these, especially
							the fact that the reproducibility relies on git (libreboot uses coreboot without git,
							and the reason makes this unavoidable):
							http://review.coreboot.org/#/c/8616/
							http://review.coreboot.org/#/c/8617/
							http://review.coreboot.org/#/c/8618/
							http://review.coreboot.org/#/c/8619/

							not yet merged in master (coreboot:
							http://review.coreboot.org/#/c/10515/ --
							not really relevant yet, but will be in the future. (libreboot currently ignores SeaBIOS)

Back to top of page.

Improvements to the utilities

					Make ich9gen/ich9deblob portable. They both rely extensively on bitfields, and they assume
					little-endian; for instance, mapping a little endian file directly to a struct, instead
					of serializing/deserializing. Re-factor both utilities and make them fully portable.

					Make ich9gen/ich9deblob/demefactory show GPL license info via --version argument.

					Adapt linux-libre deblob scripts for use with coreboot. Libreboot is already deblobbed
					using its own script, but updating it is still a bit too manual. linux-libre's deblob
					scripts do an excellent job and (adapted) will make it much easier to maintain coreboot-libre.

Back to top of page.

			BeagleBone Black

Get libre distros ported to it. Eg proteanos, trisquel, parabola, librecmc and so on.

See BBB screwdriver - from the coreboot
				project, this is an openwrt-based image for the BBB that comes with EHCI enabled out of the box.
				Look into re-basing that on librecmc (librecmc is a deblobbed version of openwrt).

Back to top of page.

Documentation improvements

					Next release after 20150518, relating to the ASUS KFSN4-DRE:

Remove the notes in docs/release.html that say NOTE: not in libreboot 20150518. Only in git, for now.

Remove the note in docs/hcl/kfsn4-dre.html that says  NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you must build for it from source using the libreboot git repository.

Remove the note in docs/hcl/r500.html that says  NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you must build for it from source using the libreboot git repository.

					Next release after 20150518: note, mention that ACPI brightness methods for X60/T60 work again.

					Get /proc/ioports for all hw logs. (this was added to Motherboard Porting Guide recently)
					- other instructions were also added there. basically, get whatever extra logs are
					desirable, for all systems.

					Add info about FTDI 	FT232H usbdebug (BBB could be used for this):
					http://review.coreboot.org/#/c/10063

					Add information from hw registers on all boards.
					Get them for the following remaining boards: X60, T60, macbook21, R400

					Add guides for GM45 laptops in docs/security/

					Add guides for GM45 laptops in docs/hardware/

					Convert documentation to use Latex (or whatever the GNU project requires) as source.

					LPC (eg PLCC socket) flashing guide is needed:
					image,
					image,
					image -
					work with mrnuke on getting info about vultureprog PLCC flashing into libreboot. Libreboot needs
					server boards. https://github.com/mrnuke/vultureprog,
					https://github.com/mrnuke/qiprog,
					https://github.com/mrnuke/vultureprog-hardware.
					He also uses the sigrok logic analyzer (free/libre):
					http://www.dx.com/p/logic-analyzer-w-dupont-lines-and-usb-cable-for-scm-black-148945

Back to top of page.

Project (institutional) improvements

					Add proper guidelines for contributions,
					like Development Guidelines on the coreboot wiki. For instance, require
					Sign-off-by in all commits for libreboot. Consulting with the FSF about this
					(licensing@fsf.org).

					Libreboot needs to be factory firmware, not the replacement. It needs to be *the* firmware.
					Consult with the openlunchbox project (and maybe others) on getting hardware manufactured
					with libreboot support (out of the box, from the factory).
					- rhombus tech might be interesting to contact (also projects like novena, and so on).
					eg http://rhombus-tech.net/community_ideas/laptop_15in/news/
					- also see http://elinux.org/Embedded_Open_Modular_Architecture/EOMA-68

					Set up a routine (project-wise) for testing each system with the latest kernel version.

					Define properly how to maintain libreboot (things to look out for, things to do on a release). It's somewhat
					documented now, but it's not perfect. Delegate tasks (to people that are reliable).

Back to top of page.

EC firmware

				http://www.coreboot.org/Embedded_controller
				Replace this on all libreboot targets. Some laptops use an extra SPI flash chip for the EC, some
				have EC in the main chip, some don't use SPI flash at all but have the firmware inside the EC chip itself.
				If the EC has integrated flash then you need to be able to get to the pins on the chip or be able to program them over LPC or SPI (if they have that feature).
				The lenovo laptops currently supported in libreboot all use H8 EC chips (contains flash inside the chip).
				Read the datasheets on how to externally flash the EC. Chromebooks seem to have free EC
				(https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/).
				- see
				http://blogs.coreboot.org/blog/2015/05/28/progress-gsoc-week-1/ (H8S EC, applies to thinkpads)

				https://github.com/lynxis/h8s-ec
				https://events.ccc.de/congress/2010/Fahrplan/events/4174.en.html

				https://archive.org/details/27c3-4174-en-the_hidden_nemesis

Back to top of page.

			Copyright ©  2014, 2015 Francis Rowe <info@gluglug.org.uk>

			Permission is granted to copy, distribute and/or modify this document
			under the terms of the GNU Free Documentation License, Version 1.3
			or any later version published by the Free Software Foundation;
			with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
			A copy of the license can be found at gfdl-1.3.txt

			Updated versions of the license (when available) can be found at
			https://www.gnu.org/licenses/licenses.html

			UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
			EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
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			TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
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repo_name: Amlouden/libreboot

license: mit


code:
#!/bin/bash

#  download script: Download the programs used in libreboot, that
#                   aren't distributed in the git repository.
#
#	Copyright (C) 2014, 2015 Francis Rowe <info@gluglug.org.uk>
#	Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
#
#    This program is free software: you can redistribute it and/or modify
#    it under the terms of the GNU General Public License as published by
#    the Free Software Foundation, either version 3 of the License, or
#    (at your option) any later version.
#
#    This program is distributed in the hope that it will be useful,
#    but WITHOUT ANY WARRANTY; without even the implied warranty of
#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
#    GNU General Public License for more details.
#
#    You should have received a copy of the GNU General Public License
#    along with this program.  If not, see <http://www.gnu.org/licenses/>.
#

[ "x${DEBUG+set}" = 'xset' ] && set -v
set -u -e

download="resources/scripts/helpers/download"

# echo "${programs##*/}" ; echo "${programs%/*}"
programs="$(for program in ${download}/*; do printf "%s\n" "${program##*/}"; done)"

noconfirm="0"

help () {
	printf "%s\n\n" "./download program(s) # programs are space separated, if specifing multiple programs"
	printf "possible values for 'programs':\nall:\n%s\n\n" "${programs}"
	printf "Example (download everything): ./download all\n"
	printf "Example (download flashrom): ./download flashrom\n"
	printf "Example (download coreboot): ./download coreboot\n"
	printf "Example (download coreboot and flashrom): ./download coreboot flashrom\n"
	printf "Example (lists all available downloadable components): ./download list\n"
}

if [ $# -lt 1 ]; then
	printf "ERROR: download script: no argument given.\n"
	help
	exit 1
fi

if [ "${1}" = "--noconfirm" ] || [ "${1}" = "-y" ]; then
	noconfirm="1"
	shift 1
fi

case "${1}" in
	all)
		;;
	list)
		printf "possible values for 'programs':\nall\n%s\n\n" "${programs}"
		exit
		;;
	help)
		help
		exit
		;;
	*)
		for program in "${@}"; do
			printf "%s" "${programs}\n" | grep -wq "${program}" || (printf "ERROR: Invalid program '%s'. See ./download help.\n" "${program}"; exit 1)
		done
		programs="${*}"
		;;
esac

for program in ${programs}; do

	if [ "${noconfirm}" = "0" ]; then
		printf "Use \"./download --noconfirm\" or \"./download -y\" if you want to be rid of these confirmation dialogues.\n\n"
		if [ -d "${program}/" ]; then
			printf "A %s/ directory already exists, delete it? [yN]: " "${program}"
			read -r answer
			if [ "${answer}" = "y" ]; then
				rm -Rf "${program:?}" && printf "Old %s directory deleted.\n\n" "${program}"
			else
				printf "%s directory not deleted, and therefore not replaced.\n" "${program}"
				continue
			fi
		fi
	fi

	"${download}/${program}"
done

path: download


code:
#!/bin/bash

#  flash script: uses flashrom to flash a libreboot ROM image
#
#	Copyright (C) 2014, 2015 Francis Rowe <info@gluglug.org.uk>
#
#    This program is free software: you can redistribute it and/or modify
#    it under the terms of the GNU General Public License as published by
#    the Free Software Foundation, either version 3 of the License, or
#    (at your option) any later version.
#
#    This program is distributed in the hope that it will be useful,
#    but WITHOUT ANY WARRANTY; without even the implied warranty of
#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
#    GNU General Public License for more details.
#
#    You should have received a copy of the GNU General Public License
#    along with this program.  If not, see <http://www.gnu.org/licenses/>.
#

# So that I one day find it again
# http://pubs.opengroup.org/onlinepubs/9699919799/utilities/V3_chap02.html#tag_18_06_02

## Don't add here. errors are expected.
[ "x${DEBUG+set}" = 'xset' ] && set -v
# set -u -e

if [ ${EUID} -ne 0 ]; then
   printf "This script must be run as root\n"
   exit 1
fi

arch="unknown"
if [ "$(uname -i)" = "i686" ] || [ "$(uname -m)" = "i686" ]; then
	arch="i686"
elif [ "$(uname -i)" = "x86_64" ] || [ "$(uname -m)" = "x86_64" ]; then
	arch="x86_64"
else
	printf "This script must be run on an i686 or x86_64 host. x86_64 is recommended.\n"
	exit 1
fi

usage="usage: ./flash mode path/to/yourrom.rom"
availablemodes="update, forceupdate, i945lenovo_firstflash, i945lenovo_secondflash, i945apple_firstflash"

mode="unknown"
rompath="unknown"

# User specified no or too few/many parameters
if [ $# -lt 2 ]; then
	printf "%s\n" "${usage}"
	printf "You need to specify exactly one mode, and one file\n"
	printf "%s\n" "${availablemodes}"
	exit 1
fi

mode="${1}"
rompath="${2}"

# User specified an invalid mode of operation
if [ "${mode}" != "update" ] && [ "${mode}" != "forceupdate" ] && [ "${mode}" != "i945lenovo_firstflash" ] && [ "${mode}" != "i945lenovo_secondflash" ] && [ "${mode}" != "i945apple_firstflash" ]; then
	printf "%s\n" "${usage}"
	printf "Invalid mode. Modes available: %s\n" "${availablemodes}"
	exit 1
else
	printf "Mode selected: %s\n" "${mode}"
fi

# The specified file does not exist
if [ ! -f "${rompath}" ]; then
	printf "File not found!\n"
	exit 1
fi

flashrom="unknown"
if [ -f "build" ]; then
	# git or libreboot_src
	flashrom="./flashrom/flashrom"
else
	# libreboot_util
	flashrom="./flashrom/${arch}/flashrom"
fi
if [ ! -f "${flashrom}" ]; then
	printf "flashrom binary not present\n"
	exit 1
fi

# i945 lenovobios
bucts="unknown"
flashrom_lenovobios_sst="unknown"
flashrom_lenovobios_macronix="unknown"
if [ "${mode}" = "i945lenovo_firstflash" ] || [ "${mode}" = "i945lenovo_secondflash" ]; then
	if [ -f "build" ]; then
		# git or libreboot_src
		bucts="./bucts/bucts"
		flashrom_lenovobios_sst="./flashrom/flashrom_lenovobios_sst"
		flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_macronix"
	else
		# libreboot_util
		bucts="./bucts/${arch}/bucts"
		flashrom_lenovobios_sst="./flashrom/${arch}/flashrom_lenovobios_sst"
		flashrom_lenovobios_macronix="./flashrom/${arch}/flashrom_lenovobios_macronix"
	fi

	# anti-bricking precaution
	if [ ! -f "${bucts}" ]; then
		printf "bucts binary not present. ABORTING so as to protect against bricking the system.\n"
		exit 1
	fi

	# fail if flashrom is not present
	if [ ! -f "${flashrom_lenovobios_sst}" ] || [ ! -f "${flashrom_lenovobios_macronix}" ]; then
		printf "Flashrom binaries not present.\n"
		exit 1
	fi
fi

if [ "${mode}" = "update" ]; then
	${flashrom} -p internal -w "${rompath}"
elif [ "${mode}" = "forceupdate" ]; then
	${flashrom} -p internal:boardmismatch=force,laptop=force_I_want_a_brick -w "${rompath}"
elif [ "${mode}" = "i945apple_firstflash" ]; then
	${flashrom} -p internal:laptop=force_I_want_a_brick -w "${rompath}"
elif [ "${mode}" = "i945lenovo_firstflash" ]; then
	${bucts} 1 # needed to prevent bricks.
	# One will fail (this is harmless), and the other will succeed.
	${flashrom_lenovobios_sst} -p internal -w "${rompath}"
	${flashrom_lenovobios_macronix} -p internal -w "${rompath}"
elif [ "${mode}" = "i945lenovo_secondflash" ]; then
	${flashrom} -p internal:laptop=force_I_want_a_brick -w "${rompath}"
	${bucts} 0
fi

path: flash


code:
From 63312528ea81207865077ab2c75963e3660859f0 Mon Sep 17 00:00:00 2001
From: Francis Rowe <info@gluglug.org.uk>
Date: Sat, 14 Feb 2015 00:56:43 +0000
Subject: [PATCH] Makefile: don't use git

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 68541e6..b5f43d5 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 CC:=gcc
 OBJ:=bucts.o
-VERSION:=$(shell git describe)
+VERSION:=withoutgit

 ifeq ($(shell uname), FreeBSD)
 	CFLAGS = -I/usr/local/include
--
1.9.1


code:
diff --git a/Makefile b/Makefile
index 68541e6..b8579eb 100644
--- a/Makefile
+++ b/Makefile
@@ -10,7 +10,7 @@ endif
 all: bucts

 bucts: $(OBJ)
-	$(CC) -o $@ $(OBJ) $(LDFLAGS) -lpci
+	$(CC) -o $@ $(OBJ) $(LDFLAGS) -lpci -lz -static

 %.o: %.c
 	$(CC) $(CFLAGS) -DVERSION='"$(VERSION)"' -c $<


code:
From d4179b662170543bf78e09431e3b880222d324dd Mon Sep 17 00:00:00 2001
From: "Patrick \"P. J.\" McDermott" <pj@pehjota.net>
Date: Thu, 11 Jun 2015 07:00:08 -0400
Subject: [PATCH] Add board enable for Libiquity Taurinus X200

Signed-off-by: Patrick "P. J." McDermott <pj@pehjota.net>
---
 board_enable.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board_enable.c b/board_enable.c
index 31984e3..640d392 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -2433,6 +2433,7 @@ const struct board_match board_matches[] = {
 	{0x8086, 0x3B07, 0x17AA, 0x2166,  0x8086, 0x3B30, 0x17AA, 0x2167, "^Lenovo X201", NULL, NULL,         P2, "IBM/Lenovo",  "ThinkPad X201",         0,   OK, p2_whitelist_laptop},
 	{0x8086, 0x1E22, 0x17AA, 0x21FA,  0x8086, 0x1E55, 0x17AA, 0x21FA, "^ThinkPad X230", NULL, NULL,       P2, "IBM/Lenovo",  "ThinkPad X230",         0,   OK, p2_whitelist_laptop},
 	{0x8086, 0x27A0, 0x17AA, 0x2017,  0x8086, 0x27B9, 0x17AA, 0x2009, "^ThinkPad X60", NULL, NULL,        P2, "IBM/Lenovo",  "ThinkPad X60(s)",       0,   OK, p2_whitelist_laptop},
+	{0x8086, 0x2917, 0x17AA, 0x20F5,  0x8086, 0x2930, 0x17AA, 0x20F9, "^Taurinus X200", "Libiquity", "Taurinus X200", P2, "Libiquity", "ThinkPad X200", 0, OK, p2_whitelist_laptop},
 	{0x8086, 0x2411, 0x8086, 0x2411,  0x8086, 0x7125, 0x0e11, 0xb165, NULL,         NULL, NULL,           P3, "Mitac",       "6513WU",                0,   OK, board_mitac_6513wu},
 	{0x8086, 0x8186, 0x8086, 0x8186,  0x8086, 0x8800,      0,      0, "^MSC Vertriebs GmbH$", NULL, NULL, P2, "MSC",         "Q7-TCTC",               0,   OK, p2_not_a_laptop},
 	{0x8086, 0x7190,      0,      0,  0x8086, 0x7110,      0,      0, "^MS-6163 (i440BX)$", NULL, NULL,   P3, "MSI",         "MS-6163 (MS-6163 Pro)", 0,   OK, intel_piix4_gpo14_raise},
--
2.1.4


code:
--- flashchips.c	2014-12-30 01:59:49.846383043 +0000
+++ flashchips.c.i945lenovobios_macronix	2014-12-30 02:05:16.060000647 +0000
@@ -6605,12 +6605,12 @@
 		.name		= "MX25L1605D/MX25L1608D/MX25L1673E",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= MACRONIX_ID,
-		.model_id	= MACRONIX_MX25L1605,
+		.model_id	= 0x14,
 		.total_size	= 2048,
 		.page_size	= 256,
 		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_OK_PREW,
-		.probe		= probe_spi_rdid,
+		.probe		= probe_spi_res1,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
 		{
@@ -6630,7 +6630,7 @@
 		},
 		.printlock	= spi_prettyprint_status_register_bp3_srwd, /* bit6: Continuously Program (CP) mode */
 		.unlock		= spi_disable_blockprotect,
-		.write		= spi_chip_write_256,
+		.write		= spi_chip_write_1,
 		.read		= spi_chip_read, /* Fast read (0x0B), dual I/O supported */
 		.voltage	= {2700, 3600},
 	},


code:
--- flashchips.c	2014-12-30 01:59:49.846383043 +0000
+++ flashchips.c.i945lenovobios_sst	2014-12-30 02:03:51.367580645 +0000
@@ -10886,12 +10886,12 @@
 		.name		= "SST25VF016B",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= SST_ID,
-		.model_id	= SST_SST25VF016B,
+		.model_id	= 0x41,
 		.total_size	= 2048,
 		.page_size	= 256,
 		.feature_bits	= FEATURE_WRSR_EITHER,
 		.tested		= TEST_OK_PREW,
-		.probe		= probe_spi_rdid,
+		.probe		= probe_spi_res2,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
 		{
@@ -10914,7 +10914,7 @@
 		},
 		.printlock	= spi_prettyprint_status_register_sst25vf016,
 		.unlock		= spi_disable_blockprotect,
-		.write		= spi_aai_write,
+		.write		= spi_chip_write_1,
 		.read		= spi_chip_read,
 		.voltage	= {2700, 3600},
 	},


code:
diff --git a/flashchips.c b/flashchips.c
index c722a64..4124023 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7038,80 +7038,6 @@ const struct flashchip flashchips[] = {

 	{
 		.vendor		= "Macronix",
-		.name		= "MX25L1605",
-		.bustype	= BUS_SPI,
-		.manufacture_id	= MACRONIX_ID,
-		.model_id	= MACRONIX_MX25L1605,
-		.total_size	= 2048,
-		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
-		.tested		= TEST_OK_PREW,
-		.probe		= probe_spi_rdid,
-		.probe_timing	= TIMING_ZERO,
-		.block_erasers	=
-		{
-			{
-				.eraseblocks = { {64 * 1024, 32} },
-				.block_erase = spi_block_erase_20,
-			}, {
-				.eraseblocks = { {64 * 1024, 32} },
-				.block_erase = spi_block_erase_d8,
-			}, {
-				.eraseblocks = { {2 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_60,
-			}, {
-				.eraseblocks = { {2 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_c7,
-			},
-		},
-		.printlock	= spi_prettyprint_status_register_bp2_srwd, /* bit6: error flag */
-		.unlock		= spi_disable_blockprotect,
-		.write		= spi_chip_write_256,
-		.read		= spi_chip_read, /* Fast read (0x0B) supported */
-		.voltage	= {2700, 3600},
-	},
-
-	{
-		.vendor		= "Macronix",
-		.name		= "MX25L1605A/MX25L1606E/MX25L1608E",
-		.bustype	= BUS_SPI,
-		.manufacture_id	= MACRONIX_ID,
-		.model_id	= MACRONIX_MX25L1605,
-		.total_size	= 2048,
-		.page_size	= 256,
-		/* OTP: 64B total; enter 0xB1, exit 0xC1 (MX25L1606E and MX25L1608E only) */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
-		.tested		= TEST_OK_PREW,
-		.probe		= probe_spi_rdid,
-		.probe_timing	= TIMING_ZERO,
-		.block_erasers	=
-		{
-			{
-				.eraseblocks = { {4 * 1024, 512} },
-				.block_erase = spi_block_erase_20,
-			}, {
-				.eraseblocks = { {64 * 1024, 32} },
-				.block_erase = spi_block_erase_52,
-			}, {
-				.eraseblocks = { {64 * 1024, 32} },
-				.block_erase = spi_block_erase_d8,
-			}, {
-				.eraseblocks = { {2 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_60,
-			}, {
-				.eraseblocks = { {2 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_c7,
-			},
-		},
-		.printlock	= spi_prettyprint_status_register_bp3_srwd, /* MX25L1605A bp2 only */
-		.unlock		= spi_disable_blockprotect_bp3_srwd,
-		.write		= spi_chip_write_256,
-		.read		= spi_chip_read, /* Fast read (0x0B) supported (MX25L1608E supports dual-I/O read) */
-		.voltage	= {2700, 3600},
-	},
-
-	{
-		.vendor		= "Macronix",
 		.name		= "MX25L1605D/MX25L1608D/MX25L1673E",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= MACRONIX_ID,
@@ -7219,41 +7145,6 @@ const struct flashchip flashchips[] = {

 	{
 		.vendor		= "Macronix",
-		.name		= "MX25L3205(A)",
-		.bustype	= BUS_SPI,
-		.manufacture_id	= MACRONIX_ID,
-		.model_id	= MACRONIX_MX25L3205,
-		.total_size	= 4096,
-		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
-		.tested		= TEST_OK_PREW,
-		.probe		= probe_spi_rdid,
-		.probe_timing	= TIMING_ZERO,
-		.block_erasers	=
-		{
-			{
-				.eraseblocks = { {64 * 1024, 64} },
-				.block_erase = spi_block_erase_20,
-			}, {
-				.eraseblocks = { {64 * 1024, 64} },
-				.block_erase = spi_block_erase_d8,
-			}, {
-				.eraseblocks = { {4 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_60,
-			}, {
-				.eraseblocks = { {4 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_c7,
-			},
-		},
-		.printlock	= spi_prettyprint_status_register_bp2_srwd, /* bit6: error flag */
-		.unlock		= spi_disable_blockprotect,
-		.write		= spi_chip_write_256,
-		.read		= spi_chip_read, /* Fast read (0x0B) supported */
-		.voltage	= {2700, 3600},
-	},
-
-	{
-		.vendor		= "Macronix",
 		.name		= "MX25L3205D/MX25L3208D",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= MACRONIX_ID,
@@ -7290,84 +7181,6 @@ const struct flashchip flashchips[] = {

 	{
 		.vendor		= "Macronix",
-		.name		= "MX25L3206E/MX25L3208E",
-		.bustype	= BUS_SPI,
-		.manufacture_id	= MACRONIX_ID,
-		.model_id	= MACRONIX_MX25L3205,
-		.total_size	= 4096,
-		.page_size	= 256,
-		/* OTP: 64B total; enter 0xB1, exit 0xC1 */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
-		.tested		= TEST_OK_PREW,
-		.probe		= probe_spi_rdid,
-		.probe_timing	= TIMING_ZERO,
-		.block_erasers	=
-		{
-			{
-				.eraseblocks = { {4 * 1024, 1024} },
-				.block_erase = spi_block_erase_20,
-			}, {
-				.eraseblocks = { {64 * 1024, 64} },
-				.block_erase = spi_block_erase_d8,
-			}, {
-				.eraseblocks = { {64 * 1024, 64} },
-				.block_erase = spi_block_erase_52,
-			}, {
-				.eraseblocks = { {4 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_60,
-			}, {
-				.eraseblocks = { {4 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_c7,
-			},
-		},
-		.printlock	= spi_prettyprint_status_register_bp3_srwd,
-		.unlock		= spi_disable_blockprotect_bp3_srwd,
-		.write		= spi_chip_write_256,
-		.read		= spi_chip_read, /* Fast read (0x0B) and dual I/O supported */
-		.voltage	= {2700, 3600},
-	},
-
-	{
-		.vendor		= "Macronix",
-		.name		= "MX25L3273E",
-		.bustype	= BUS_SPI,
-		.manufacture_id	= MACRONIX_ID,
-		.model_id	= MACRONIX_MX25L3205,
-		.total_size	= 4096,
-		.page_size	= 256,
-		/* OTP: 64B total; enter 0xB1, exit 0xC1 */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
-		.tested		= TEST_UNTESTED,
-		.probe		= probe_spi_rdid,
-		.probe_timing	= TIMING_ZERO,
-		.block_erasers	=
-		{
-			{
-				.eraseblocks = { {4 * 1024, 1024} },
-				.block_erase = spi_block_erase_20,
-			}, {
-				.eraseblocks = { {32 * 1024, 128} },
-				.block_erase = spi_block_erase_52,
-			}, {
-				.eraseblocks = { {64 * 1024, 64} },
-				.block_erase = spi_block_erase_d8,
-			}, {
-				.eraseblocks = { {4 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_60,
-			}, {
-				.eraseblocks = { {4 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_c7,
-			},
-		},
-		.printlock	= spi_prettyprint_status_register_bp3_srwd,
-		.unlock		= spi_disable_blockprotect_bp3_srwd,
-		.write		= spi_chip_write_256,
-		.read		= spi_chip_read, /* Fast read (0x0B) and dual I/O supported */
-		.voltage	= {2700, 3600},
-	},
-
-	{
-		.vendor		= "Macronix",
 		.name		= "MX25L3235D",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= MACRONIX_ID,
@@ -7404,42 +7217,6 @@ const struct flashchip flashchips[] = {

 	{
 		.vendor		= "Macronix",
-		.name		= "MX25L6405",
-		.bustype	= BUS_SPI,
-		.manufacture_id	= MACRONIX_ID,
-		.model_id	= MACRONIX_MX25L6405,
-		.total_size	= 8192,
-		.page_size	= 256,
-		/* Has an additional 512B EEPROM sector */
-		.feature_bits	= FEATURE_WRSR_WREN,
-		.tested		= TEST_OK_PREW,
-		.probe		= probe_spi_rdid,
-		.probe_timing	= TIMING_ZERO,
-		.block_erasers	=
-		{
-			{
-				.eraseblocks = { {64 * 1024, 128} },
-				.block_erase = spi_block_erase_20,
-			}, {
-				.eraseblocks = { {64 * 1024, 128} },
-				.block_erase = spi_block_erase_d8,
-			}, {
-				.eraseblocks = { {8 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_60,
-			}, {
-				.eraseblocks = { {8 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_c7,
-			}
-		},
-		.printlock	= spi_prettyprint_status_register_bp3_srwd, /* bit6: error flag */
-		.unlock		= spi_disable_blockprotect_bp3_srwd,
-		.write		= spi_chip_write_256,
-		.read		= spi_chip_read, /* Fast read (0x0B) supported */
-		.voltage	= {2700, 3600},
-	},
-
-	{
-		.vendor		= "Macronix",
 		.name		= "MX25L6405D",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= MACRONIX_ID,
@@ -7476,86 +7253,6 @@ const struct flashchip flashchips[] = {

 	{
 		.vendor		= "Macronix",
-		.name		= "MX25L6406E/MX25L6408E",
-		.bustype	= BUS_SPI,
-		.manufacture_id	= MACRONIX_ID,
-		.model_id	= MACRONIX_MX25L6405,
-		.total_size	= 8192,
-		.page_size	= 256,
-		/* MX25L6406E supports SFDP */
-		/* OTP: 06E 64B total; enter 0xB1, exit 0xC1 */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
-		.tested		= TEST_OK_PREW,
-		.probe		= probe_spi_rdid,
-		.probe_timing	= TIMING_ZERO,
-		.block_erasers	=
-		{
-			{
-				.eraseblocks = { {4 * 1024, 2048} },
-				.block_erase = spi_block_erase_20,
-			}, {
-				.eraseblocks = { {64 * 1024, 128} },
-				.block_erase = spi_block_erase_52,
-			}, {
-				.eraseblocks = { {64 * 1024, 128} },
-				.block_erase = spi_block_erase_d8,
-			}, {
-				.eraseblocks = { {8 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_60,
-			}, {
-				.eraseblocks = { {8 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_c7,
-			}
-		},
-		.printlock	= spi_prettyprint_status_register_bp3_srwd,
-		.unlock		= spi_disable_blockprotect_bp3_srwd,
-		.write		= spi_chip_write_256,
-		.read		= spi_chip_read, /* Fast read (0x0B), dual I/O read supported */
-		.voltage	= {2700, 3600},
-	},
-
-	{
-		.vendor		= "Macronix",
-		.name		= "MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E",
-		.bustype	= BUS_SPI,
-		.manufacture_id	= MACRONIX_ID,
-		.model_id	= MACRONIX_MX25L6405,
-		.total_size	= 8192,
-		.page_size	= 256,
-		/* supports SFDP */
-		/* OTP: 512B total; enter 0xB1, exit 0xC1 */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
-		.tested		= TEST_OK_PREW,
-		.probe		= probe_spi_rdid,
-		.probe_timing	= TIMING_ZERO,
-		.block_erasers	=
-		{
-			{
-				.eraseblocks = { {4 * 1024, 2048} },
-				.block_erase = spi_block_erase_20,
-			}, {
-				.eraseblocks = { {32 * 1024, 256} },
-				.block_erase = spi_block_erase_52,
-			}, {
-				.eraseblocks = { {64 * 1024, 128} },
-				.block_erase = spi_block_erase_d8,
-			}, {
-				.eraseblocks = { {8 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_60,
-			}, {
-				.eraseblocks = { {8 * 1024 * 1024, 1} },
-				.block_erase = spi_block_erase_c7,
-			}
-		},
-		.printlock	= spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */
-		.unlock		= spi_disable_blockprotect_bp3_srwd,
-		.write		= spi_chip_write_256,
-		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
-		.voltage	= {2700, 3600},
-	},
-
-	{
-		.vendor		= "Macronix",
 		.name		= "MX25L12805D",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= MACRONIX_ID,


code:
Copyright (C) 2014, 2015 Francis Rowe <info@gluglug.org.uk>
Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>

path: resources/grub/config/AUTHORS


code:
set prefix=(memdisk)/boot/grub

insmod nativedisk
insmod ehci
insmod ohci
insmod uhci
insmod usb
insmod usbserial_pl2303
insmod usbserial_ftdi
insmod usbserial_usbdebug

# Serial and keyboard configuration, very important.
serial --speed=115200 --unit=0 --word=8 --parity=no --stop=1
terminal_input --append  serial
terminal_output --append serial
terminal_input --append at_keyboard
terminal_output --append cbmemc

gfxpayload=keep
terminal_output --append gfxterm

# Default to first option, automatically boot after 1 second
set default="0"
set timeout=1

# This is useful when using 'cat' on long files on GRUB terminal
set pager=1

# # Play a beep on startup
# play 480 440 1


code:
insmod jpeg

background_image (cbfsdisk)/background.png
loadfont (memdisk)/dejavusansmono.pf2


code:
set prefix=(memdisk)/boot/grub

set root='cbfsdisk'
source (cbfsdisk)/grub.cfg


code:
menuentry 'Load Operating System' {
	insmod ahci
	insmod part_msdos
	insmod part_gpt
	# Iterate through all possible disks and partitions
	for i in 0 1; do
		# Look for fully encrypted disks, prompt for passphrase if successful
		cryptomount "(ahci${i})"
		# Check for filesystems replacing MBR/GPT at all, e.g. BTRFS or ZFS
		x="(crypto${i})"
		set root=${x}
		for p in "grub/libreboot_" "boot/grub/libreboot_" "grub/" "boot/grub/"; do
			if [ -f "${x}/${p}grub.cfg" ] ; then
				configfile /${p}grub.cfg
			fi
		done
		for j in 0 1 2 3 4 5 6 7 8 9; do
		# Check for normal MBR/GPT disks
		# GPT allows more than 4 partitions, /boot on /dev/sda7 is highly unlikely but still possible
			# /boot can still be encrypted
			for k in "crypto" "ahci"; do
				x="(${k}${i},${j})"
				set root=${x}
				for p in "grub/libreboot_" "boot/grub/libreboot_" "grub/" "boot/grub/"; do
					if [ -f "${x}/${p}grub.cfg" ] ; then
						configfile /${p}grub.cfg
					fi
				done
			done
		done
	done

# Last resort, otherwise go to GRUB shell
	set root='ahci0,1'
	for p in "/" "/boot/"; do
		if [ -f "${p}vmlinuz" ] ; then
			linux ${p}vmlinuz root=/dev/sda1 rw
			if [ -f "${p}initrd.img" ] ; then
				initrd ${p}initrd.img
			fi
		fi
	done
}
menuentry 'Parse ISOLINUX menu (SATA)' {
	insmod ahci
	insmod part_msdos
	insmod part_gpt
	for i in 0 1; do
		# Check for filesystems replacing MBR/GPT at all, e.g. BTRFS or ZFS
		set root="(ahci${i})"
		for p in "/isolinux" "/syslinux"; do
			if [ -f "${p}${p}.cfg" ] ; then
				syslinux_configfile -i ${p}${p}.cfg
			elif [ -f "/boot${p}${p}.cfg" ] ; then
				syslinux_configfile -i /boot${p}${p}.cfg
			fi
		done
		# Check for normal MBR/GPT disks
		# GPT allows more than 4 partitions, /boot on /dev/sda7 is highly unlikely but still possible
		for j in 0 1 2 3 4 5 6 7 8 9; do
			set root="(ahci${i},${j})"
			for p in "/isolinux" "/syslinux"; do
				if [ -f "${p}${p}.cfg" ] ; then
					syslinux_configfile -i ${p}${p}.cfg
				elif [ -f "/boot${p}${p}.cfg" ] ; then
					syslinux_configfile -i /boot${p}${p}.cfg
				fi
			done
		done
	done
}
menuentry 'Parse ISOLINUX menu (USB)' {
	insmod usbms
	insmod part_msdos
	insmod part_gpt
	for i in 0 1; do
		# Check for filesystems replacing MBR/GPT at all, e.g. BTRFS or ZFS
		set root="(usb${i})"
		for p in "/isolinux" "/syslinux"; do
			if [ -f "${p}${p}.cfg" ] ; then
				syslinux_configfile -i ${p}${p}.cfg
					elif [ -f "/boot${p}${p}.cfg" ] ; then
				syslinux_configfile -i /boot${p}${p}.cfg
			fi
		done
		# Check for normal MBR/GPT disks
		# GPT allows more than 4 partitions, /boot on /dev/sda7 is highly unlikely but still possible
		for j in 0 1 2 3 4 5 6 7 8 9; do
			set root="(usb${i},${j})"
			for p in "/isolinux" "/syslinux"; do
				if [ -f "${p}${p}.cfg" ] ; then
					syslinux_configfile -i ${p}${p}.cfg
				elif [ -f "/boot${p}${p}.cfg" ] ; then
					syslinux_configfile -i /boot${p}${p}.cfg
				fi
			done
		done
	done
}
menuentry 'Parse ISOLINUX menu (CD/DVD)' {
	insmod ahci
	insmod ata
	insmod iso9660
	for x in (ata0) (ahci1); do
		set root=${x}
		for p in "/isolinux" "/syslinux"; do
			if [ -f "${p}${p}.cfg" ] ; then
				syslinux_configfile -i ${p}${p}.cfg
			elif [ -f "/boot${p}${p}.cfg" ] ; then
				syslinux_configfile -i /boot${p}${p}.cfg
			fi
		done
	done
}
menuentry 'Switch to grubtest.cfg' {
	set root='cbfsdisk'
	configfile (cbfsdisk)/grubtest.cfg
}
menuentry 'Search for GRUB configuration (grub.cfg) outside of CBFS' {
	insmod ahci
	insmod usbms
	insmod part_msdos
	insmod part_gpt
	for i in ahci0 usb0 usb1; do
		for j in 1 2 3 4 5 6 7 8 9; do
			x="(${i},${j})"
			for p in "grub" "boot/grub" "grub2" "boot/grub2"; do
				if [ -f "${x}/${p}/grub.cfg" ] ; then
					submenu "Load Config from ${x}" ${x} {
						root=$2
						source /${p}/grub.cfg
						unset superusers
					}
				fi
			done
		done
	done
}
menuentry 'Poweroff' {
halt
}
menuentry 'Reboot' {
reboot
}


code:
menuentry 'Load MemTest86+' {
	set root='memdisk'
	chainloader /memtest
}


code:
abysta at yandex.ru
Adrian Schroeter
Aleksey Chalabyan
Andrey Valentinovich Panov
Ben Laenen
Besarion Gugushvili
Bhikkhu Pesala
Clayborne Arevalo
Dafydd Harries
Danilo Segan
Davide Viti
David Jez
David Lawrence Ramsey
Denis Jacquerye
Dwayne Bailey
Eugeniy Meshcheryakov
Gee Fung Sit
Heikki Lindroos
James Cloos
James Crippen
John Karp
Keenan Pepper
Lars Naesbye Christensen
Lior Halphon
MaEr
Mashrab Kuvatov
Max Berger
Mederic Boquien
Michael Everson
MihailJP
Misu Moldovan
Nguyen Thai Ngoc Duy
Nicolas Mailhot
Norayr Chilingarian
Ognyan Kulev
Ondrej Koala Vacha
Peter Cernak
Remy Oudompheng
Roozbeh Pournader
Rouben Hakobian
Sahak Petrosyan
Sander Vesik
Stepan Roh
Stephen Hartke
Steve Tinney
Tavmjong Bah
Thomas Henlich
Tim May
Valentin Stoykov
Vasek Stodulka
Wesley Transue
Yoshiki Ohshima

$Id: AUTHORS 2495 2011-11-14 22:56:26Z noct_dreamer $


code:
See http://dejavu.sourceforge.net/wiki/index.php/Bugs

$Id: BUGS 80 2004-11-13 13:12:02Z src $