code:
---
title: ThinkPad T60 Recovery guide
...

This section documents how to recover from a bad flash that prevents
your ThinkPad T60 from booting.

Table of Contents
-----------------

-   Types of brick:
    -   [Brick type 1: bucts not reset](#bucts_brick)
    -   [Brick type 2: bad rom (or user error), system won't
        boot](#recovery)

Brick type 1: bucts not reset. {#bucts_brick}
==============================

You still have Lenovo BIOS, or you had libreboot running and you flashed
another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if
Lenovo BIOS was present and libreboot wasn't flashed.\
\
In this case, unbricking is easy: reset BUC.TS to 0 by removing that
yellow cmos coin (it's a battery) and putting it back after a minute or
two:\
![](../images/t60_dev/0006.JPG)\
\
\*Those dd commands should be applied to all newly compiled T60 ROM
images (the ROM images in libreboot binary archives already have this
applied!):\
dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s
coreboot.rom) - 0x10000\] count=64k\
dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\]
count=64k | hexdump\
dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s
coreboot.rom) - 0x20000\] count=64k conv=notrunc\
(doing this makes the ROM suitable for use when flashing a system that
still has Lenovo BIOS running, using those instructions:
<http://www.coreboot.org/Board:lenovo/x60/Installation>. (it says x60,
but instructions for t60 are identical)

bad rom (or user error), system won't boot {#recovery}
===========================================

In this scenario, you compiled a ROM that had an incorrect
configuration, or there is an actual bug preventing your system from
booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash
while Lenovo BIOS was running. In any case, your system is bricked and
will not boot at all.

"Unbricking" means flashing a known-good (working) ROM. The problem:
you can't boot the system, making this difficult. In this situation,
external hardware (see hardware requirements above) is needed which can
flash the SPI chip (where libreboot resides).

Remove those screws and remove the HDD:\
![](../images/t60_dev/0001.JPG) ![](../images/t60_dev/0002.JPG)

Lift off the palm rest:\
![](../images/t60_dev/0003.JPG)

Lift up the keyboard, pull it back a bit, flip it over like that and
then disconnect it from the board:\
![](../images/t60_dev/0004.JPG) ![](../images/t60_dev/0005.JPG)
![](../images/t60_dev/0006.JPG)

Gently wedge both sides loose:\
![](../images/t60_dev/0007.JPG) ![](../images/t60_dev/0008.JPG)

Remove that cable from the position:\
![](../images/t60_dev/0009.JPG) ![](../images/t60_dev/0010.JPG)

Now remove that bezel. Remove wifi, nvram battery and speaker connector
(also remove 56k modem, on the left of wifi):\
![](../images/t60_dev/0011.JPG)

Remove those screws:\
![](../images/t60_dev/0012.JPG)

Disconnect the power jack:\
![](../images/t60_dev/0013.JPG)

Remove nvram battery:\
![](../images/t60_dev/0014.JPG)

Disconnect cable (for 56k modem) and disconnect the other cable:\
![](../images/t60_dev/0015.JPG) ![](../images/t60_dev/0016.JPG)

Disconnect speaker cable:\
![](../images/t60_dev/0017.JPG)

Disconnect the other end of the 56k modem cable:\
![](../images/t60_dev/0018.JPG)

Make sure you removed it:\
![](../images/t60_dev/0019.JPG)

Unscrew those:\
![](../images/t60_dev/0020.JPG)

Make sure you removed those:\
![](../images/t60_dev/0021.JPG)

Disconnect LCD cable from board:\
![](../images/t60_dev/0022.JPG)

Remove those screws then remove the LCD assembly:\
![](../images/t60_dev/0023.JPG) ![](../images/t60_dev/0024.JPG)
![](../images/t60_dev/0025.JPG)

Once again, make sure you removed those:\
![](../images/t60_dev/0026.JPG)

Remove the shielding containing the motherboard, then flip it over.
Remove these screws, placing them on a steady surface in the same layout
as they were in before you removed them. Also, you should mark each
screw hole after removing the screw (a permanent marker pen will do),
this is so that you have a point of reference when re-assembling the
system:\
![](../images/t60_dev/0027.JPG) ![](../images/t60_dev/0028.JPG)
![](../images/t60_dev/0029.JPG) ![](../images/t60_dev/0031.JPG)
![](../images/t60_dev/0032.JPG) ![](../images/t60_dev/0033.JPG)

Now wire up the BBB and the Pomona with your PSU.\
Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for
flashing.\
**Note, the guide mentions a 3.3v DC PSU but you don't need this on the
T60: if you don't have or don't want to use an external PSU, then make
sure not to connect the 3.3v leads mentioned in the guide; instead,
connect the AC adapter (the one that normally charges your battery) so
that the board has power (but don't boot it up)**\
![](../images/t60_dev/0030.JPG)\
Correlate the following with the BBB guide linked above:

    POMONA 5250:
    ===  DVD drive ====
     18              -       - 1
     22              -       - NC               ---- RAM is on this end
     NC              -       - 21
     3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
    ===  audio jacks ===
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

Connect the pomona from the BBB to the flash chip. No pics
unfortunately. (use the text diagram above).

Flashrom binaries for ARM (tested on a BBB) are distributed in
libreboot\_util. Alternatively, libreboot also distributes flashrom
source code which can be built.

SSH'd into the BBB:\
\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w
yourrom.rom**

It should be **Verifying flash\... VERIFIED** at the end. If flashrom
complains about multiple flash chip definitions detected, then choose
one of them following the instructions in the output.

Put those screws back:\
![](../images/t60_dev/0047.JPG)

Put it back into lower chassis:\
![](../images/t60_dev/0048.JPG)

Attach LCD and insert screws (also, attach the lcd cable to the board):\
![](../images/t60_dev/0049.JPG)

Insert those screws:\
![](../images/t60_dev/0050.JPG)

On the CPU (and there is another chip south-east to it, sorry forgot to
take pic) clean off the old thermal paste (with the alcohol) and apply
new (Artic Silver 5 is good, others are good too) you should also clean
the heatsink the same way\
![](../images/t60_dev/0051.JPG)

Attach the heatsink and install the screws (also, make sure to install
the AC jack as highlighted):\
![](../images/t60_dev/0052.JPG)

Reinstall that upper bezel:\
![](../images/t60_dev/0053.JPG)

Do that:\
![](../images/t60_dev/0054.JPG) ![](../images/t60_dev/0055.JPG)

Re-attach modem, wifi, (wwan?), and all necessary cables. Sorry, forgot
to take pics. Look at previous removal steps to see where they go back
to.

Attach keyboard and install nvram battery:\
![](../images/t60_dev/0056.JPG) ![](../images/t60_dev/0057.JPG)

Place keyboard and (sorry, forgot to take pics) reinstall the palmrest
and insert screws on the underside:\
![](../images/t60_dev/0058.JPG)

It lives!\
![](../images/t60_dev/0071.JPG) ![](../images/t60_dev/0072.JPG)
![](../images/t60_dev/0073.JPG)

Always stress test ('stress -c 2' and xsensors. below 90C is ok) when
replacing cpu paste/heatsink:\
![](../images/t60_dev/0074.JPG)

Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)


code:
---
title: Flashing the X200 with a BeagleBone Black
...

Initial flashing instructions for X200.

This guide is for those who want libreboot on their ThinkPad X200 while
they still have the original Lenovo BIOS present. This guide can also be
followed (adapted) if you brick your X200, to know how to recover.

-   [X200 laptops with libreboot pre-installed](#preinstall)
-   [Flash chips](#flashchips)
-   [MAC address](#macaddress)
-   [Initial BBB configuration and installation procedure](#clip)
-   [Boot it!](#boot)
-   [Wifi](#wifi)
-   [wwan](#wwan)
-   [Memory](#memory)
-   [X200S and X200 Tablet users: GPIO33 trick will not work.](#gpio33)

X200 laptops with libreboot pre-installed {#preinstall}
=========================================

If you don't want to install libreboot yourself, companies exist that
sell these laptops with libreboot pre-installed, along with a free
GNU+Linux distribution.

Flash chip size {#flashchips}
===============

Use this to find out:
    # flashrom -p internal -V

The X200S and X200 Tablet will use a WSON-8 flash chip, on the bottom of
the motherboard (this requires removal of the motherboard). **Not all
X200S/X200T are supported; see
[../hardware/x200.html\#x200s](../hardware/x200.html#x200s).**

MAC address {#macaddress}
===========

On the X200/X200S/X200T, the MAC address for the onboard gigabit
ethernet chipset is stored inside the flash chip, along with other
configuration data.

Keep a note of the MAC address before disassembly; this is very
important, because you will need to insert this into the libreboot ROM
image before flashing it. It will be written in one of these locations:

![](images/x200/disassembly/0002.jpg)
![](images/x200/disassembly/0001.jpg)

Initial BBB configuration {#clip}
=========================

Refer to [bbb\_setup.md](bbb_setup.md) for how to set up the BBB for
flashing.

The following shows how to connect the clip to the BBB (on the P9
header), for SOIC-16 (clip: Pomona 5252):

    POMONA 5252 (correlate with the BBB guide)
    ===  front (display) on your X200 ====
     NC              -       - 21
     1               -       - 17
     NC              -       - NC
     NC              -       - NC
     NC              -       - NC
     NC              -       - NC
     18              -       - 3.3V (PSU)
     22              -       - NC - this is pin 1 on the flash chip
    ===  back (palmrest) on your X200 ===
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
    Here is a photo of the SOIC-16 flash chip. Pins are labelled:

The following shows how to connect the clip to the BBB (on the P9
header), for SOIC-8 (clip: Pomona 5250):

    POMONA 5250 (correlate with the BBB guide)
    ===  left side of the X200 (where the VGA port is) ====
     18              -       - 1
     22              -       - NC
     NC              -       - 21
     3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip. in front of it is the screen.
    ===  right side of the X200 (where the audio jacks are) ===
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
    Here is a photo of the SOIC-8 flash chip. The pins are labelled:

    Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16
    chip on those pins?

**On the X200S and X200 Tablet the flash chip is underneath the board,
in a WSON package. The pinout is very much the same as a SOIC-8, except
you need to solder (there are no clips available).\
The following image shows how this is done:**\
![](images/x200/wson_soldered.jpg "Copyright 2014 Steve Shenton <sgsit@libreboot.org> see license notice at the end of this document")\
In this image, a pin header was soldered onto the WSON. Another solution
might be to de-solder the WSON-8 chip and put a SOIC-8 there instead.
Check the list of SOIC-8 flash chips at
[../hardware/gm45\_remove\_me.html\#flashchips](../hardware/gm45_remove_me.md#flashchips)
but do note that these are only 4MiB (32Mb) chips. The only X200 SPI
chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case,
the X201 SOIC-8 flash chip (Macronix 25L6445E) might work.

The procedure
-------------

This section is for the X200. This does not apply to the X200S or X200
Tablet (for those systems, you have to remove the motherboard
completely, since the flash chip is on the other side of the board).

Remove these screws:\
![](images/x200/disassembly/0003.jpg)

Push the keyboard forward, gently, then lift it off and disconnect it
from the board:\
![](images/x200/disassembly/0004.jpg)
![](images/x200/disassembly/0005.jpg)

Pull the palm rest off, lifting from the left and right side at the back
of the palm rest:\
![](images/x200/disassembly/0006.jpg)

Lift back the tape that covers a part of the flash chip, and then
connect the clip:\
![](images/x200/disassembly/0007.jpg)
![](images/x200/disassembly/0008.jpg)

On pin 2 of the BBB, where you have the ground (GND), connect the ground
to your PSU:\
![](images/x200/disassembly/0009.jpg)
![](images/x200/disassembly/0010.jpg)

Connect the 3.3V supply from your PSU to the flash chip (via the clip):\
![](images/x200/disassembly/0011.jpg)
![](images/x200/disassembly/0012.jpg)

Of course, make sure that your PSU is also plugged in and turn on:\
![](images/x200/disassembly/0013.jpg)

This tutorial tells you to use an ATX PSU, for the 3.3V DC supply. The
PSU used when taking these photos is actually not an ATX PSU, but a PSU
that is designed specifically for providing 3.3V DC (an ATX PSU will
also work):\
![](images/x200/disassembly/0014.jpg)

Now, you should be ready to install libreboot.

Flashrom binaries for ARM (tested on a BBB) are distributed in
libreboot\_util. Alternatively, libreboot also distributes flashrom
source code which can be built.

Log in as root on your BBB, using the instructions in
[bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access).

Test that flashrom works:
    # ./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512
In this case, the output was:

    flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
    flashrom is free software, get the source code at http://www.flashrom.org
    Calibrating delay loop... OK.
    Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
    Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi.
    Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi.
    Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
    Please specify which chip definition to use with the -c <chipname> option.

How to backup factory.rom (change the -c option as neeed, for your flash
chip):\
\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r
factory.rom**\
\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r
factory1.rom**\
\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r
factory2.rom**\
Note: the **-c** option is not required in libreboot's patched
flashrom, because the redundant flash chip definitions in *flashchips.c*
have been removed.\
Now compare the 3 images:

    # sha512sum factory\*.rom
If the hashes match, then just copy one of them (the factory.rom) to a
safe place (on a drive connected to another system, not the BBB). This
is useful for reverse engineering work, if there is a desirable
behaviour in the original firmware that could be replicated in coreboot
and libreboot.

Follow the instructions at
[../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen)
to change the MAC address inside the libreboot ROM image, before
flashing it. Although there is a default MAC address inside the ROM
image, this is not what you want. **Make sure to always change the MAC
address to one that is correct for your system.**

Now flash it:\
\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w
path/to/libreboot/rom/image.rom -V**

![](images/x200/disassembly/0015.jpg)

You might see errors, but if it says **Verifying flash\... VERIFIED** at
the end, then it's flashed and should boot. If you see errors, try
again (and again, and again); the message **Chip content is identical to
the requested image** is also an indication of a successful
installation.

Example output from running the command (see above):

    flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
    flashrom is free software, get the source code at http://www.flashrom.org
    Calibrating delay loop... OK.
    Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
    Reading old flash chip contents... done.
    Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
    ERASE FAILED!
    Reading current flash chip contents... done. Looking for another erase function.
    Erase/write done.
    Verifying flash... VERIFIED.

Wifi
====

The X200 typically comes with an Intel wifi chipset, which does not work
without proprietary software. For a list of wifi chipsets that work
without proprietary software, see
[../hardware/\#recommended\_wifi](../hardware/#recommended_wifi).

Some X200 laptops come with an Atheros chipset, but this is 802.11g
only.

It is recommended that you install a new wifi chipset. This can only be
done after installing libreboot, because the original firmware has a
whitelist of approved chips, and it will refuse to boot if you use an
'unauthorized' wifi card.

The following photos show an Atheros AR5B95 being installed, to replace
the Intel chip that this X200 came with:\
![](images/x200/disassembly/0016.jpg)
![](images/x200/disassembly/0017.jpg)

WWAN
====

If you have a WWAN/3G card and/or sim card reader, remove them
permanently. The WWAN-3G card has proprietary firmware inside; the
technology is identical to what is used in mobile phones, so it can also
track your movements.

Not to be confused with wifi (wifi is fine).

Memory
======

You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs
(speed/size). Non-matching pairs won't work. You can also install a
single module (meaning, one of the slots will be empty) in slot 0.

NOTE: according to users repors, non matching pairs (e.g. 1+2 GiB) might
work in some cases.

Make sure that the RAM you buy is the 2Rx8 density.

In this photo, 8GiB of RAM (2x4GiB) is installed:\
![](images/x200/disassembly/0018.jpg)

Boot it! {#boot}
--------

You should see something like this:

![](images/x200/disassembly/0019.jpg)

Now [install GNU+Linux](../gnulinux/).

X200S and X200 Tablet users: GPIO33 trick will not work. {#gpio33}
--------------------------------------------------------

sgsit found out about a pin called GPIO33, which can be grounded to
disable the flashing protections by the descriptor and stop the ME from
starting (which itself interferes with flashing attempts). The theory
was proven correct; however, it is still useless in practise.

Look just above the 7 in TP37 (that's GPIO33):\
![](../hardware/images/x200/gpio33_location.jpg)

By default we would see this in lenovobios, when trying flashrom -p
internal -w rom.rom:

    FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only.
    FREG2: Warning: Management Engine region (0x00001000-0x005f5fff) is locked.

With GPIO33 grounded during boot, this disabled the flash protections as
set by descriptor, and stopped the ME from starting. The output changed
to:

    The Flash Descriptor Override Strap-Pin is set. Restrictions implied by
    the Master Section of the flash descriptor are NOT in effect. Please note
    that Protected Range (PR) restrictions still apply.

The part in bold is what got us. This was still observed:

    PR0: Warning: 0x007e0000-0x01ffffff is read-only.
    PR4: Warning: 0x005f8000-0x005fffff is locked.

It is actually possible to disable these protections. Lenovobios does,
when updating the BIOS (proprietary one). One possible way to go about
this would be to debug the BIOS update utility from Lenovo, to find out
how it's disabling these protections. Some more research is available
here:
<http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research>

On a related note, libreboot has a utility that could help with
investigating this:
[../hardware/gm45\_remove\_me.html\#demefactory](../hardware/gm45_remove_me.md#demefactory)

Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)

repo_name: termsofservitude/libreboot

license: mit


code:
---
title: ThinkPad X60 Recovery guide
...

This section documents how to recover from a bad flash that prevents
your ThinkPad X60 from booting.

Table of Contents
=================

-   Types of brick:
    -   [Brick type 1: bucts not reset](#bucts_brick)
    -   [Brick type 2: bad rom (or user error), system won't
        boot](#recovery)

Brick type 1: bucts not reset. {#bucts_brick}
==============================

You still have Lenovo BIOS, or you had libreboot running and you flashed
another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if
Lenovo BIOS was present and libreboot wasn't flashed.\
\
In this case, unbricking is easy: reset BUC.TS to 0 by removing that
yellow cmos coin (it's a battery) and putting it back after a minute or
two:\
![](../images/x60_unbrick/0004.jpg)\
\
\*Those dd commands should be applied to all newly compiled X60 ROM
images (the ROM images in libreboot binary archives already have this
applied!):\
dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s
coreboot.rom) - 0x10000\] count=64k\
dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\]
count=64k | hexdump\
dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s
coreboot.rom) - 0x20000\] count=64k conv=notrunc\
(doing this makes the ROM suitable for use when flashing a system that
still has Lenovo BIOS running, using those instructions:
<http://www.coreboot.org/Board:lenovo/x60/Installation>.

bad rom (or user error), system won't boot {#recovery}
===========================================

In this scenario, you compiled a ROM that had an incorrect
configuration, or there is an actual bug preventing your system from
booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash
while Lenovo BIOS was running. In any case, your system is bricked and
will not boot at all.

"Unbricking" means flashing a known-good (working) ROM. The problem:
you can't boot the system, making this difficult. In this situation,
external hardware (see hardware requirements above) is needed which can
flash the SPI chip (where libreboot resides).

Remove those screws:\
![](../images/x60_unbrick/0000.jpg)

Push the keyboard forward (carefully):\
![](../images/x60_unbrick/0001.jpg)

Lift the keyboard up and disconnect it from the board:\
![](../images/x60_unbrick/0002.jpg)

Grab the right-hand side of the chassis and force it off (gently) and
pry up the rest of the chassis:\
![](../images/x60_unbrick/0003.jpg)

You should now have this:\
![](../images/x60_unbrick/0004.jpg)

Disconnect the wifi antenna cables, the modem cable and the speaker:\
![](../images/x60_unbrick/0005.jpg)

Unroute the cables along their path, carefully lifting the tape that
holds them in place. Then, disconnect the modem cable (other end) and
power connection and unroute all the cables so that they dangle by the
monitor hinge on the right-hand side:\
![](../images/x60_unbrick/0006.jpg)

Disconnect the monitor from the motherboard, and unroute the grey
antenna cable, carefully lifting the tape that holds it into place:\
![](../images/x60_unbrick/0008.jpg)

Carefully lift the remaining tape and unroute the left antenna cable so
that it is loose:\
![](../images/x60_unbrick/0009.jpg)

Remove the screw that is highlighted (do NOT remove the other one; it
holds part of the heatsink (other side) into place):\
![](../images/x60_unbrick/0011.jpg)

Remove those screws:\
![](../images/x60_unbrick/0012.jpg)

Carefully remove the plate, like so:\
![](../images/x60_unbrick/0013.jpg)

Remove the SATA connector:\
![](../images/x60_unbrick/0014.jpg)

Now remove the motherboard (gently) and cast the lcd/chassis aside:\
![](../images/x60_unbrick/0015.jpg)

Lift back that tape and hold it with something. Highlighted is the SPI
flash chip:\
![](../images/x60_unbrick/0016.jpg)

Now wire up the BBB and the Pomona with your PSU.\
Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for
flashing.\
**Note, the guide mentions a 3.3v DC PSU but you don't need this on the
X60: if you don't have or don't want to use an external PSU, then make
sure not to connect the 3.3v leads mentioned in the guide; instead,
connect the AC adapter (the one that normally charges your battery) so
that the board has power (but don't boot it up)**
![](../images/x60_unbrick/0017.jpg)\
Correlate the following with the BBB guide linked above:

    POMONA 5250:
    ===  golden finger and wifi switch ====
     18              -       - 1
     22              -       - NC                    ---------- audio jacks are on this end
     NC              -       - 21
     3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
    ===  CPU fan ===
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

Connecting the BBB and pomona (in this image, an external 3.3v DC PSU
was used):\
![](images/x60/th_bbb_flashing.jpg)

Flashrom binaries for ARM (tested on a BBB) are distributed in
libreboot\_util. Alternatively, libreboot also distributes flashrom
source code which can be built.

SSH'd into the BBB:\
\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w
yourrom.rom**

It should be **Verifying flash\... VERIFIED** at the end. If flashrom
complains about multiple flash chip definitions detected, then choose
one of them following the instructions in the output.

Remove the programmer and put it away somewhere. Put back the tape and
press firmly over it:\
![](../images/x60_unbrick/0026.jpg)

Your empty chassis:\
![](../images/x60_unbrick/0027.jpg)

Put the motherboard back in:\
![](../images/x60_unbrick/0028.jpg)

Reconnect SATA:\
![](../images/x60_unbrick/0029.jpg)

Put the plate back and re-insert those screws:\
![](../images/x60_unbrick/0030.jpg)

Re-route that antenna cable around the fan and apply the tape:\
![](../images/x60_unbrick/0031.jpg)

Route the cable here and then (not shown, due to error on my part)
reconnect the monitor cable to the motherboard and re-insert the
screws:\
![](../images/x60_unbrick/0032.jpg)

Re-insert that screw:\
![](../images/x60_unbrick/0033.jpg)

Route the black antenna cable like so:\
![](../images/x60_unbrick/0034.jpg)

Tuck it in neatly like so:\
![](../images/x60_unbrick/0035.jpg)

Route the modem cable like so:\
![](../images/x60_unbrick/0036.jpg)

Connect modem cable to board and tuck it in neatly like so:\
![](../images/x60_unbrick/0037.jpg)

Route the power connection and connect it to the board like so:\
![](../images/x60_unbrick/0038.jpg)

Route the antenna and modem cables neatly like so:\
![](../images/x60_unbrick/0039.jpg)

Connect the wifi antenna cables. At the start of the tutorial, this
system had an Intel wifi chip. Here you see I've replaced it with an
Atheros AR5B95 (supports 802.11n and can be used without blobs):\
![](../images/x60_unbrick/0040.jpg)

Connect the modem cable:\
![](../images/x60_unbrick/0041.jpg)

Connect the speaker:\
![](../images/x60_unbrick/0042.jpg)

You should now have this:\
![](../images/x60_unbrick/0043.jpg)

Re-connect the upper chassis:\
![](../images/x60_unbrick/0044.jpg)

Re-connect the keyboard:\
![](../images/x60_unbrick/0045.jpg)

Re-insert the screws that you removed earlier:\
![](../images/x60_unbrick/0046.jpg)

Power on!\
![](../images/x60_unbrick/0047.jpg)

Operating system:\
![](../images/x60_unbrick/0049.jpg)

Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)


code:
From 34270811fce1ecf0bcf3b1363b0dc3dbf284ab09 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Wed, 10 Jun 2015 22:53:28 +0000
Subject: flash script: fix a really really really dumb mistake

---
diff --git a/flash b/flash
index c96b915..04fd274 100755
--- a/flash
+++ b/flash
@@ -95,12 +95,12 @@ if [ "$mode" = "i945lenovo_firstflash" ] || [ "$mode" = "i945lenovo_secondflash"
 		# git or libreboot_src
 		bucts="./bucts/bucts"
 		flashrom_lenovobios_sst="./flashrom/flashrom_lenovobios_sst"
-		flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_sst"
+		flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_macronix"
 	else
 		# libreboot_util
 		bucts="./bucts/$arch/bucts"
 		flashrom_lenovobios_sst="./flashrom/$arch/flashrom_lenovobios_sst"
-		flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_sst"
+		flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_macronix"
 	fi

 	# anti-bricking precaution
--
cgit v0.9.0.2


code:
---
title: ThinkPad X60 Tablet Recovery guide
...

This section documents how to recover from a bad flash that prevents
your ThinkPad X60 Tablet from booting.

Table of Contents
-----------------

-   Types of brick:
    -   [Brick type 1: bucts not reset](#bucts_brick)
    -   [Brick type 2: bad rom (or user error), system won't
        boot](#recovery)

Brick type 1: bucts not reset. {#bucts_brick}
==============================

You still have Lenovo BIOS, or you had libreboot running and you flashed
another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if
Lenovo BIOS was present and libreboot wasn't flashed.\
\
In this case, unbricking is easy: reset BUC.TS to 0 by removing that
yellow cmos coin (it's a battery) and putting it back after a minute or
two:\
![](../images/x60t_unbrick/0008.JPG)\
\
\*Those dd commands should be applied to all newly compiled X60 ROM
images (the ROM images in libreboot binary archives already have this
applied!):\
dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s
coreboot.rom) - 0x10000\] count=64k\
dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\]
count=64k | hexdump\
dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s
coreboot.rom) - 0x20000\] count=64k conv=notrunc\
(doing this makes the ROM suitable for use when flashing a system that
still has Lenovo BIOS running, using those instructions:
<http://www.coreboot.org/Board:lenovo/x60/Installation>.

bad rom (or user error), system won't boot {#recovery}
===========================================

In this scenario, you compiled a ROM that had an incorrect
configuration, or there is an actual bug preventing your system from
booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash
while Lenovo BIOS was running. In any case, your system is bricked and
will not boot at all.

"Unbricking" means flashing a known-good (working) ROM. The problem:
you can't boot the system, making this difficult. In this situation,
external hardware (see hardware requirements above) is needed which can
flash the SPI chip (where libreboot resides).

![](../images/x60t_unbrick/0000.JPG)

Remove those screws:\
![](../images/x60t_unbrick/0001.JPG)

Remove the HDD:\
![](../images/x60t_unbrick/0002.JPG)

Push keyboard forward to loosen it:\
![](../images/x60t_unbrick/0003.JPG)

Lift:\
![](../images/x60t_unbrick/0004.JPG)

Remove those:\
![](../images/x60t_unbrick/0005.JPG)

![](../images/x60t_unbrick/0006.JPG)

Also remove that (marked) and unroute the antenna cables:\
![](../images/x60t_unbrick/0007.JPG)

For some X60T laptops, you have to unroute those too:\
![](../images/x60t_unbrick/0010.JPG)

Remove the LCD extend board screws. Also remove those screws (see blue
marks) and remove/unroute the cables and remove the metal plate:\
![](../images/x60t_unbrick/0008.JPG)

Remove that screw and then remove the board:\
![](../images/x60t_unbrick/0009.JPG)

Now wire up the BBB and the Pomona with your PSU.\
Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for
flashing.\
**Note, the guide mentions a 3.3v DC PSU but you don't need this on the
X60 Tablet: if you don't have or don't want to use an external PSU,
then make sure not to connect the 3.3v leads mentioned in the guide;
instead, connect the AC adapter (the one that normally charges your
battery) so that the board has power (but don't boot it up)**
![](../images/x60t_unbrick/0011.JPG)\
Correlate the following with the BBB guide linked above:

    POMONA 5250:
    ===  golden finger and wifi switch ====
     18              -       - 1
     22              -       - NC                    ---------- audio jacks are on this end
     NC              -       - 21
     3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
    ===  CPU fan ===
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

Connecting the BBB and pomona (in this image, an external 3.3v DC PSU
was used):\
![](images/x60/th_bbb_flashing.jpg)

Flashrom binaries for ARM (tested on a BBB) are distributed in
libreboot\_util. Alternatively, libreboot also distributes flashrom
source code which can be built.

SSH'd into the BBB:\
\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w
yourrom.rom**

It should be **Verifying flash\... VERIFIED** at the end. If flashrom
complains about multiple flash chip definitions detected, then choose
one of them following the instructions in the output.

Reverse the steps to re-assemble your system.

Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)


code:
---
title: EHCI debugging on the BeagleBone Black
...

EHCI debugging
==============

1.  [Find USB port on the target that supports EHCI
    debug](#FindUSBportonthetargetthatsupportsEHCIdebug)

2.  [Initial setup of BBB to act as EHCI debug
    dongle](#InitialsetupofBBBtoactasEHCIdebugdongle)
3.  [Patch BBB's `g_dbgp` module (optional, but highly
    recommended)](#PatchBBBsgdbgpmoduleoptionalbuthighlyrecommended)
4.  [Configure libreboot with EHCI
    debug](#ConfigurelibrebootwithEHCIdebug)
    1.  [Selecting `HCD Index` and
        `USB Debug port`](#SelectingHCDIndexandUSBDebugport)
5.  [How to get the debug logs](#Howtogetthedebuglogs)
6.  [Eneble EHCI Debug on the target's kernel (optional,
    recommended)](#EnebleEHCIDebugonthetargetskerneloptionalrecommended)
7.  [References](#References)

**NOTE: this documentation may be outdated, and discusses configuring
EHCI debug on the default Debian system that the BBB sometimes comes
with. If you want an easier time, just use [BBB
ScrewDriver](https://www.coreboot.org/BBB_screwdriver) which comes
pre-configured.**

If your computer does not boot after installing libreboot, it is very
useful to get debug logs from it, from the payload (grub) and/or the
kernel (if gets to there). All of them stream debug logs on the
available serial (RS-232) by default. However, most of todays laptops
lack RS-232 port. The other option is to stream the logs to USB EHCI
debug port.

This section explains step-by-step how to setup BBB as a “USB EHCI debug
dongle” and configure libreboot and the linux kernel to stream logs to
it (TODO: grub).

I will refer to three computers:

-   **host** - this is the computer you use, have tools, compiler,
    Internet, etc
-   **BBB** - Beaglebone Black (rev. B or higher, i use rev. C)
-   **target** - the computer you are trying to install liberboot

### Find USB port on the target that supports EHCI debug {#FindUSBportonthetargetthatsupportsEHCIdebug}

Not all USB controllers support EHCI debug (see: [EHCI Debug
Port](http://www.coreboot.org/EHCI_Debug_Port#Hardware_capability) ).
Even more, if a USB controller supports EHCI debug, it is available only
**on a single port** that might or might not be exposed externally.

-   You need running OS (GNU+Linux) on your target for this step (If
    you've flashed libreboot and it does not boot, you have to flush
    back the stock bios)
-   You need USB memory stick (the data on it will not be touched).
-   The EHCI debugging can not be done through external hub, BBB must be
    connected directly to the debug port of the controller (so, no hubs)

<!-- -->

-   Download^[1](#___fn1)^
    [this](http://www.coreboot.org/pipermail/coreboot/attachments/20080909/ae11c291/attachment.sh)
    shell script.

1.  Plug the usb stick in the first available usb port
2.  Run the script, you will get output similar to following:
3.  The buses the support debug are Bus 3 (0000:00:1a.0) on Port 1 and
    Bus 4 (0000:00:1d.0) on port 2. Your usb stick is plugged on Bus 1,
    Port 3
4.  Repeat the steps, plugging the USB stick in the next available port
5.  Go through all available ports and remember(write down) those for
    which bus/port of the usb stick matches one of the bus/port that
    support debug (bold).

Remember (write down) for each port (external plug) you found that
supports debug: **PCI device id, the bus id, the port number, and the
physical location of the usb plug.**

If you do not find a match, you can not get debug over EHCI. Sorry.

^1^ The guys from coreboot were talking about including the script in
coreboot distribution (check the status).

### Initial setup of BBB to act as EHCI debug dongle {#InitialsetupofBBBtoactasEHCIdebugdongle}

BBB must be powered with a barrel power connector since the mini-B USB
plug will be used for the EHCI debug stream. So you will need:

-   power supply (5V, 2A(10W) is sufficient).
-   an extra usb cable: A to mini-B

(On BBB) The linux kernel includes module (g\_dbgp that enables one of
the usb ports on a computer to behave as EHCI debug dongle. Make sure
you have this module available on your BBB (Debian 7.8 that comes with
BBB should have it), if not, you should compile it yourself (see next
section):

    ls /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget/g_dbgp.ko

Unload all other g\_\* modules:

    # lsmod
    # rmmod g_multi
    ...

Then load g\_dbgp :

    # modprobe g_dbgp
    # lsmod # should show that g_dbgp is loaded, and no other g_*

Plug the mini-B side of the USB cable in your BBB and the A side in your
target. Then one of the usb devices on your target (with lsusb ) should
be:

    Bus 001 Device 024: ID 0525:c0de Netchip Technology, Inc.

If you see the device on the target, you are good to continue to the
next step.

### Patch BBB's g\_dbgp module (optional, but highly recommended) {#PatchBBBsgdbgpmoduleoptionalbuthighlyrecommended}

For the reasons why you need this, see: [EHCI Gadget
Debug](http://www.coreboot.org/EHCI_Gadget_Debug).\
Make sure that you have cross compiling environment for
arm-linux-gnueabihf setup on your *host*.

-   On BBB: uname -r - this will give you version number like
    3.8.13-bone70 (I will refer to this as: \$mav.\$miv-\$lv: where
    mav=3.8, miv=13, lv=bone70
-   Get the BBB kernel ready on your host for cross-compiling:

<!-- -->

    $ cd $work_dir
    $ git clone https://github.com/beagleboard/kernel.git
    $ cd kernel
    $ git checkout $mav (see above)
    $ ./patch.sh
    $ wget http://arago-project.org/git/projects/?p=am33x-cm3.git\;a=blob_plain\;f=bin/am335x-pm-firmware.bin\;hb=HEAD -O kernel/firmware/am335x-pm-firmware.bin
    $ cp configs/beaglebone kernel/arch/arm/configs/beaglebone_defconfig

-   Download the patch from
    [here](http://www.coreboot.org/images/8/88/Ehci-debug-gadget-patches.tar.gz)
-   tar -xf Ehci-debug-gadget-patches.tar.gz (will create dir:
    usbdebug-gadget)
-   Note that there are two patches (patch\_1 and patch\_2) for each of
    the two different version of the kernel (3.8 and 3.10). I will use
    3.8. (If using kernel 3.12 patch\_1 is not needed)
-   cd kernel (note that this is one more level: you should be in
    \$work\_dir/kernel/kernel)
-   Apply the patches:

<!-- -->

    git apply ../usbdebug-gadget/v3.8-debug-gadget/0001-usb-dbgp-gadget-Fix-re-connecting-after-USB-disconne.patch
    git apply ../usbdebug-gadget/v3.8-debug-gadget/0002-usb-serial-gadget-no-TTY-hangup-on-USB-disconnect-WI.patch
    ;
    make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- beaglebone_defconfig -j4@

-   You should also apply the linux-libre *deblob* script to turn it
    into linux-libre (deletes all the blobs from the linux kernel).
    [fsfla website](http://www.fsfla.org/ikiwiki/selibre/linux-libre/) -
    see
    [scripts](http://www.fsfla.org/svn/fsfla/software/linux-libre/scripts/).
-   Get your current BBB kernel config (from: /boot/config-<ver>)
    and copy it to your host as \$work\_dir/kernel/kernel/.config
-   Set proper version number:
    -   On your host, edit \$work\_dir/kernel/kernel/.config (the one
        you've just copied from BBB), find the line
        CONFIG\_LOCALVERSION="<something or empty>" and change
        it to CONFIG\_LOCALVERSION="-\$lv", so it will look something
        like: CONFIG\_LOCALVERSION="-bone70"
-   Also, make sure that: CONFIG\_USB\_G\_DBGP=m (If not, make
    menuconfig, and set @Device Drivers-> USB Support -> USB
    Gadget Support -> EHCI Debug Device Gadget=m
-   Build the module:

<!-- -->

    $ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4 (is it possoble to build only the gadget modules)
    $ mkdir ../tmp && make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- INSTALL_MOD_PATH=../tmp modules_install

-   on BBB, backup /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget
    (i.e. mv /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget
    \$HOME)
-   copy the freshly compiled usb/gadget dir to
    /lib/modules/3.8.13-bone70/kernel/drivers/usb
-   restart BBB
-   Remove all g\_\* modules (rmmod g\_<>)
-   modprobpe g\_dbgp

### Configure libreboot with EHCI debug {#ConfigurelibrebootwithEHCIdebug}

Libreboot(coreboot) should be configured with debug turned on and to
push debug messages to the EHCI debug port.\
If you've downloaded the binary distribution, you can check if it is
properly configured in the following way:

-   Go to the libreboot dist root directory cd \$libreboot\_bin
-   Locate the rom image for your target (I will call it: \$img\_path)
-   Running the following command will extract the config in a file
    ./my\_config:

<!-- -->

    ./cbfstool/i686/cbfstool $img_path extract -n config -f ./my_config

-   Make sure that the following params in the config are set as
    following:

<!-- -->

    CONFIG_USBDEBUG=y (Generic Drivers -> USB 2.0 EHCI debug dongle support)
    CONFIG_USBDEBUG_IN_ROMSTAGE=y (Generic Drivers -> Enable early (pre-RAM) usbdebug)
    CONFIG_USBDEBUG_HCD_INDEX=<HCD Index of usb controller - see below> (Generic Drivers -> Index for EHCI controller to use with usbdebug)
    CONFIG_USBDEBUG_DEFAULT_PORT=<USB Debug port - see below> (Generic Drivers -> Default USB port to use as Debug Port)

The following three are behind radio button in the menu. Only the first
one^[2](#___fn2)^ should be = y

    USBDEBUG_DONGLE_STD=y                       (Generic Drivers -> Type of dongle (Net20DC or compatible) -> Net20DC or compatible)
    CONFIG_USBDEBUG_DONGLE_BEAGLEBONE=n         (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone)
    CONFIG_USBDEBUG_DONGLE_BEAGLEBONE_BLACK=n   (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone Black)

^2^ The g\_dbgp module on BeagleBone Black (Rev. C) reports it self as
Net20DC, the other options are for older BB(B) - ver1. This is
documented
[here](https://johnlewis.ie/coreboot-ehci-debug-gadget-demonstration/)
(also tested/verified).

Then:\

    CONFIG_CONSOLE_USB=y (Console -> USB dongle console output)

Also Debugging \---> Output verbose XYZ ) (**FIXME** somebody verify
these):

    CONFIG_DEBUG_CBFS=y (Output verbose CBFS debug messages )
    CONFIG_HAVE_DEBUG_RAM_SETUP=y (??? What/where is this)
    CONFIG_DEBUG_RAM_SETUP=y (Output verbose RAM init debug messages)
    CONFIG_DEBUG_SMI=y      (Output verbose SMI debug messages)
    CONFIG_DEBUG_ACPI=y     (Output verbose ACPI debug messages )
    CONFIG_DEBUG_USBDEBUG=y (Output verbose USB 2.0 EHCI debug dongle messages)

If some of the above mentioned configuration options are not as
specified, you have to configure and compile libreboot yourself. Please
refer to the doc(**FIXME: link** about compiling libreboot.

#### Selecting HCD Index and USB Debug port {#SelectingHCDIndexandUSBDebugport}

This applies (and works) only if the USB controller that supports debug
(found in the first section) is from Intel.\
If the PCI ID of the port you found in the first section is 0000:00:1a.0
or 0000:00:1d.0 , you are ok. Otherwise you have to try without
guarantee that will work.

If the externally exposed port is on a bus with PCI ID == 0000:00:1a.0
then for CONFIG\_USBDEBUG\_HCD\_INDEX choose 2, otherwise choose 0 .

For CONFIG\_USBDEBUG\_DEFAULT\_PORT choose the port from the first
section that correspond to the PCI ID

Notes:\
The above is based on the implementation of
coreboot/src/southbridge/intel/common/usb\_debug.c :
pci\_ehci\_dbg\_dev() .\
This is enough as it applies for the supported GM45/G45 Thinkpads.
coreboot support some other contollers too, but they are irellevent for
libreboot (for now).

-   On T500 (with switchable GPU) the debug ports for both intel
    controllers is exposed.
-   On x200t the debug ports for both intel controllers is exposed.

### How to get the debug logs {#Howtogetthedebuglogs}

-   Plug the USB cable in the target's debug port (the one you found in
    step 1) and BBB's mini-B USB
-   Make sure no other then g\_dbgp of the g\_\* modules is loaded on
    your BBB
-   On the BBB:

<!-- -->

    stty -icrnl -inlcr -F /dev/ttyGS0
    cat /dev/ttyGS0

-   Power on the target with libreboot
-   You should see debug logs comming on your BBB console

Note that this is not permanent on BBB, if you reboot it, you have to
rmmod g\_\* and modprobe g\_dbgp

### Eneble EHCI Debug on the target's kernel (optional, recommended) {#EnebleEHCIDebugonthetargetskerneloptionalrecommended}

You have to know how to compile kernel for your target.

1.  Check if early debugging is already enabled: grep
    CONFIG\_EARLY\_PRINTK\_DBGP /boot/config-<ver>
2.  If enabled, you do not have to compile the kernel (skip this step).
    Otherwise, prepare kernel source for your distribution and select
    (Kernel hacking -> Early printk via EHCI debug port). Compile and
    install the new kernel.
3.  Edit your grub configuration and add following to the kenel
    parameters^[20](#___fn20)[21](#___fn21)^: earlyprintk=dbgp,keep.
    Also, try: earlyprintk=dbgp<N>,keep where N is the debug port
    id if the first does not work.

### References {#References}

^10^ [EHCI Debug Port](http://www.coreboot.org/EHCI_Debug_Port)

^11^ [coreboot EHCI debug gadget
demonstration](https://johnlewis.ie/coreboot-ehci-debug-gadget-demonstration/)

^12^ [EHCI Gadget Debug](http://www.coreboot.org/EHCI_Gadget_Debug)

^13^
[Ehci-debug-gadget-patches.tar.gz](http://www.coreboot.org/images/8/88/Ehci-debug-gadget-patches.tar.gz)

^14^ [Compiling the BeagleBone Black
Kernel](http://wiki.beyondlogic.org/index.php/BeagleBoneBlack_Building_Kernel)

^15^
http://dumb-looks-free.blogspot.ca/2014/06/beaglebone-black-bbb-compile-kernel.html

^16^
http://dumb-looks-free.blogspot.fr/2014/06/beaglebone-black-bbb-kernal-headers.html

^17^ [Building BBB Kernel](http://elinux.org/Building_BBB_Kernel)

^18^
http://komposter.com.ua/documents/USB-2.0-Debug-Port%28John-Keys%29.pdf

^19^ [Exploring USB at the Hardware/Software
Interface](http://cs.usfca.edu/~cruse/cs698s10/)

^20^ https://www.kernel.org/doc/Documentation/x86/earlyprintk.txt

^21^ https://wiki.ubuntu.com/Kernel/Debugging/USBearlyprintk

**TODO**:

1.  grub does not send messages to EHCI debug. Investigate.
2.  The section “Configure libreboot with EHCI debug” can be
    skipped/simplified if a common configuration works for all relevant
    targets is selected as defualt
3.  Patch and compule g\_dbgp on BBB instead cross-compile
4.  Find a simple way to send debug messages from targets userland

Copyright © 2015 Alex David <opdecirkel@gmail.com>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)


code:
---
title: Miscellaneous
x-toc-enable: true
...

High Pitched Whining Noise on Idle in Debian or Devuan
======================================================================

Start powertop automatically at boot time.

Included with libreboot is a script called 'powertop.debian'. Run this
as root and it will setup powertop to run with --auto-tune at boot
time. Load the file in your text editor to see how it does that.

    $ sudo ./resources/scripts/misc/powertop.debian

Might want to run with --calibrate first

If powertop doesn't work, another way (reduces battery life slightly)
is to add *processor.max\_cstate=2* to the *linux* line in grub.cfg,
using [this guide](../gnulinux/grub_cbfs.md).

High Pitched Whining Noise on Idle in Parabola
==============================================================

The following removes most of the noise. It reduces what is a high
frequency whine (that not everyone can hear) to a slight buzz (which
most people can't hear or doesn't bother most people).

This is not perfect! The full solution is still not discovered but this
is a step towards that. Also, in some instances you will need to run
'sudo powertop --auto-tune' again. This needs to be implemented
properly in coreboot itself!

On the X60 with coreboot or libreboot, there is a high pitched sound
when idle. So far we have use processor.max\_cstate=2 or idle=halt in
GRUB. These consume power. Stop using them!

Be root

    $ su -

Installed powertop:

    # pacman -S powertop

and added the following to /etc/systemd/system/powertop.service :

    [Unit]
    Description=Powertop tunings

    [Service]
    Type=oneshot
    RemainAfterExit=no
    ExecStart=/usr/bin/powertop --auto-tune
    # "powertop --auto-tune" still needs a terminal for some reason. Possibly a bug?
    Environment="TERM=xterm"

    [Install]
    WantedBy=multi-user.target

Finally, as root do that:

    # systemctl enable powertop
    # systemctl start powertop

The next time you boot the system, the buzz will be gone.

Might want to run with --calibrate first

If powertop doesn't work, another way (reduces battery life slightly)
is to add *processor.max\_cstate=2* to the *linux* line in grub.cfg,
using [this guide](../gnulinux/grub_cbfs.md).

X60/T60: Serial port - how to use (for dock owners)
===================================================

For the Thinkpad X60 you can use the **"UltraBase X6"** dock (for the
X60 Tablet it is called X6 Tablet UltraBase). For the ThinkPad T60, you
can use the **"Advanced Mini Dock"**.

If you are using one of the ROM images with 'serial' in the name, then
you have serial port enabled in libreboot and you have memtest86+
included inside the ROM. Connect your null modem cable to the serial
port on the dock and connect the other end to a 2nd system using your
USB Serial adapter.

On the 2nd system, you can try this (using GNU Screen):

    $ sudo screen /dev/ttyUSB0 115200

How to quit GNU Screen: Ctrl+A then release and press K, and then press
Y.

There are also others like Minicom but I like GNU Screen

By doing this before booting the X60/T60, you will see console output
from libreboot. You will also see GRUB displaying on the serial output,
and you will be able to see MemTest86+ on the serial output aswell. You
can also configure your distro so that a terminal (TTY) is accessible
from the serial console.

The following guide is for Ubuntu, but it should work in Debian and
Devuan, to enable a serial console using GeTTY:\
<https://help.ubuntu.com/community/SerialConsoleHowto> (we DO NOT
recommend Ubuntu, because it contains non-free software in the default
repos. Use Debian or Devuan)

Note: part of the tutorial above requires changing your grub.cfg. Just
change the **linux** line to add instructions for enabling getty. See
[../gnulinux/grub\_cbfs.md](../gnulinux/grub_cbfs.md).

Finetune backlight control on intel gpu's
=========================================

Sometimes the backlight control value (BLC\_PWM\_CTL) set by libreboot
is not ideal. The result is either flicker, which could cause nausea or
epilepsy or an uneven backlight and/or coil whine coming from the
display. To fix this a different value for the gpu reg BLC\_PWM\_CTL
needs to be set. See p94 of
<https://01.org/sites/default/files/documentation/g45_vol_3_register_0_0.pdf>
for more information on this reg. The tool for setting registry values
on intel gpu's is included in intel-gpu-tools. Install intel-gpu-tools:
**sudo apt-get install intel-gpu-tools**

You can set values: **sudo intel\_reg write 0x00061254
your_value_in_C_hex_format**

The value set has the following structure: bits \[31:16\] is PWM
divider. PWM / PWM\_divider = frequency bits \[15:0\] is the duty cycle
and determines the portion of the backlight modulation frequency. A
value of 0 will mean that the display is off. A value equal to the
backlight modulation frequency means full on. The value should not be
larger than the backlight modulation frequency.

On displays with a CCFL backlight start from: 0x60016001 To verify if
all modes work as desired use: **xbacklight -set 10** and gradually
increase until 100. Displays with an LED backlight need a lower
backlight modulation. Do the same thing but start from 0x01290129 . Try
setting different values until you have found a value which presents no
issue.

It is important to know that there are four failure modes:

1.  flickering very fast, which could cause epilepsy (frequency is too
    low. decrease divider)
2.  randomly flickering in random intervals - driver IC cannot keep up
    with toggling the mosfet (frequency too fast, increase divider)
3.  frequency is in audible range and causes coils to whine (frequency
    is too high. increase divider)
4.  backlight is uneven. (CCFL specific, frequency is too high. increase
    divider)

To check for flickering try moving your laptop while looking at it.

A higher frequency equals higher power consumption. You want to find the
highest good working value.

Next this value should be set at boot: either add

    intel_reg write 0x00061254 &ltyour_ideal_value>

before exit 0 in /etc/rc.local or create a systemd service file
/etc/systemd/system/backlight.service:
    [Unit]
    Description=Set BLC_PWM_CTL to a good value
    [Service]
    Type=oneshot
    RemainAfterExit=no
    ExecStart=/usr/bin/intel_reg write 0x00061254 &ltyour_value>
    [Install]
    WantedBy=multi-user.target

Now start and enable it: **sudo systemctl start backlight && sudo
systemctl enable backlight**
Special note on i945:

i945 behaves differently. Bit 16 needs to be 1 and the duty cycle is not
updated when backlight is changed. There are no available datasheets on
this target so why it behaves in such a way is not known. So to find a
working value BLC\_PWM\_CTL set bit 16 to 1 and make sure PWM divider ==
duty cycle. see <https://review.coreboot.org/#/c/10624/> on bit 16. The
cause of this issue is that i945, in contrast with to GM45, is set to
work in BLM Legacy Mode. This makes backlight more complicated since the
duty cycle is derived from 3 instead of 2 registers using the following
formula: if(BPC\[7:0\] <> xFF) then BPCR\[15:0\] \* BPC\[7:0\]
Else BPCR\[15:0\] BPC is LBB - PCI Backlight Control Register, described
on <http://www.mouser.com/pdfdocs/945gmedatasheet.pdf> on page 315. BPCR
is BLC\_PWM\_CTL described in
<https://01.org/sites/default/files/documentation/g45_vol_3_register_0_0.pdf>
on page 94. More research needs to be done on this target so proceed
with care.

Power Management Beeps on Thinkpads
===================================

When disconnecting or connecting the charger, a beep occurs. When the
battery goes to a critically low charge level, a beep occurs. Nvramtool
is included in libreboot, and can be used to enable or disable this
behaviour.

Disable or enable beeps when removing/adding the charger:
    $ sudo ./nvramtool -w power\_management\_beeps=Enable
    $ sudo ./nvramtool -w power\_management\_beeps=Disable

Disable or enable beeps when battery is low:
    $ sudo ./nvramtool -w low\_battery\_beep=Enable

    $ sudo ./nvramtool -w low\_battery\_beep=Disable

A reboot is required, for these changes to take effect.

Get EDID: Find out the name (model) of your LCD panel
=====================================================

Get the panel name with **sudo get-edid | strings**\
Or look in **/sys/class/drm/card0-LVDS-1/edid**

Alternatively you can use i2cdump. In Debian and Devuan, this is in the
package i2c-tools.

    $ sudo modprobe i2c-dev
    $ sudo i2cdump -y 5 0x50 (you might have to change the value for
-y)

    $ sudo rmmod i2c-dev
You'll see the panel name in the output (from the EDID dump).

If neither of these options work (or they are unavailable), physically
removing the LCD panel is an option. Usually, there will be information
printed on the back.

e1000e driver trouble shooting (Intel NICs)
===========================================

Example error, ¿may happen on weird and complex routing schemes(citation
needed for cause):

    e1000e 0000:00:19.0 enp0s25: Detected Hardware Unit Hang

Possible workaround, tested by Nazara: Disable C-STATES.\
**NOTE: this also disables power management, because disabling C-States
means that your CPU will now be running at full capacity (and therefore
using more power) non-stop, which will drain battery life if this is a
laptop. If power usage is a concern, then you should not use this.
(we're also not sure whether this workaround is appropriate)**

To disable c-states, do this in GNU+Linux:\
**for i in /sys/devices/system/cpu/cpu/cpuidle/state/disable; do echo 1
> \$i; done**

You can reproduce this issue more easily by sending lots of traffic
across subnets on the same interface (NIC).

More information, including logs, can be found on [this
page](https://notabug.org/libreboot/libreboot/issues/23).

USB keyboard wakeup on GM45 laptops
===================================

Look at resources/scripts/helpers/misc/libreboot\_usb\_bugfix

Put this script in /etc/init.d/ on debian-based systems.

Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)