code:
# Object files
*.o
*.ko

# Libraries
*.lib
*.a

# Shared objects (inc. Windows DLLs)
*.dll
*.so
*.so.*
*.dylib

# Executables
*.exe
*.out
*.app

path: .gitignore

license: unknown


code:
/Makefile/1.41/Tue Mar 18 22:36:31 2014//TOPENBSD_5_8_BASE
D/arch////
D/compat////
D/conf////
D/crypto////
D/ddb////
D/dev////
D/isofs////
D/kern////
D/lib////
D/miscfs////
D/msdosfs////
D/net////
D/net80211////
D/netinet////
D/netinet6////
D/netmpls////
D/nfs////
D/ntfs////
D/scsi////
D/stand////
D/sys////
D/tmpfs////
D/ufs////
D/uvm////

path: sys/CVS/Entries


code:
#	$OpenBSD: Makefile,v 1.41 2014/03/18 22:36:31 miod Exp $
#	$NetBSD: Makefile,v 1.5 1995/09/15 21:05:21 pk Exp $

SUBDIR=	dev/microcode \
	arch/alpha arch/amd64 arch/armish arch/armv7 arch/aviion \
	arch/hppa arch/hppa64 arch/i386 \
	arch/landisk arch/loongson arch/luna88k \
	arch/macppc arch/octeon \
	arch/sgi arch/socppc arch/solbourne arch/sparc arch/sparc64 \
	arch/vax arch/zaurus

tags:
	cd ${.CURDIR}/kern; make tags

.include <bsd.subdir.mk>

path: sys/Makefile


code:
D/alpha////
D/amd64////
D/arm////
D/armish////
D/armv7////
D/aviion////
D/hppa////
D/hppa64////
D/i386////
D/landisk////
D/loongson////
D/luna88k////
D/m88k////
D/macppc////
D/mips64////
D/octeon////
D/powerpc////
D/sgi////
D/sh////
D/socppc////
D/solbourne////
D/sparc////
D/sparc64////
D/vax////
D/zaurus////

path: sys/arch/CVS/Entries


code: src/sys/arch

path: sys/arch/CVS/Repository


code:
/Makefile/1.12/Sun Dec  8 14:46:39 2013//TOPENBSD_5_8_BASE
D/alpha////
D/compile////
D/conf////
D/dev////
D/eisa////
D/include////
D/isa////
D/mcbus////
D/pci////
D/stand////
D/tc////

path: sys/arch/alpha/CVS/Entries


code: src/sys/arch/alpha

path: sys/arch/alpha/CVS/Repository


code:
#	$OpenBSD: Makefile,v 1.12 2013/12/08 14:46:39 espie Exp $

S=	${.CURDIR}/../..
KFILE=	GENERIC
.if exists(conf/GENERIC.MP)
KFILE=	GENERIC.MP
.endif
TDIRS=	${_arch} include pci isa eisa mcbus tc
TAGS=	${.CURDIR}/tags

NOPROG=
NOMAN=
NOOBJ=
SUBDIR=	stand

# config the fattest kernel we can find into a temporary dir
# to create a Makefile.  Then use make to pull some variables
# out and push them into the sub-shell to expand the paths,
# and finally run ctags.
tags::
	TDIR=`mktemp -d /tmp/_tagXXXXXXXXXX` || exit 1; \
	eval "S=${S}" && \
	config -s ${S} -b $${TDIR} ${.CURDIR}/conf/${KFILE} && \
	eval "_arch=\"`make -V _arch -f $${TDIR}/Makefile`\"" && \
	eval "_mach=\"`make -V _mach -f $${TDIR}/Makefile`\"" && \
	eval "_machdir=\$S/arch/$${_mach}" && \
	eval "_archdir=\$S/arch/$${_arch}" && \
	eval "HFILES=\"`find $S \( -path $S/'arch' -o -path $S/stand -o -path $S/lib/libsa -o -path $S'/lib/libkern/arch' \) -prune -o -name '*.h'; find $${_machdir} $${_archdir} $S/lib/libkern/arch/$${_mach} \( -name boot -o -name stand \) -prune -o -name '*.h'`\"" && \
	eval "SFILES=\"`make -V SFILES -f $${TDIR}/Makefile`\"" && \
	eval "CFILES=\"`make -V CFILES -f $${TDIR}/Makefile`\"" && \
	eval "AFILES=\"`make -V AFILES -f $${TDIR}/Makefile`\"" && \
	ctags -wd -f ${TAGS} $${CFILES} $${HFILES} && \
	egrep "^[_A-Z]*ENTRY[_A-Z]*\(.*\)" $${SFILES} $${AFILES} | \
	    sed "s;\\([^:]*\\):\\([^(]*\\)(\\([^, )]*\\)\\(.*\\);\\3	\\1	/^\\2(\\3\\4$$/;" \
	    >> ${TAGS} && \
	sort -o ${TAGS} ${TAGS} && \
	rm -rf $${TDIR}

links:
	-for i in conf ${TDIRS}; do \
	    (cd $$i && rm -f tags; ln -s tags tags); done

obj:	_SUBDIRUSE

.include <bsd.prog.mk>

path: sys/arch/alpha/Makefile


code: src/sys/arch/alpha/alpha

path: sys/arch/alpha/alpha/CVS/Repository


code:
/*	$OpenBSD: api_up1000.c,v 1.12 2014/05/08 20:46:49 miod Exp $	*/
/* $NetBSD: api_up1000.c,v 1.4 2000/06/20 03:48:53 matt Exp $ */

/*
 * Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */
/*
 * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/termios.h>
#include <dev/cons.h>
#include <sys/conf.h>

#include <machine/rpb.h>
#include <machine/autoconf.h>
#include <machine/cpuconf.h>
#include <machine/bus.h>

#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>

#include <dev/isa/isareg.h>
#include <dev/isa/isavar.h>
#include <dev/ic/i8042reg.h>
#include <dev/ic/pckbcvar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>

#include <alpha/pci/irongatereg.h>
#include <alpha/pci/irongatevar.h>

#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#include <dev/ata/atavar.h>

#include "pckbd.h"

#ifndef CONSPEED
#define CONSPEED TTYDEF_SPEED
#endif
static int comcnrate = CONSPEED;

#ifdef DEBUG
int bootdev_debug;
#define	DPRINTF(x)	if (bootdev_debug) printf x
#else
#define DPRINTF(x)
#endif

void api_up1000_init(void);
static void api_up1000_cons_init(void);
static void api_up1000_device_register(struct device *, void *);

void
api_up1000_init()
{

	platform.family = "API UP1000";

	if ((platform.model = alpha_dsr_sysname()) == NULL) {
		/* XXX Don't know the system variations, yet. */
		platform.model = alpha_unknown_sysname();
	}

	platform.iobus = "irongate";
	platform.cons_init = api_up1000_cons_init;
	platform.device_register = api_up1000_device_register;
}

static void
api_up1000_cons_init()
{
	struct ctb *ctb;
	struct irongate_config *icp;
	extern struct irongate_config irongate_configuration;

	icp = &irongate_configuration;
	irongate_init(icp, 0);

	ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);

	switch (ctb->ctb_term_type) {
	case CTB_PRINTERPORT:
		/* serial console ... */
		/* XXX */
		{
			/*
			 * Delay to allow PROM putchars to complete.
			 * FIFO depth * character time,
			 * character time = (1000000 / (defaultrate / 10))
			 */
			DELAY(160000000 / comcnrate);

			if (comcnattach(&icp->ic_iot, 0x3f8, comcnrate,
			    COM_FREQ,
			    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8))
				panic("can't init serial console");

			break;
		}

	case CTB_GRAPHICS:
#if NPCKBD > 0
		/* display console ... */
		/* XXX */
		(void) pckbc_cnattach(&icp->ic_iot, IO_KBD, KBCMDP, 0);

		if (CTB_TURBOSLOT_TYPE(ctb->ctb_turboslot) ==
		    CTB_TURBOSLOT_TYPE_ISA)
			isa_display_console(&icp->ic_iot, &icp->ic_memt);
		else
			pci_display_console(&icp->ic_iot, &icp->ic_memt,
			    &icp->ic_pc, CTB_TURBOSLOT_BUS(ctb->ctb_turboslot),
			    CTB_TURBOSLOT_SLOT(ctb->ctb_turboslot), 0);
#else
		panic("not configured to use display && keyboard console");
#endif
		break;

	default:
		printf("ctb->ctb_term_type = 0x%lx\n",
		    (unsigned long)ctb->ctb_term_type);
		printf("ctb->ctb_turboslot = 0x%lx\n",
		    (unsigned long)ctb->ctb_turboslot);

		panic("consinit: unknown console type %lu",
		    (unsigned long)ctb->ctb_term_type);
	}
}

static void
api_up1000_device_register(dev, aux)
	struct device *dev;
	void *aux;
{
	static int found, initted, scsiboot, ideboot, netboot;
	static struct device *pcidev, *scsidev;
	struct bootdev_data *b = bootdev_data;
	struct device *parent = dev->dv_parent;
	struct cfdata *cf = dev->dv_cfdata;
	struct cfdriver *cd = cf->cf_driver;

	if (found)
		return;

	if (!initted) {
		scsiboot = (strcmp(b->protocol, "SCSI") == 0);
		netboot = (strcmp(b->protocol, "BOOTP") == 0) ||
		    (strcmp(b->protocol, "MOP") == 0);
		/*
		 * Add an extra check to boot from ide drives:
		 * Newer SRM firmware use the protocol identifier IDE,
		 * older SRM firmware use the protocol identifier SCSI.
		 */
		ideboot = (strcmp(b->protocol, "IDE") == 0);
		DPRINTF(("\nscsiboot = %d, ideboot = %d, netboot = %d\n",
		    scsiboot, ideboot, netboot));
		initted = 1;
	}

	if (pcidev == NULL) {
		if (strcmp(cd->cd_name, "pci"))
			return;
		else {
			struct pcibus_attach_args *pba = aux;

			if ((b->slot / 1000) != pba->pba_bus)
				return;

			pcidev = dev;
			DPRINTF(("\npcidev = %s\n", pcidev->dv_xname));
			return;
		}
	}

	if ((ideboot || scsiboot) && (scsidev == NULL)) {
		if (parent != pcidev)
			return;
		else {
			struct pci_attach_args *pa = aux;

			if (b->slot % 1000 / 100 != pa->pa_function)
				return;
			if (b->slot % 100 != pa->pa_device)
				return;

			scsidev = dev;
			DPRINTF(("\nscsidev = %s\n", scsidev->dv_xname));
			return;
		}
	}

	if ((ideboot || scsiboot) &&
	    (!strcmp(cd->cd_name, "sd") ||
	     !strcmp(cd->cd_name, "st") ||
	     !strcmp(cd->cd_name, "cd"))) {
		struct scsi_attach_args *sa = aux;

		if (parent->dv_parent != scsidev)
			return;

		if (b->unit / 100 != sa->sa_sc_link->target)
			return;

		/* XXX LUN! */

		switch (b->boot_dev_type) {
		case 0:
			if (strcmp(cd->cd_name, "sd") &&
			    strcmp(cd->cd_name, "cd"))
				return;
			break;
		case 1:
			if (strcmp(cd->cd_name, "st"))
				return;
			break;
		default:
			return;
		}

		/* we've found it! */
		booted_device = dev;
		DPRINTF(("\nbooted_device = %s\n", booted_device->dv_xname));
		found = 1;
	}

	/*
	 * Support to boot from IDE drives.
	 */
	if ((ideboot || scsiboot) && !strcmp(cd->cd_name, "wd")) {
		struct ata_atapi_attach *aa_link = aux;
		if ((strcmp("pciide", parent->dv_cfdata->cf_driver->cd_name) != 0)) {
			return;
		} else {
			if (parent != scsidev)
				return;
		}
		DPRINTF(("\natapi info: drive %d, channel %d\n",
		    aa_link->aa_drv_data->drive, aa_link->aa_channel));
		DPRINTF(("bootdev info: unit: %d, channel: %d\n",
		    b->unit, b->channel));
		if (b->unit != aa_link->aa_drv_data->drive ||
		    b->channel != aa_link->aa_channel)
			return;

		/* we've found it! */
		booted_device = dev;
		DPRINTF(("booted_device = %s\n", booted_device->dv_xname));
		found = 1;
	}

	if (netboot) {
		if (parent != pcidev)
			return;
		else {
			struct pci_attach_args *pa = aux;

			if ((b->slot % 1000) != pa->pa_device)
				return;

			/* XXX function? */

			booted_device = dev;
			DPRINTF(("\nbooted_device = %s\n",
			    booted_device->dv_xname));
			found = 1;
			return;
		}
	}
}


code:
/*	$OpenBSD: autoconf.c,v 1.35 2011/11/25 05:23:40 miod Exp $	*/
/*	$NetBSD: autoconf.c,v 1.16 1996/11/13 21:13:04 cgd Exp $	*/

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)autoconf.c	8.4 (Berkeley) 10/1/93
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/disklabel.h>
#include <sys/conf.h>
#include <sys/reboot.h>
#include <sys/device.h>

#include <uvm/uvm_extern.h>

#include <machine/autoconf.h>
#include <machine/rpb.h>
#include <machine/prom.h>
#include <machine/cpuconf.h>
#include <machine/intr.h>

#include <dev/cons.h>

struct device		*booted_device;
int			booted_partition;
struct bootdev_data	*bootdev_data;
char			boot_dev[128];

void	parse_prom_bootdev(void);
int	atoi(char *);

/*
 * cpu_configure:
 * called at boot time, configure all devices on system
 */
void
cpu_configure()
{
	parse_prom_bootdev();
	softintr_init();

	/*
	 * Disable interrupts during autoconfiguration.  splhigh() won't
	 * work, because it simply _raises_ the IPL, so if machine checks
	 * are disabled, they'll stay disabled.  Machine checks are needed
	 * during autoconfig.
	 */
	(void)alpha_pal_swpipl(ALPHA_PSL_IPL_HIGH);
	if (config_rootfound("mainbus", "mainbus") == NULL)
		panic("no mainbus found");
	(void)spl0();

	hwrpb_restart_setup();
	cold = 0;
}

void
diskconf(void)
{
	struct device *bootdv;
	int bootpartition;

	if (booted_device == NULL)
		printf("WARNING: can't figure what device matches \"%s\"\n",
		    boot_dev);
	bootdv = booted_device;
	bootpartition = booted_partition;

	setroot(bootdv, bootpartition, RB_USERREQ);
	dumpconf();
}

void
parse_prom_bootdev()
{
	static struct bootdev_data bd;
	char *cp, *scp, *boot_fields[8];
	int i, done;

	booted_device = NULL;
	booted_partition = 0;
	bootdev_data = NULL;

	bcopy(bootinfo.booted_dev, boot_dev, sizeof bootinfo.booted_dev);
#if 0
	printf("parse_prom_bootdev: boot dev = \"%s\"\n", boot_dev);
#endif

	i = 0;
	scp = cp = boot_dev;
	for (done = 0; !done; cp++) {
		if (*cp != ' ' && *cp != '\0')
			continue;
		if (*cp == '\0')
			done = 1;

		*cp = '\0';
		boot_fields[i++] = scp;
		scp = cp + 1;
		if (i == 8)
			done = 1;
	}
	if (i != 8)
		return;		/* doesn't look like anything we know! */

#if 0
	printf("i = %d, done = %d\n", i, done);
	for (i--; i >= 0; i--)
		printf("%d = %s\n", i, boot_fields[i]);
#endif

	bd.protocol = boot_fields[0];
	bd.bus = atoi(boot_fields[1]);
	bd.slot = atoi(boot_fields[2]);
	bd.channel = atoi(boot_fields[3]);
	bd.remote_address = boot_fields[4];
	bd.unit = atoi(boot_fields[5]);
	bd.boot_dev_type = atoi(boot_fields[6]);
	bd.ctrl_dev_type = boot_fields[7];

#if 0
	printf("parsed: proto = %s, bus = %d, slot = %d, channel = %d,\n",
	    bd.protocol, bd.bus, bd.slot, bd.channel);
	printf("\tremote = %s, unit = %d, dev_type = %d, ctrl_type = %s\n",
	    bd.remote_address, bd.unit, bd.boot_dev_type, bd.ctrl_dev_type);
#endif

	bootdev_data = &bd;
}

int
atoi(s)
	char *s;
{
	int n, neg;

	n = 0;
	neg = 0;

	while (*s == '-') {
		s++;
		neg = !neg;
	}

	while (*s != '\0') {
		if (*s < '0' || *s > '9')
			break;

		n = (10 * n) + (*s - '0');
		s++;
	}

	return (neg ? -n : n);
}

void
device_register(dev, aux)
	struct device *dev;
	void *aux;
{
	if (bootdev_data == NULL) {
		/*
		 * There is no hope.
		 */
		return;
	}

	if (platform.device_register)
		(*platform.device_register)(dev, aux);
}

struct nam2blk nam2blk[] = {
	{ "st",		2 },
	{ "cd",		3 },
	{ "fd",		4 },
	{ "rd",		6 },
	{ "sd",		8 },
	{ "wd",		0 },
	{ "raid",	16 },
	{ "vnd",	9 },
	{ NULL,		-1 }
};


code:
/*	$OpenBSD: clock.c,v 1.21 2012/03/23 15:51:25 guenther Exp $	*/
/*	$NetBSD: clock.c,v 1.29 2000/06/05 21:47:10 thorpej Exp $	*/

/*
 * Copyright (c) 1988 University of Utah.
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * the Systems Programming Group of the University of Utah Computer
 * Science Department and Ralph Campbell.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * from: Utah Hdr: clock.c 1.18 91/01/21
 *
 *	@(#)clock.c	8.1 (Berkeley) 6/10/93
 */

#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/evcount.h>
#include <sys/timetc.h>

#include <dev/clock_subr.h>

#include <machine/rpb.h>
#include <machine/autoconf.h>
#include <machine/cpuconf.h>

#include <alpha/alpha/clockvar.h>

#define MINYEAR 1998 /* "today" */
#define UNIX_YEAR_OFFSET 0

extern int schedhz;

struct device *clockdev;
const struct clockfns *clockfns;
int clockinitted;
struct evcount clk_count;
int clk_irq = 0;

u_int rpcc_get_timecount(struct timecounter *);
struct timecounter rpcc_timecounter = {
	rpcc_get_timecount, NULL, ~0u, 0, "rpcc", 0, NULL
};

void
clockattach(dev, fns)
	struct device *dev;
	const struct clockfns *fns;
{

	/*
	 * Just bookkeeping.
	 */
	printf("\n");

	if (clockfns != NULL)
		panic("clockattach: multiple clocks");
	clockdev = dev;
	clockfns = fns;
}

/*
 * Machine-dependent clock routines.
 *
 * Startrtclock restarts the real-time clock, which provides
 * hardclock interrupts to kern_clock.c.
 *
 * Inittodr initializes the time of day hardware which provides
 * date functions.  Its primary function is to use some file
 * system information in case the hardware clock lost state.
 *
 * Resettodr restores the time of day hardware after a time change.
 */

/*
 * Start the real-time and statistics clocks. Leave stathz 0 since there
 * are no other timers available.
 */
void
cpu_initclocks(void)
{
	u_int32_t cycles_per_sec;
	struct clocktime ct;
	u_int32_t first_rpcc, second_rpcc; /* only lower 32 bits are valid */
	int first_sec;

	if (clockfns == NULL)
		panic("cpu_initclocks: no clock attached");

	tick = 1000000 / hz;	/* number of microseconds between interrupts */

	/*
	 * Establish the clock interrupt; it's a special case.
	 *
	 * We establish the clock interrupt this late because if
	 * we do it at clock attach time, we may have never been at
	 * spl0() since taking over the system.  Some versions of
	 * PALcode save a clock interrupt, which would get delivered
	 * when we spl0() in autoconf.c.  If established the clock
	 * interrupt handler earlier, that interrupt would go to
	 * hardclock, which would then fall over because the pointer
	 * to the virtual timers wasn't set at that time.
	 */
	platform.clockintr = hardclock;
	schedhz = 16;

	evcount_attach(&clk_count, "clock", &clk_irq);

	/*
	 * Get the clock started.
	 */
	(*clockfns->cf_init)(clockdev);

	/*
	 * Calibrate the cycle counter frequency.
	 */
	(*clockfns->cf_get)(clockdev, 0, &ct);
	first_sec = ct.sec;

	/* Let the clock tick one second. */
	do {
		first_rpcc = alpha_rpcc();
		(*clockfns->cf_get)(clockdev, 0, &ct);
	} while (ct.sec == first_sec);
	first_sec = ct.sec;
	/* Let the clock tick one more second. */
	do {
		second_rpcc = alpha_rpcc();
		(*clockfns->cf_get)(clockdev, 0, &ct);
	} while (ct.sec == first_sec);

	cycles_per_sec = second_rpcc - first_rpcc;

	rpcc_timecounter.tc_frequency = cycles_per_sec;

	tc_init(&rpcc_timecounter);
}

/*
 * We assume newhz is either stathz or profhz, and that neither will
 * change after being set up above.  Could recalculate intervals here
 * but that would be a drag.
 */
void
setstatclockrate(newhz)
	int newhz;
{

	/* nothing we can do */
}

/*
 * Initialize the time of day register, based on the time base which is, e.g.
 * from a filesystem.  Base provides the time to within six months,
 * and the time of year clock (if any) provides the rest.
 */
void
inittodr(time_t base)
{
	struct clocktime ct;
	int year;
	struct clock_ymdhms dt;
	time_t deltat;
	int badbase;
	struct timespec ts;

	ts.tv_sec = ts.tv_nsec = 0;

	if (base < (MINYEAR-1970)*SECYR) {
		printf("WARNING: preposterous time in file system");
		/* read the system clock anyway */
		base = (MINYEAR-1970)*SECYR;
		badbase = 1;
	} else
		badbase = 0;

	(*clockfns->cf_get)(clockdev, base, &ct);
#ifdef DEBUG
	printf("readclock: %d/%d/%d/%d/%d/%d", ct.year, ct.mon, ct.day,
	       ct.hour, ct.min, ct.sec);
#endif
	clockinitted = 1;

	year = 1900 + UNIX_YEAR_OFFSET + ct.year;
	if (year < 1970)
		year += 100;
	/* simple sanity checks (2037 = time_t overflow) */
	if (year < MINYEAR || year > 2037 ||
	    ct.mon < 1 || ct.mon > 12 || ct.day < 1 ||
	    ct.day > 31 || ct.hour > 23 || ct.min > 59 || ct.sec > 59) {
		/*
		 * Believe the time in the file system for lack of
		 * anything better, resetting the TODR.
		 */
		ts.tv_sec = base;
		if (!badbase) {
			printf("WARNING: preposterous clock chip time\n");
			resettodr();
		}
		goto bad;
	}

	dt.dt_year = year;
	dt.dt_mon = ct.mon;
	dt.dt_day = ct.day;
	dt.dt_hour = ct.hour;
	dt.dt_min = ct.min;
	dt.dt_sec = ct.sec;
	ts.tv_sec = clock_ymdhms_to_secs(&dt);
#ifdef DEBUG
	printf("=>%ld (%d)\n", ts.tv_sec, base);
#endif

	if (!badbase) {
		/*
		 * See if we gained/lost two or more days;
		 * if so, assume something is amiss.
		 */
		deltat = ts.tv_sec - base;
		if (deltat < 0)
			deltat = -deltat;
		if (deltat < 2 * SECDAY) {
			tc_setclock(&ts);
			return;
		}
		printf("WARNING: clock %s %ld days",
		    ts.tv_sec < base ? "lost" : "gained",
		    (long)deltat / SECDAY);
	}
bad:
	tc_setclock(&ts);
	printf(" -- CHECK AND RESET THE DATE!\n");
}

/*
 * Reset the TODR based on the time value; used when the TODR
 * has a preposterous value and also when the time is reset
 * by the stime system call.  Also called when the TODR goes past
 * TODRZERO + 100*(SECYEAR+2*SECDAY) (e.g. on Jan 2 just after midnight)
 * to wrap the TODR around.
 */
void
resettodr()
{
	struct clock_ymdhms dt;
	struct clocktime ct;

	if (!clockinitted)
		return;

	clock_secs_to_ymdhms(time_second, &dt);

	/* rt clock wants 2 digits */
	ct.year = (dt.dt_year - UNIX_YEAR_OFFSET) % 100;
	ct.mon = dt.dt_mon;
	ct.day = dt.dt_day;
	ct.hour = dt.dt_hour;
	ct.min = dt.dt_min;
	ct.sec = dt.dt_sec;
	ct.dow = dt.dt_wday;
#ifdef DEBUG
	printf("setclock: %d/%d/%d/%d/%d/%d\n", ct.year, ct.mon, ct.day,
	       ct.hour, ct.min, ct.sec);
#endif

	(*clockfns->cf_set)(clockdev, &ct);
}

u_int
rpcc_get_timecount(struct timecounter *tc)
{
	return alpha_rpcc();
}


code:
/*	$OpenBSD: clockvar.h,v 1.5 2002/03/14 01:26:26 millert Exp $	*/
/*	$NetBSD: clockvar.h,v 1.2 1996/04/17 22:01:21 cgd Exp $	*/

/*
 * Copyright (c) 1994, 1995 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

/*
 * Definitions for "cpu-independent" clock handling for the alpha.
 */

/*
 * clocktime structure:
 *
 * structure passed to TOY clocks when setting them.  broken out this
 * way, so that the time_t -> field conversion can be shared.
 */
struct clocktime {
	int	year;			/* year - 1900 */
	int	mon;			/* month (1 - 12) */
	int	day;			/* day (1 - 31) */
	int	hour;			/* hour (0 - 23) */
	int	min;			/* minute (0 - 59) */
	int	sec;			/* second (0 - 59) */
	int	dow;			/* day of week (0 - 6; 0 = Sunday) */
};

/*
 * clockfns structure:
 *
 * function switch used by chip-independent clock code, to access
 * chip-dependent routines.
 */
struct clockfns {
	void	(*cf_init)(struct device *);
	void	(*cf_get)(struct device *, time_t, struct clocktime *);
	void	(*cf_set)(struct device *, struct clocktime *);
};

void clockattach(struct device *, const struct clockfns *);


code:
/*	$OpenBSD: conf.c,v 1.78 2014/12/11 19:44:16 tedu Exp $	*/
/*	$NetBSD: conf.c,v 1.16 1996/10/18 21:26:57 cgd Exp $	*/

/*-
 * Copyright (c) 1991 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *      @(#)conf.c	7.9 (Berkeley) 5/28/91
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/ioctl.h>
#include <sys/tty.h>
#include <sys/conf.h>
#include <sys/vnode.h>

#include "wd.h"
bdev_decl(wd);
#include "fd.h"
bdev_decl(fd);
#include "st.h"
#include "cd.h"
#include "sd.h"
#include "uk.h"
#include "vnd.h"
#include "rd.h"
#include "bktr.h"
#include "radio.h"

struct bdevsw	bdevsw[] =
{
	bdev_disk_init(NWD,wd),	        /* 0: ST506/ESDI/IDE disk */
	bdev_swap_init(1,sw),		/* 1: swap pseudo-device */
	bdev_tape_init(NST,st),		/* 2: SCSI tape */
	bdev_disk_init(NCD,cd),		/* 3: SCSI CD-ROM */
	bdev_disk_init(NFD,fd),		/* 4: Floppy disk */
	bdev_notdef(),			/* 5 */
	bdev_disk_init(NRD,rd),		/* 6: ram disk driver */
	bdev_notdef(),			/* 7: was: concatenated disk driver */
	bdev_disk_init(NSD,sd),		/* 8: SCSI disk */
	bdev_disk_init(NVND,vnd),	/* 9: vnode disk driver */
	bdev_notdef(),			/* 10 */
	bdev_notdef(),			/* 11 */
	bdev_notdef(),			/* 12 */
	bdev_notdef(),			/* 13 */
	bdev_notdef(),			/* 14 */
	bdev_notdef(),			/* 15 */
	bdev_notdef(),			/* 16 was: RAIDframe disk driver */
};
int	nblkdev = nitems(bdevsw);

#define	mmread  mmrw
#define	mmwrite mmrw
cdev_decl(mm);
#include "pty.h"
#include "tun.h"
#include "bpfilter.h"
#include "ch.h"
#include "scc.h"
cdev_decl(scc);
#include "audio.h"
#include "video.h"
#include "com.h"
cdev_decl(com);
#include "wsdisplay.h"
#include "wskbd.h"
#include "wsmouse.h"
#include "wsmux.h"
#include "midi.h"
cdev_decl(midi);

#include "spkr.h"
cdev_decl(spkr);

#include "bio.h"
#include "lpt.h"
cdev_decl(lpt);
cdev_decl(prom);			/* XXX XXX XXX */
cdev_decl(wd);
cdev_decl(fd);
#include "cy.h"
cdev_decl(cy);
#include "ksyms.h"

/* USB Devices */
#include "usb.h"
#include "uhid.h"
#include "ugen.h"
#include "ulpt.h"
#include "ucom.h"
#include "pf.h"
#ifdef USER_PCICONF
#include "pci.h"
cdev_decl(pci);
#endif

#include "systrace.h"
#include "hotplug.h"
#include "vscsi.h"
#include "pppx.h"
#include "fuse.h"

struct cdevsw	cdevsw[] =
{
	cdev_cn_init(1,cn),		/* 0: virtual console */
	cdev_ctty_init(1,ctty),		/* 1: controlling terminal */
	cdev_mm_init(1,mm),		/* 2: /dev/{null,mem,kmem,...} */
	cdev_notdef(),			/* 3 was /dev/drum */
	cdev_tty_init(NPTY,pts),	/* 4: pseudo-tty slave */
	cdev_ptc_init(NPTY,ptc),	/* 5: pseudo-tty master */
	cdev_log_init(1,log),		/* 6: /dev/klog */
	cdev_tun_init(NTUN,tun),	/* 7: network tunnel */
	cdev_disk_init(NSD,sd),		/* 8: SCSI disk */
	cdev_disk_init(NVND,vnd),	/* 9: vnode disk driver */
	cdev_fd_init(1,filedesc),	/* 10: file descriptor pseudo-dev */
	cdev_bpf_init(NBPFILTER,bpf),	/* 11: Berkeley packet filter */
	cdev_tape_init(NST,st),		/* 12: SCSI tape */
	cdev_disk_init(NCD,cd),		/* 13: SCSI CD-ROM */
	cdev_ch_init(NCH,ch),		/* 14: SCSI autochanger */
	cdev_tty_init(NSCC,scc),	/* 15: scc 8530 serial interface */
	cdev_notdef(),			/* 16 was lkm */
	cdev_notdef(),			/* 17 */
	cdev_notdef(),			/* 18 */
	cdev_notdef(),			/* 19 */
	cdev_notdef(),			/* 20 */
	cdev_notdef(),			/* 21 */
	cdev_notdef(),			/* 22 */
	cdev_tty_init(1,prom),          /* 23: XXX prom console */
	cdev_audio_init(NAUDIO,audio),	/* 24: generic audio I/O */
	cdev_wsdisplay_init(NWSDISPLAY,wsdisplay), /* 25: workstation console */
	cdev_tty_init(NCOM,com),	/* 26: ns16550 UART */
	cdev_notdef(),			/* 27: was: concatenated disk driver */
	cdev_disk_init(NRD,rd),		/* 28: ram disk driver */
	cdev_mouse_init(NWSKBD,wskbd),	/* 29: /dev/kbd XXX */
	cdev_mouse_init(NWSMOUSE,wsmouse),	/* 30: /dev/mouse XXX */
	cdev_lpt_init(NLPT,lpt),	/* 31: parallel printer */
	cdev_notdef(),			/* 32: */
	cdev_uk_init(NUK,uk),		/* 33: SCSI unknown */
	cdev_random_init(1,random),	/* 34: random data source */
	cdev_pf_init(NPF, pf),		/* 35: packet filter */
	cdev_disk_init(NWD,wd), 	/* 36: ST506/ESDI/IDE disk */
	cdev_disk_init(NFD,fd),		/* 37: Floppy disk */
        cdev_tty_init(NCY,cy),          /* 38: Cyclom serial port */
	cdev_ksyms_init(NKSYMS,ksyms),	/* 39: Kernel symbols device */
	cdev_spkr_init(NSPKR,spkr),	/* 40: PC speaker */
	cdev_midi_init(NMIDI,midi),     /* 41: MIDI I/O */
        cdev_notdef(),   		/* 42 was: sequencer I/O */
	cdev_notdef(),			/* 43 was: RAIDframe disk driver */
	cdev_video_init(NVIDEO,video),	/* 44: generic video I/O */
	cdev_usb_init(NUSB,usb),	/* 45: USB controller */
	cdev_usbdev_init(NUHID,uhid),	/* 46: USB generic HID */
	cdev_ulpt_init(NULPT,ulpt),	/* 47: USB printer */
	cdev_usbdev_init(NUGEN,ugen),	/* 48: USB generic driver */
	cdev_tty_init(NUCOM, ucom),	/* 49: USB tty */
	cdev_systrace_init(NSYSTRACE,systrace),	/* 50 system call tracing */
	cdev_notdef(),			/* 51 */
#ifdef USER_PCICONF
	cdev_pci_init(NPCI,pci),	/* 52: PCI user */
#else
	cdev_notdef(),
#endif
	cdev_bio_init(NBIO,bio),	/* 53: ioctl tunnel */
	cdev_notdef(),
	cdev_ptm_init(NPTY,ptm),	/* 55: pseudo-tty ptm device */
	cdev_hotplug_init(NHOTPLUG,hotplug), /* 56: devices hot plugging */
	cdev_notdef(),			/* 57: was: /dev/crypto */
	cdev_bktr_init(NBKTR,bktr),	/* 58: Bt848 video capture device */
	cdev_radio_init(NRADIO,radio), /* 59: generic radio I/O */
	cdev_mouse_init(NWSMUX, wsmux),	/* 60: ws multiplexor */
	cdev_vscsi_init(NVSCSI, vscsi),	/* 61: vscsi */
	cdev_notdef(),
	cdev_disk_init(1,diskmap),	/* 63: disk mapper */
	cdev_pppx_init(NPPPX,pppx),	/* 64: pppx */
	cdev_notdef(),			/* 65: was urio */
	cdev_notdef(),			/* 66: was USB scanners */
	cdev_fuse_init(NFUSE,fuse),	/* 67: fuse */
};
int	nchrdev = nitems(cdevsw);

int	mem_no = 2; 	/* major device number of memory special file */

/*
 * Swapdev is a fake device implemented
 * in sw.c used only internally to get to swstrategy.
 * It cannot be provided to the users, because the
 * swstrategy routine munches the b_dev and b_blkno entries
 * before calling the appropriate driver.  This would horribly
 * confuse, e.g. the hashing routines. Instead, /dev/drum is
 * provided as a character (raw) device.
 */
dev_t	swapdev = makedev(1, 0);

/*
 * Returns true if dev is /dev/mem or /dev/kmem.
 */
int
iskmemdev(dev)
	dev_t dev;
{

	return (major(dev) == mem_no && minor(dev) < 2);
}

/*
 * Returns true if dev is /dev/zero.
 */
int
iszerodev(dev)
	dev_t dev;
{

	return (major(dev) == mem_no && minor(dev) == 12);
}

dev_t
getnulldev()
{
	return makedev(mem_no, 2);
}

int chrtoblktbl[] = {
	/*VCHR*/	/*VBLK*/
	/*  0 */	NODEV,
	/*  1 */	NODEV,
	/*  2 */	NODEV,
	/*  3 */	NODEV,
	/*  4 */	NODEV,
	/*  5 */	NODEV,
	/*  6 */	NODEV,
	/*  7 */	NODEV,
	/*  8 */	8,		/* sd */
	/*  9 */	9,		/* vnd */
	/* 10 */	NODEV,
	/* 11 */	NODEV,
	/* 12 */	2,		/* st */
	/* 13 */	3,		/* cd */
	/* 14 */	NODEV,
	/* 15 */	NODEV,
	/* 16 */	NODEV,
	/* 17 */	NODEV,
	/* 18 */	NODEV,
	/* 19 */	NODEV,
	/* 20 */	NODEV,
	/* 21 */	NODEV,
	/* 22 */	NODEV,
	/* 23 */	NODEV,
	/* 24 */	NODEV,
	/* 25 */	NODEV,
	/* 26 */	NODEV,
	/* 27 */	NODEV,
	/* 28 */	6,		/* rd */
	/* 29 */	NODEV,
	/* 30 */	NODEV,
	/* 31 */	NODEV,
	/* 32 */	NODEV,
	/* 33 */	NODEV,
	/* 34 */	NODEV,
	/* 35 */	NODEV,
	/* 36 */	0,
	/* 37 */	4,		/* fd */
	/* 38 */	NODEV,
	/* 39 */	NODEV,
	/* 40 */	NODEV,
	/* 41 */	NODEV,
	/* 42 */	NODEV,
	/* 43 */	16,		/* raid */
	/* 44 */	NODEV,
	/* 45 */	NODEV,
	/* 46 */	NODEV,
	/* 47 */	NODEV,
	/* 48 */	NODEV,
	/* 49 */	NODEV,
	/* 50 */	NODEV,
	/* 51 */	NODEV,
};
int nchrtoblktbl = nitems(chrtoblktbl);


code:
/* $OpenBSD: cpu.c,v 1.38 2015/01/04 18:52:46 miod Exp $ */
/* $NetBSD: cpu.c,v 1.44 2000/05/23 05:12:53 thorpej Exp $ */

/*-
 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
 * NASA Ames Research Center.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/proc.h>
#include <sys/user.h>
#include <dev/rndvar.h>

#include <uvm/uvm_extern.h>

#include <machine/atomic.h>
#include <machine/autoconf.h>
#include <machine/cpu.h>
#include <machine/rpb.h>
#include <machine/prom.h>

struct cpu_info cpu_info_primary;
struct cpu_info *cpu_info_list = &cpu_info_primary;

#if defined(MULTIPROCESSOR)
#include <sys/malloc.h>

/*
 * Array of CPU info structures.  Must be statically-allocated because
 * curproc, etc. are used early.
 */
struct cpu_info *cpu_info[ALPHA_MAXPROCS];

/* Bitmask of CPUs booted, currently running, and paused. */
volatile u_long cpus_booted;
volatile u_long cpus_running;
volatile u_long cpus_paused;

void	cpu_boot_secondary(struct cpu_info *);
#endif /* MULTIPROCESSOR */

/*
 * The Implementation Version and the Architecture Mask must be
 * consistent across all CPUs in the system, so we set it for the
 * primary and announce the AMASK extensions if they exist.
 *
 * Note, we invert the AMASK so that if a bit is set, it means "has
 * extension".
 */
u_long	cpu_implver, cpu_amask;

/* Definition of the driver for autoconfig. */
int	cpumatch(struct device *, void *, void *);
void	cpuattach(struct device *, struct device *, void *);

struct cfattach cpu_ca = {
	sizeof(struct device), cpumatch, cpuattach
};

struct cfdriver cpu_cd = {
	NULL, "cpu", DV_DULL
};

void	cpu_announce_extensions(struct cpu_info *);

static const char *ev4minor[] = {
	"pass 2 or 2.1", "pass 3", 0
}, *lcaminor[] = {
	"",
	"21066 pass 1 or 1.1", "21066 pass 2",
	"21068 pass 1 or 1.1", "21068 pass 2",
	"21066A pass 1", "21068A pass 1", 0
}, *ev5minor[] = {
	"", "pass 2, rev BA or 2.2, rev CA", "pass 2.3, rev DA or EA",
	"pass 3", "pass 3.2", "pass 4", 0
}, *ev45minor[] = {
	"", "pass 1", "pass 1.1", "pass 2", 0
}, *ev56minor[] = {
	"", "pass 1", "pass 2", 0
}, *ev6minor[] = {
	"", "pass 1", "pass 2 or 2.1", "pass 2.2", "pass 2.3", "pass 3",
	"pass 2.4", "pass 2.5", 0
}, *pca56minor[] = {
	"", "pass 1", 0
}, *pca57minor[] = {
	"", "pass 1", 0
}, *ev67minor[] = {
	"", "pass 1", "pass 2.1", "pass 2.2", "pass 2.1.1",
	"pass 2.2.1", "pass 2.3 or 2.4", "pass 2.1.2", "pass 2.2.2",
	"pass 2.2.3 or 2.2.5", "pass 2.2.4", "pass 2.5", "pass 2.4.1",
	"pass 2.5.1", "pass 2.6", 0
}, *ev68cbminor[] = {
	/* what is the value for pass 2.3? */
	"", "", "", "", "",
	"pass 2.4", "pass 4.0", 0
};

struct cputable_struct {
	int	cpu_major_code;
	const char *cpu_major_name;
	const char **cpu_minor_names;
} cpunametable[] = {
	{ PCS_PROC_EV3,		"EV3",		0		},
	{ PCS_PROC_EV4,		"21064",	ev4minor	},
	{ PCS_PROC_SIMULATION,	"Sim",		0		},
	{ PCS_PROC_LCA4,	"LCA",		lcaminor	},
	{ PCS_PROC_EV5,		"21164",	ev5minor	},
	{ PCS_PROC_EV45,	"21064A",	ev45minor	},
	{ PCS_PROC_EV56,	"21164A",	ev56minor	},
	{ PCS_PROC_EV6,		"21264",	ev6minor	},
	{ PCS_PROC_PCA56,	"PCA56",	pca56minor	},
	{ PCS_PROC_PCA57,	"PCA57",	pca57minor	},
	{ PCS_PROC_EV67,	"21264A",	ev67minor	},
	{ PCS_PROC_EV68CB,	"21264C",	ev68cbminor	},
	{ PCS_PROC_EV68AL,	"21264B",	NULL		},
	{ PCS_PROC_EV68CX,	"21264D",	NULL		},
};

/*
 * The following is an attempt to map out how booting secondary CPUs
 * works.
 *
 * As we find processors during the autoconfiguration sequence, all
 * processors have idle stacks and PCBs created for them, including
 * the primary (although the primary idles on proc0's PCB until its
 * idle PCB is created).
 *
 * As one of the last steps in booting, main() calls, on proc0's
 * context, cpu_boot_secondary_processors().  This is our key to
 * actually spin up the additional processors we've found.  We
 * run through our cpu_info[] array looking for secondary processors
 * with idle PCBs, and spin them up.
 *
 * The spinup involves switching the secondary processor to the
 * OSF/1 PALcode, setting the entry point to cpu_spinup_trampoline(),
 * and sending a "START" message to the secondary's console.
 *
 * Upon successful processor bootup, the cpu_spinup_trampoline will call
 * cpu_hatch(), which will print a message indicating that the processor
 * is running, and will set the "hatched" flag in its softc.  At the end
 * of cpu_hatch() is a spin-forever loop; we do not yet attempt to schedule
 * anything on secondary CPUs.
 */

int
cpumatch(struct device *parent, void *cfdata, void *aux)
{
	struct mainbus_attach_args *ma = aux;

	/* make sure that we're looking for a CPU. */
	if (strcmp(ma->ma_name, cpu_cd.cd_name) != 0)
		return (0);

#ifndef MULTIPROCESSOR
	/* Only attach the boot processor. */
	if (ma->ma_slot != hwrpb->rpb_primary_cpu_id)
		return (0);
#endif

	return (1);
}

void
cpuattach(struct device *parent, struct device *dev, void *aux)
{
	struct mainbus_attach_args *ma = aux;
	struct cpu_info *ci;
	int i;
	const char **s;
	struct pcs *p;
#ifdef DEBUG
	int needcomma;
#endif
	u_int32_t major, minor;
#if defined(MULTIPROCESSOR)
	extern paddr_t avail_start, avail_end;
	struct pcb *pcb;
	struct pglist mlist;
	int error;
#endif

	p = LOCATE_PCS(hwrpb, ma->ma_slot);
	major = PCS_CPU_MAJORTYPE(p);
	minor = PCS_CPU_MINORTYPE(p);

	printf(": ID %d%s, ", ma->ma_slot,
	    ma->ma_slot == hwrpb->rpb_primary_cpu_id ? " (primary)" : "");

	for (i = 0; i < sizeof cpunametable / sizeof cpunametable[0]; ++i) {
		if (cpunametable[i].cpu_major_code == major) {
			printf("%s-%d", cpunametable[i].cpu_major_name, minor);
			s = cpunametable[i].cpu_minor_names;
			for (i = 0; s && s[i]; ++i) {
				if (i == minor && strlen(s[i]) != 0) {
					printf(" (%s)", s[i]);
					goto recognized;
				}
			}
			printf(" (unknown minor type %d)", minor);
			goto recognized;
		}
	}
	printf("UNKNOWN CPU TYPE (%d:%d)", major, minor);

recognized:
	printf("\n");

#ifdef DEBUG
	if (p->pcs_proc_var != 0) {
		printf("%s: ", dev->dv_xname);

		needcomma = 0;
		if (p->pcs_proc_var & PCS_VAR_VAXFP) {
			printf("VAX FP support");
			needcomma = 1;
		}
		if (p->pcs_proc_var & PCS_VAR_IEEEFP) {
			printf("%sIEEE FP support", needcomma ? ", " : "");
			needcomma = 1;
		}
		if (p->pcs_proc_var & PCS_VAR_PE) {
			printf("%sPrimary Eligible", needcomma ? ", " : "");
			needcomma = 1;
		}
		if (p->pcs_proc_var & PCS_VAR_RESERVED)
			printf("%sreserved bits: 0x%lx", needcomma ? ", " : "",
			    p->pcs_proc_var & PCS_VAR_RESERVED);
		printf("\n");
	}
#endif

#if defined(MULTIPROCESSOR)
	if (ma->ma_slot > ALPHA_WHAMI_MAXID) {
		printf("%s: processor ID too large, ignoring\n", dev->dv_xname);
		return;
	}
#endif /* MULTIPROCESSOR */

#if defined(MULTIPROCESSOR)
	if (ma->ma_slot == hwrpb->rpb_primary_cpu_id)
		ci = &cpu_info_primary;
	else
		ci = malloc(sizeof(*ci), M_DEVBUF, M_WAITOK | M_ZERO);

	cpu_info[ma->ma_slot] = ci;
#else
	ci = &cpu_info_primary;
#endif
	ci->ci_cpuid = ma->ma_slot;
	ci->ci_dev = dev;

#if defined(MULTIPROCESSOR)
	/*
	 * Make sure the processor is available for use.
	 */
	if ((p->pcs_flags & PCS_PA) == 0) {
		if (ma->ma_slot == hwrpb->rpb_primary_cpu_id)
			panic("cpu_attach: primary not available?!");
		printf("%s: processor not available for use\n", dev->dv_xname);
		return;
	}

	/* Make sure the processor has valid PALcode. */
	if ((p->pcs_flags & PCS_PV) == 0) {
		if (ma->ma_slot == hwrpb->rpb_primary_cpu_id)
			panic("cpu_attach: primary has invalid PALcode?!");
		printf("%s: PALcode not valid\n", ci->ci_dev->dv_xname);
		return;
	}

	/*
	 * Allocate UPAGES contiguous pages for the idle PCB and stack.
	 */
	TAILQ_INIT(&mlist);
	error = uvm_pglistalloc(USPACE, avail_start, avail_end - 1, 0, 0,
	    &mlist, 1, UVM_PLA_WAITOK);
	if (error != 0) {
		if (ma->ma_slot == hwrpb->rpb_primary_cpu_id) {
			panic("cpu_attach: unable to allocate idle stack for"
			    " primary");
		}
		printf("%s: unable to allocate idle stack\n", dev->dv_xname);
		return;
	}

	ci->ci_idle_pcb_paddr = VM_PAGE_TO_PHYS(TAILQ_FIRST(&mlist));
	pcb = ci->ci_idle_pcb = (struct pcb *)
	    ALPHA_PHYS_TO_K0SEG(ci->ci_idle_pcb_paddr);
	memset(pcb, 0, USPACE);

	/*
	 * Initialize the idle stack pointer, reserving space for an
	 * (empty) trapframe (XXX is the trapframe really necessary?)
	 */
	pcb->pcb_hw.apcb_ksp = pcb->pcb_hw.apcb_backup_ksp =
	    (u_int64_t)pcb + USPACE - sizeof(struct trapframe);

	/*
	 * Initialize the idle PCB.
	 */
	pcb->pcb_hw.apcb_asn = proc0.p_addr->u_pcb.pcb_hw.apcb_asn;
	pcb->pcb_hw.apcb_ptbr = proc0.p_addr->u_pcb.pcb_hw.apcb_ptbr;
#if 0
	printf("%s: hwpcb ksp = 0x%lx\n", dev->dv_xname,
	    pcb->pcb_hw.apcb_ksp);
	printf("%s: hwpcb ptbr = 0x%lx\n", dev->dv_xname,
	    pcb->pcb_hw.apcb_ptbr);
#endif
#endif /* MULTIPROCESSOR */

	/*
	 * If we're the primary CPU, no more work to do; we're already
	 * running!
	 */
	if (ma->ma_slot == hwrpb->rpb_primary_cpu_id) {
		cpu_announce_extensions(ci);
#if defined(MULTIPROCESSOR)
		ci->ci_flags |= CPUF_PRIMARY | CPUF_RUNNING;
		atomic_setbits_ulong(&cpus_booted, (1UL << ma->ma_slot));
		atomic_setbits_ulong(&cpus_running, (1UL << ma->ma_slot));
#endif /* MULTIPROCESSOR */
	} else {
#if defined(MULTIPROCESSOR)
		/*
		 * Boot the secondary processor.  It will announce its
		 * extensions, and then spin up until we tell it to go
		 * on its merry way.
		 */
		cpu_boot_secondary(ci);
#endif /* MULTIPROCESSOR */
	}
}

void
cpu_announce_extensions(struct cpu_info *ci)
{
	u_long implver, amask = 0;

	implver = alpha_implver();
	if (implver >= ALPHA_IMPLVER_EV5)
		amask = (~alpha_amask(ALPHA_AMASK_ALL)) & ALPHA_AMASK_ALL;

	if (ci->ci_cpuid == hwrpb->rpb_primary_cpu_id) {
		cpu_implver = implver;
		cpu_amask = amask;
	} else {
		if (implver < cpu_implver)
			printf("%s: WARNING: IMPLVER %lu < %lu\n",
			    ci->ci_dev->dv_xname, implver, cpu_implver);

		/*
		 * Cap the system architecture mask to the intersection
		 * of features supported by all processors in the system.
		 */
		cpu_amask &= amask;
	}

	if (amask) {
		printf("%s: architecture extensions: %lb\n",
		    ci->ci_dev->dv_xname, amask, ALPHA_AMASK_BITS);
	}
}

#if defined(MULTIPROCESSOR)
void
cpu_boot_secondary_processors(void)
{
	struct cpu_info *ci;
	u_long i;

	for (i = 0; i < ALPHA_MAXPROCS; i++) {
		ci = cpu_info[i];
		if (ci == NULL || ci->ci_idle_pcb == NULL)
			continue;
		if (ci->ci_flags & CPUF_PRIMARY)
			continue;
		if ((cpus_booted & (1UL << i)) == 0)
			continue;

		/*
		 * Link the processor into the list, and launch it.
		 */
		ci->ci_next = cpu_info_list->ci_next;
		cpu_info_list->ci_next = ci;
		atomic_setbits_ulong(&ci->ci_flags, CPUF_RUNNING);
		atomic_setbits_ulong(&cpus_running, (1UL << i));
		ncpus++;
	}

	/*
	 * Reset the HWRPB to prevent processors resetting from
	 * running through the hatching code again.
	 */
	hwrpb->rpb_restart = 0;
	hwrpb->rpb_checksum = hwrpb_checksum();
}

void
cpu_boot_secondary(struct cpu_info *ci)
{
	long timeout;
	struct pcs *pcsp, *primary_pcsp;
	struct pcb *pcb;
	u_long cpumask;

	pcb = ci->ci_idle_pcb;
	primary_pcsp = LOCATE_PCS(hwrpb, hwrpb->rpb_primary_cpu_id);
	pcsp = LOCATE_PCS(hwrpb, ci->ci_cpuid);
	cpumask = (1UL << ci->ci_cpuid);

	/*
	 * Set up the PCS's HWPCB to match ours.
	 */
	memcpy(pcsp->pcs_hwpcb, &pcb->pcb_hw, sizeof(pcb->pcb_hw));

	/*
	 * Set up the HWRPB to restart the secondary processor
	 * with our spin-up trampoline.
	 */
	hwrpb->rpb_restart = (u_int64_t) cpu_spinup_trampoline;
	hwrpb->rpb_restart_val = (u_int64_t) ci;
	hwrpb->rpb_checksum = hwrpb_checksum();

	/*
	 * Configure the CPU to start in OSF/1 PALcode by copying
	 * the primary CPU's PALcode revision info to the secondary
	 * CPUs PCS.
	 */
	memcpy(&pcsp->pcs_pal_rev, &primary_pcsp->pcs_pal_rev,
	    sizeof(pcsp->pcs_pal_rev));
	pcsp->pcs_flags |= (PCS_CV|PCS_RC);
	pcsp->pcs_flags &= ~PCS_BIP;

	/* Make sure the secondary console sees all this. */
	alpha_mb();

	/* Send a "START" command to the secondary CPU's console. */
	if (cpu_iccb_send(ci->ci_cpuid, "START\r\n")) {
		printf("%s: unable to issue `START' command\n",
		    ci->ci_dev->dv_xname);
		return;
	}

	/* Wait for the processor to boot. */
	for (timeout = 10000; timeout != 0; timeout--) {
		alpha_mb();
		if (pcsp->pcs_flags & PCS_BIP)
			break;
		delay(1000);
	}
	if (timeout == 0)
		printf("%s: processor failed to boot\n", ci->ci_dev->dv_xname);

	/*
	 * ...and now wait for verification that it's running kernel
	 * code.
	 */
	for (timeout = 10000; timeout != 0; timeout--) {
		alpha_mb();
		if (cpus_booted & cpumask)
			break;
		delay(1000);
	}
	if (timeout == 0)
		printf("%s: processor failed to hatch\n", ci->ci_dev->dv_xname);
}

void
cpu_pause_resume(u_long cpu_id, int pause)
{
	u_long cpu_mask = (1UL << cpu_id);

	if (pause) {
		atomic_setbits_ulong(&cpus_paused, cpu_mask);
		alpha_send_ipi(cpu_id, ALPHA_IPI_PAUSE);
	} else
		atomic_clearbits_ulong(&cpus_paused, cpu_mask);
}

void
cpu_pause_resume_all(int pause)
{
	struct cpu_info *ci, *self = curcpu();
	CPU_INFO_ITERATOR cii;

	CPU_INFO_FOREACH(cii, ci) {
		if (ci == self)
			continue;
		cpu_pause_resume(ci->ci_cpuid, pause);
	}
}

void
cpu_halt(void)
{
#if 0
	struct cpu_info *ci = curcpu();
#endif
	u_long cpu_id = cpu_number();
	struct pcs *pcsp = LOCATE_PCS(hwrpb, cpu_id);

#if 0
	printf("%s: shutting down...\n", ci->ci_dev->dv_xname);
#endif

	pcsp->pcs_flags &= ~(PCS_RC | PCS_HALT_REQ);
	pcsp->pcs_flags |= PCS_HALT_STAY_HALTED;

	atomic_clearbits_ulong(&cpus_running, (1UL << cpu_id));
	atomic_clearbits_ulong(&cpus_booted, (1U << cpu_id));

	alpha_pal_halt();
	/* NOTREACHED */
}

void
cpu_hatch(struct cpu_info *ci)
{
	u_long cpu_id = cpu_number();
	u_long cpumask = (1UL << cpu_id);
	int s;

	/* Mark the kernel pmap active on this processor. */
	atomic_setbits_ulong(&pmap_kernel()->pm_cpus, cpumask);

	/* Initialize trap vectors for this processor. */
	trap_init();

	/* Yahoo!  We're running kernel code!  Announce it! */
	cpu_announce_extensions(ci);

	atomic_setbits_ulong(&cpus_booted, cpumask);

	/*
	 * Spin here until we're told we can start.
	 */
	while ((cpus_running & cpumask) == 0)
		/* spin */ ;

	/*
	 * Invalidate the TLB and sync the I-stream before we
	 * jump into the kernel proper.  We have to do this
	 * because we haven't been getting IPIs while we've
	 * been spinning.
	 */
	ALPHA_TBIA();
	alpha_pal_imb();

	KERNEL_LOCK();
	sched_init_cpu(ci);
	nanouptime(&ci->ci_schedstate.spc_runtime);
	ci->ci_curproc = ci->ci_fpcurproc = NULL;
	ci->ci_randseed = (arc4random() & 0x7fffffff) + 1;
	KERNEL_UNLOCK();

	(void) alpha_pal_swpipl(ALPHA_PSL_IPL_0);
	SCHED_LOCK(s);
	cpu_switchto(NULL, sched_chooseproc());
	/* NOTREACHED */
}

int
cpu_iccb_send(cpuid_t cpu_id, const char *msg)
{
	struct pcs *pcsp = LOCATE_PCS(hwrpb, cpu_id);
	int timeout;
	u_long cpumask = (1UL << cpu_id);

	/* Wait for the ICCB to become available. */
	for (timeout = 10000; timeout != 0; timeout--) {
		alpha_mb();
		if ((hwrpb->rpb_rxrdy & cpumask) == 0)
			break;
		delay(1000);
	}
	if (timeout == 0)
		return (EIO);

	/*
	 * Copy the message into the ICCB, and tell the secondary console
	 * that it's there.  The atomic operation performs a memory barrier.
	 */
	strlcpy(pcsp->pcs_iccb.iccb_rxbuf, msg,
	    sizeof pcsp->pcs_iccb.iccb_rxbuf);
	pcsp->pcs_iccb.iccb_rxlen = strlen(msg);
	/* XXX cast to volatile */
	atomic_setbits_ulong((volatile u_long *)&hwrpb->rpb_rxrdy, cpumask);
	alpha_mb();

	/* Wait for the message to be received. */
	for (timeout = 10000; timeout != 0; timeout--) {
		alpha_mb();
		if ((hwrpb->rpb_rxrdy & cpumask) == 0)
			break;
		delay(1000);
	}
	if (timeout == 0)
		return (EIO);

	return (0);
}

void
cpu_iccb_receive(void)
{
#if 0	/* Don't bother... we don't get any important messages anyhow. */
	u_int64_t txrdy;
	char *cp1, *cp2, buf[80];
	struct pcs *pcsp;
	u_int cnt;
	cpuid_t cpu_id;

	txrdy = hwrpb->rpb_txrdy;

	for (cpu_id = 0; cpu_id < hwrpb->rpb_pcs_cnt; cpu_id++) {
		if (txrdy & (1UL << cpu_id)) {
			pcsp = LOCATE_PCS(hwrpb, cpu_id);
			printf("Inter-console message from CPU %lu "
			    "HALT REASON = 0x%lx, FLAGS = 0x%lx\n",
			    cpu_id, pcsp->pcs_halt_reason, pcsp->pcs_flags);

			cnt = pcsp->pcs_iccb.iccb_txlen;
			if (cnt >= 80) {
				printf("Malformed inter-console message\n");
				continue;
			}
			cp1 = pcsp->pcs_iccb.iccb_txbuf;
			cp2 = buf;
			while (cnt--) {
				if (*cp1 != '\r' && *cp1 != '\n')
					*cp2++ = *cp1;
				cp1++;
			}
			*cp2 = '\0';
			printf("Message from CPU %lu: %s\n", cpu_id, buf);
		}
	}
#endif /* 0 */
	hwrpb->rpb_txrdy = 0;
	alpha_mb();
}

void
cpu_unidle(struct cpu_info *ci)
{
	if (ci != curcpu())
		alpha_send_ipi(ci->ci_cpuid, ALPHA_IPI_AST);
}
#endif /* MULTIPROCESSOR */


code:
/* $OpenBSD: cpuconf.c,v 1.14 2013/03/09 02:10:47 deraadt Exp $ */
/* $NetBSD: cpuconf.c,v 1.27 2000/06/26 02:42:04 enami Exp $ */

/*-
 * Copyright (c) 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Christopher G. Demetriou
 *	for the NetBSD Project.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/param.h>
#include <sys/device.h>
#include <sys/systm.h>
#include <machine/cpuconf.h>
#include <machine/rpb.h>

#ifdef DEC_3000_500
extern void dec_3000_500_init(void);
#else
#define	dec_3000_500_init	platform_not_configured
#endif

#ifdef DEC_3000_300
extern void dec_3000_300_init(void);
#else
#define	dec_3000_300_init	platform_not_configured
#endif

#ifdef DEC_AXPPCI_33
extern void dec_axppci_33_init(void);
#else
#define	dec_axppci_33_init	platform_not_configured
#endif

#ifdef DEC_2100_A50
extern void dec_2100_a50_init(void);
#else
#define	dec_2100_a50_init	platform_not_configured
#endif

#ifdef DEC_KN20AA
extern void dec_kn20aa_init(void);
#else
#define	dec_kn20aa_init		platform_not_configured
#endif

#ifdef DEC_EB164
extern void dec_eb164_init(void);
#else
#define	dec_eb164_init		platform_not_configured
#endif

#ifdef DEC_EB64PLUS
extern void dec_eb64plus_init(void);
#else
#define dec_eb64plus_init	platform_not_configured
#endif

#ifdef	DEC_KN300
extern void dec_kn300_init(void);
#else
#define	dec_kn300_init		platform_not_configured
#endif

#ifdef DEC_550
extern void dec_550_init(void);
#else
#define	dec_550_init		platform_not_configured
#endif

#if defined(DEC_1000) || defined(DEC_1000A)
extern void _dec_1000a_init(void);
#endif
#ifdef DEC_1000A
#define	dec_1000a_init		_dec_1000a_init
#else
#define	dec_1000a_init		platform_not_configured
#endif
#ifdef DEC_1000
#define	dec_1000_init		_dec_1000a_init
#else
#define	dec_1000_init		platform_not_configured
#endif

#ifdef DEC_6600
extern void dec_6600_init(void);
#else
#define	dec_6600_init		platform_not_configured
#endif

#ifdef DEC_ALPHABOOK1
extern void dec_alphabook1_init(void);
#else
#define	dec_alphabook1_init	platform_not_configured
#endif

#ifdef API_UP1000
extern void api_up1000_init(void);
#else
#define	api_up1000_init		platform_not_configured
#endif

static const struct cpuinit cpuinit[] = {
	cpu_notsupp(ST_ADU, "Alpha Demo Unit"),
	cpu_notsupp(ST_DEC_4000, "DEC 4000 (``Cobra'')"),
	cpu_notsupp(ST_DEC_7000, "DEC 7000 (``Ruby'')"),
	cpu_init(ST_DEC_3000_500, dec_3000_500_init, "DEC_3000_500"),
	cpu_notsupp(ST_DEC_2000_300, "DEC_2000_300"),
	cpu_init(ST_DEC_3000_300, dec_3000_300_init, "DEC_3000_300"),
	cpu_notsupp(ST_AVALON_A12, "AVALON_A12"),
	cpu_notsupp(ST_DEC_2100_A500, "DEC_2100_A500"),
	cpu_notsupp(ST_DEC_APXVME_64, "AXPvme 64"),
	cpu_init(ST_DEC_AXPPCI_33, dec_axppci_33_init, "DEC_AXPPCI_33"),
	cpu_notsupp(ST_DEC_21000, "DEC_KN8AE"),
	cpu_init(ST_DEC_2100_A50, dec_2100_a50_init, "DEC_2100_A50"),
	cpu_notsupp(ST_DEC_MUSTANG, "Mustang"),
	cpu_init(ST_DEC_KN20AA, dec_kn20aa_init, "DEC_KN20AA"),
	cpu_init(ST_DEC_1000, dec_1000_init, "DEC_1000"),
	cpu_notsupp(ST_EB66, "DEC_EB66"),
	cpu_init(ST_ALPHABOOK1, dec_alphabook1_init, "DEC_ALPHABOOK1"),
	cpu_init(ST_DEC_4100, dec_kn300_init, "DEC_KN300"),
	cpu_notsupp(ST_DEC_EV45_PBP, "EV45 Passive Backplane Board"),
	cpu_notsupp(ST_DEC_2100A_A500, "DEC_2100A_A500"),
	cpu_init(ST_EB164, dec_eb164_init, "DEC_EB164"),
	cpu_init(ST_DEC_1000A, dec_1000a_init, "DEC_1000A"),
	cpu_notsupp(ST_DEC_ALPHAVME_224, "AlphaVME 224"),
	cpu_init(ST_DEC_550, dec_550_init, "DEC_550"),
	cpu_notsupp(ST_DEC_EV56_PBP, "EV56 Passive Backplane Board"),
	cpu_notsupp(ST_DEC_ALPHAVME_320, "AlphaVME 320"),
	cpu_init(ST_DEC_6600, dec_6600_init, "DEC_6600"),
	cpu_init(ST_DEC_TITAN, dec_6600_init, "DEC_6600"),
	cpu_init(ST_API_NAUTILUS, api_up1000_init, "API_UP1000"),
};
static const int ncpuinit = (sizeof(cpuinit) / sizeof(cpuinit[0]));

const struct cpuinit *
platform_lookup(int systype)
{
	const struct cpuinit *c;
	int i;

	for (i = 0; i < ncpuinit; i++) {
		c = &cpuinit[i];
		if (c->systype == systype)
			return (c);
	}
	return (NULL);
}

void
platform_not_configured()
{
	const struct cpuinit *c = platform_lookup(cputype);

	printf("\nSupport for system type %d is not present in this kernel.\n",
	    cputype);
	printf("Please build a kernel with \"options %s\" and reboot.\n",
	    c->option);
	panic("platform not configured");
}

void
platform_not_supported()
{
	const struct cpuinit *c = platform_lookup(cputype);

	printf("\nOpenBSD does not yet support system type %d (%s).\n", cputype,
	    (c != NULL) ? c->option : "???");
	panic("platform not supported");
}


code:
/* $OpenBSD: db_disasm.c,v 1.22 2008/10/04 15:34:45 martynas Exp $ */
/* $NetBSD: db_disasm.c,v 1.8 2000/05/25 19:57:30 jhawk Exp $ */

/*
 * Mach Operating System
 * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University
 * All Rights Reserved.
 *
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 */

/*
 *	File: db_disasm.c
 * 	Author: Alessandro Forin, Carnegie Mellon University
 *	Date:	11/91
 *
 *	Disassembler for Alpha
 *
 *	Modified for NetBSD/alpha by:
 *
 *	Christopher G. Demetriou, Carnegie Mellon University
 *
 *	Jason R. Thorpe, Numerical Aerospace Simulation Facility,
 *	NASA Ames Research Center
 *
 *	This code was derived exclusively from information available in
 *	"Alpha Architecture Reference Manual", Richard L. Sites ed.
 *	Digital Press, Burlington, MA 01803
 *	ISBN 1-55558-098-X, Order no. EY-L520E-DP
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/proc.h>
#include <machine/db_machdep.h>
#include <alpha/alpha/db_instruction.h>

#include <machine/pal.h>

#include <ddb/db_access.h>
#include <ddb/db_sym.h>
#include <ddb/db_output.h>
#include <ddb/db_interface.h>

/*
 * This would belong in a header file, except noone else needs it
 *
 * XXX THESE SHOULD BE CONVERTED TO ra, rb, rc FORMAT.
 */
typedef union {
	/*
	 *	All instructions are 32 bits wide, PAL included
	 */
	unsigned int	bits;

	/*
	 *	Internal processor register access instrs
	 *	specify the IPR index, doubly specify the
	 *	(same) GP register as src/dest, and qualifiers
	 *	for the IPR set involved (abox/ibox/tmp)
	 */
	struct {
		unsigned	index : 5,
				regset : 3, /* a,i,p */
				xxx : 8,
				rs : 5,
				rd : 5,
				opcode : 6;
	} mXpr_format;

	/*
	 *	Load/store instructions have a 12 bit displacement,
	 *	and two register specifiers just as normal ld/st.
	 *	Four bits have special meanings:
	 *		phy: bypass the MMU (physical access)
	 *		alt: use mode in ALT register for checks,
	 *		     or if PHY is also on locked/linked access
	 *		rwc: read-with-write-check (probew)
	 *		qw:  quadword access
	 */
	struct {
		signed int	displacement : 12;
		unsigned	qw : 1,
				qualif : 3,
				rs : 5,
				rd : 5,
				opcode : 6;
	} mem_format;

	/*
	 *	Return from exception or interrupt has
	 *	a branch-like encoding, but only one
	 *	instantiation is actually usable.
	 */
	struct {
		unsigned	xxx : 14,
				zero : 1,	/* branch prediction! */
				one : 1,
				rb : 5,		/* r31 or stall */
				ra : 5,		/* r31 or stall */
				opcode : 6;
	} rei_format;

} pal_instruction;

/*
 * Major opcodes
 */
static char *op_name[64] = {
/* 0 */	"call_pal", "op1", "op2", "op3", "op4",	"op5",	"op6",	"op7",
/* 8 */	"lda",	"ldah",	"ldbu",	"ldq_u","ldwu",	"stw",	"stb",	"stq_u",
/*16 */	"arit",	"logical","bit","mul",	"op20",	"vaxf",	"ieeef","anyf",
/*24 */	"spec",	"hw_mfpr","jump","hw_ld","intmisc","hw_mtpr","hw_rei","hw_st",
/*32 */	"ldf",	"ldg",	"lds",	"ldt",	"stf",	"stg",	"sts",	"stt",
/*40 */	"ldl",	"ldq",	"ldl_l","ldq_l","stl",	"stq",	"stl_c","stq_c",
/*48 */	"br",	"fbeq",	"fblt",	"fble",	"bsr",	"fbne",	"fbge",	"fbgt",
/*56 */	"blbc",	"beq",	"blt",	"ble",	"blbs",	"bne",	"bge",	"bgt"
};

/*
 * The function field is too big (7 or 11 bits), so the sub-tables
 * are addressed in a somewhat complicated manner to save
 * space.  After all, alu operations is what RISCs are good at.
 */

struct tbl {
	const char	*name;
	int		code;
};

static const struct tbl pal_op_tbl[] = {
	/* Common PAL function codes. */
	{ "halt",		PAL_halt },
	{ "cflush",		PAL_cflush },
	{ "draina",		PAL_draina },
	{ "cserve",		PAL_cserve, },
	{ "swppal",		PAL_swppal },
	{ "ipir",		PAL_ipir },
	{ "bpt",		PAL_bpt },
	{ "bugchk",		PAL_bugchk },
	{ "imb",		PAL_imb },
	{ "rdunique",		PAL_rdunique },
	{ "wrunique",		PAL_wrunique },
	{ "gentrap",		PAL_gentrap },

	/* OSF/1 PAL function codes. */
	{ "osf1_rdmces",	PAL_OSF1_rdmces },
	{ "osf1_wrmces",	PAL_OSF1_wrmces },
	{ "osf1_wrfen",		PAL_OSF1_wrfen },
	{ "osf1_wrvptptr",	PAL_OSF1_wrvptptr },
	{ "osf1_swpctx",	PAL_OSF1_swpctx },
	{ "osf1_wrval",		PAL_OSF1_wrval },
	{ "osf1_rdval",		PAL_OSF1_rdval },
	{ "osf1_tbi",		PAL_OSF1_tbi },
	{ "osf1_wrent",		PAL_OSF1_wrent },
	{ "osf1_swpipl",	PAL_OSF1_swpipl },
	{ "osf1_rdps",		PAL_OSF1_rdps },
	{ "osf1_wrkgp",		PAL_OSF1_wrkgp },
	{ "osf1_wrusp",		PAL_OSF1_wrusp },
	{ "osf1_wrperfmon",	PAL_OSF1_wrperfmon },
	{ "osf1_rdusp",		PAL_OSF1_rdusp },
	{ "osf1_whami",		PAL_OSF1_whami },
	{ "osf1_retsys",	PAL_OSF1_retsys },
	{ "osf1_rti",		PAL_OSF1_rti },
	{ "osf1_callsys",	PAL_OSF1_callsys },

	{ NULL,			-1 },
};

static const char *pal_opname(int);

static const char *
pal_opname(op)
	int op;
{
	static char unk[11];
	int i;

	for (i = 0; pal_op_tbl[i].name != NULL; i++) {
		if (pal_op_tbl[i].code == op)
			return (pal_op_tbl[i].name);
	}

	snprintf(unk, sizeof unk, "0x%x", op);
	return (unk);
}

/* HW (PAL) instruction qualifiers, stright tables */
static const char *mXpr_name[8] = {
	"", "/i", "/a", "/ai", "/p", "/pi", "/pa", "/pai"
};
static const char *hwlds_name[8] = {
	"", "/r", "/a", "/ar", "/p", "/p?r", "_l-c", "_l-c/?r"
};

/*
 * For this one we take the low nibble (valid values 0/2/9/b/d)
 * and shift it down one to get the row index.  Within a row
 * we can just take the high nibble deprived of the high bit
 * (valid values 0/1/2/3/4/6).  We could have used a flat 64
 * entry array, but in this way we use just 48 pointers.
 * BUGFIX: the 'cmpbge 0x0f' opcode fits in here too
 */
static const char *arit_c0[8] = {
	"addl", 0, "addq", 0, "addl/v", 0, "addq/v",
};
static const char *arit_c2[8] = {
	"s4addl", "s8addl", "s4addq", "s8addq",
};
static const char *arit_c9[8] = {
	"subl", 0, "subq", 0, "subl/v", 0, "subq/v",
};
static const char *arit_cB[8] = {
	"s4subl", "s8subl", "s4subq", "s8subq",
};
static const char *arit_cD[8] = {
	0, "cmpult", "cmpeq", "cmpule", "cmplt", 0, "cmple",
};
static const char *arit_cF[1] = {
	"cmpbge"
};
static const char **arit_opname[8] = {
	arit_c0, arit_c2, 0, 0, arit_c9, arit_cB, arit_cD, arit_cF
};

static __inline const char *arit_name(int);
static __inline const char *
arit_name(op)
	int op;
{
	static char unk[32];
	const char *name = NULL;

	if (arit_opname[((op)&0xe)>>1])
		name = arit_opname[((op)&0xe)>>1][((op)&0x70)>>4];

	if (name != NULL)
		return (name);

	snprintf(unk, sizeof unk, "?arit 0x%x?", op);
	return (unk);
}

/*
 * Something similar for this one, except there are only
 * 16 entries so the row indexing is done by enumeration
 * of the low nibble (valid values 0/4/6/8).  Then we can
 * just shift the high nibble to index inside the row
 * (valid values are 0/2/4 or 1/2/4/6)
 *
 * There are two functions that don't play by these simple rules,
 * so we special-case them.
 */
static const char *logical_c0[4] = {
	"and", "or", "xor", 0
};
static const char *logical_c4[4] = {
	"cmovlbs", "cmoveq", "cmovlt", "cmovle"
};
static const char *logical_c6[4] = {
	"cmovlbc", "cmovne", "cmovge", "cmovgt"
};
static const char *logical_c8[4] = {
	"andnot", "ornot", "xornot", 0
};

static __inline const char *logical_name(int);
static __inline const char *
logical_name(op)
	int op;
{
	static char unk[32];
	const char *name = NULL;

	if (op == op_amask)
		return ("amask");
	else if (op == op_implver)
		return ("implver");

	switch (op & 0xf) {
	case 0: name = logical_c0[((op)>>5)&3]; break;
	case 4: name = logical_c4[((op)>>5)&3]; break;
	case 6: name = logical_c6[((op)>>5)&3]; break;
	case 8: name = logical_c8[((op)>>5)&3]; break;
	}

	if (name != NULL)
		return (name);

	snprintf(unk, sizeof unk, "?logical 0x%x?", op);
	return (unk);
}

/*
 * This is the messy one. First, we single out the dense
 * case of a 3 in the high nibble (valid values 0/1/2/4/6/9/b/c).
 * Then the case of a 2 in the low nibble (valid values 0/1/2/5/6/7).
 * For the remaining codes (6/7/a/b) we do as above: high
 * nibble has valid values 0/1/2 or 5/6/7.  The low nibble
 * can be used as row index picking bits 0 and 2, for the
 * high one just the lower two bits.
 */
static const char *bitop_c3[8] = {
	"zapnot", "mskql", "srl", "extql", "sll", "insql", "sra", 0
};
static const char *bitop_c2[8] = {
	"mskbl", "mskwl", "mskll", 0/*mskql*/, 0, "mskwh", "msklh", "mskqh"
};
static const char *bitop_c67ab[4][4] = {
/* a */	{ 0, "extwh", "extlh", "extqh"},
/* b */	{ "insbl", "inswl", "insll", 0 },
/* 6 */	{ "extbl", "extwl", "extll", 0 },
/* 7 */	{ 0, "inswh", "inslh", "insqh" },
};

static __inline const char *bitop_name(int);
static __inline const char *
bitop_name(op)
	int op;
{
	static char unk[32];
	const char *name = NULL;

	if ((op & 0x70) == 0x30)
		name = (op == op_zap) ? "zap" : bitop_c3[((op)&0xe)>>1];
	else if ((op & 0xf) == 0x02)
		name = bitop_c2[(op)>>4];
	else
		name =
		    bitop_c67ab[(((op)&1)|(((op)&0x4)>>1))][(((op)&0x30)>>4)];

	if (name != NULL)
		return (name);

	snprintf(unk, sizeof unk, "?bit 0x%x?", op);
	return (unk);
}

/*
 * Only 5 entries in this one
 */
static const char *mul_opname[4] = {
	"mull", "mulq", "mull/v", "mulq/v"
};

static __inline const char *mul_name(int);
static __inline const char *
mul_name(op)
	int op;
{
	static char unk[32];
	const char *name = NULL;

	name = (op == op_umulh) ? "umulh" : mul_opname[((op)>>5)&3];

	if (name != NULL)
		return (name);

	snprintf(unk, sizeof unk, "?mul 0x%x?", op);
	return (unk);
}

/*
 * These are few, the high nibble is usually enough to dispatch.
 * We single out the `f' case to halve the table size, as
 * well as the cases in which the high nibble isn't enough.
 */
static const char *special_opname[8] = {
	"trapb", 0, "mb", 0, "fetch", "fetch_m", "rpcc", "rc"
};

static __inline const char *special_name(int);
static __inline const char *
special_name(op)
	int op;
{
	static char unk[32];
	const char *name;

	switch (op) {
	case op_excb:		name = "excb";		break;
	case op_wmb:		name = "wmb";		break;
	case op_ecb:		name = "ecb";		break;
	case op_rs:		name = "rs";		break;
	case op_wh64:		name = "wh64";		break;
	default:
		name = special_opname[(op)>>13];
	}

	if (name != NULL)
		return (name);

	snprintf(unk, sizeof unk, "?special 0x%x?", op);
	return (unk);
}

/*
 * This is trivial
 */
static const char *jump_opname[4] = {
	"jmp", "jsr", "ret", "jcr"
};
#define jump_name(ix)	jump_opname[ix]

/*
 * For all but 4 of these, we can dispatch on the lower nibble of
 * the "function".
 */
static const char *intmisc_opname_3x[16] = {
	"ctpop", "perr", "ctlz", "cttz", "unpkbw", "unpkbl", "pkwb",
	"pklb", "minsb8", "minsw4", "minub8", "minuw4", "maxub8",
	"maxuw4", "maxsb8", "maxsw4",
};

static __inline const char *intmisc_name(int);
static __inline const char *
intmisc_name(op)
	int op;
{
	static char unk[32];

	if ((op & 0xf0) == 0x30)
		return (intmisc_opname_3x[op & 0x0f]);

	switch (op) {
	case op_sextb: return ("sextb");
	case op_sextw: return ("sextw");
	case op_ftoit: return ("ftoit");
	case op_ftois: return ("ftois");
	}

	snprintf(unk, sizeof unk, "?intmisc 0x%x?", op);
	return (unk);
}

static const char *float_name(const struct tbl[], int, const char *type);

static const char *
float_name(tbl, op, type)
	const struct tbl tbl[];
	int op;
	const char *type;
{
	static char unk[32];
	int i;

	for (i = 0; tbl[i].name != NULL; i++) {
		if (tbl[i].code == op)
			return (tbl[i].name);
	}

	snprintf(unk, sizeof unk, "?%s 0x%x?", type, op);
	return (unk);
}

#define vaxf_name(op)	float_name(vaxf_tbl, op, "vaxfl")
#define ieeef_name(op)	float_name(ieeef_tbl, op, "ieeefl")
#define anyf_name(op)	float_name(anyf_tbl, op, "anyfl")

static const struct tbl anyf_tbl[] = {
	{ "cvtlq",	0x010},
	{ "cpys",	0x020},
	{ "cpysn",	0x021},
	{ "cpyse",	0x022},
	{ "mt_fpcr",	0x024},
	{ "mf_fpcr",	0x025},
	{ "fcmoveq",	0x02a},
	{ "fcmovne",	0x02b},
	{ "fcmovlt",	0x02c},
	{ "fcmovge",	0x02d},
	{ "fcmovle",	0x02e},
	{ "fcmovgt",	0x02f},
	{ "cvtql",	0x030},
	{ "cvtql/v",	0x130},
	{ "cvtql/sv",	0x530},
	{ 0, 0},
};

static const struct tbl ieeef_tbl[] = {
	{ "adds/c",	0x000},
	{ "subs/c",	0x001},
	{ "muls/c",	0x002},
	{ "divs/c",	0x003},
	{ "addt/c",	0x020},
	{ "subt/c",	0x021},
	{ "mult/c",	0x022},
	{ "divt/c",	0x023},
	{ "cvtts/c",	0x02c},
	{ "cvttq/c",	0x02f},
	{ "cvtqs/c",	0x03c},
	{ "cvtqt/c",	0x03e},
	{ "adds/m",	0x040},
	{ "subs/m",	0x041},
	{ "muls/m",	0x042},
	{ "divs/m",	0x043},
	{ "addt/m",	0x060},
	{ "subt/m",	0x061},
	{ "mult/m",	0x062},
	{ "divt/m",	0x063},
	{ "cvtts/m",	0x06c},
	{ "cvtqs/m",	0x07c},
	{ "cvtqt/m",	0x07e},
	{ "adds",	0x080},
	{ "subs",	0x081},
	{ "muls",	0x082},
	{ "divs",	0x083},
	{ "addt",	0x0a0},
	{ "subt",	0x0a1},
	{ "mult",	0x0a2},
	{ "divt",	0x0a3},
	{ "cmptun",	0x0a4},
	{ "cmpteq",	0x0a5},
	{ "cmptlt",	0x0a6},
	{ "cmptle",	0x0a7},
	{ "cvtts",	0x0ac},
	{ "cvttq",	0x0af},
	{ "cvtqs",	0x0bc},
	{ "cvtqt",	0x0be},
	{ "adds/d",	0x0c0},
	{ "subs/d",	0x0c1},
	{ "muls/d",	0x0c2},
	{ "divs/d",	0x0c3},
	{ "addt/d",	0x0e0},
	{ "subt/d",	0x0e1},
	{ "mult/d",	0x0e2},
	{ "divt/d",	0x0e3},
	{ "cvtts/d",	0x0ec},
	{ "cvtqs/d",	0x0fc},
	{ "cvtqt/d",	0x0fe},
	{ "adds/uc",	0x100},
	{ "subs/uc",	0x101},
	{ "muls/uc",	0x102},
	{ "divs/uc",	0x103},
	{ "addt/uc",	0x120},
	{ "subt/uc",	0x121},
	{ "mult/uc",	0x122},
	{ "divt/uc",	0x123},
	{ "cvtts/uc",	0x12c},
	{ "cvttq/vc",	0x12f},
	{ "adds/um",	0x140},
	{ "subs/um",	0x141},
	{ "muls/um",	0x142},
	{ "divs/um",	0x143},
	{ "addt/um",	0x160},
	{ "subt/um",	0x161},
	{ "mult/um",	0x162},
	{ "divt/um",	0x163},
	{ "cvtts/um",	0x16c},
	{ "adds/u",	0x180},
	{ "subs/u",	0x181},
	{ "muls/u",	0x182},
	{ "divs/u",	0x183},
	{ "addt/u",	0x1a0},
	{ "subt/u",	0x1a1},
	{ "mult/u",	0x1a2},
	{ "divt/u",	0x1a3},
	{ "cvtts/u",	0x1ac},
	{ "cvttq/v",	0x1af},
	{ "adds/ud",	0x1c0},
	{ "subs/ud",	0x1c1},
	{ "muls/ud",	0x1c2},
	{ "divs/ud",	0x1c3},
	{ "addt/ud",	0x1e0},
	{ "subt/ud",	0x1e1},
	{ "mult/ud",	0x1e2},
	{ "divt/ud",	0x1e3},
	{ "cvtts/ud",	0x1ec},
	{ "adds/suc",	0x500},
	{ "subs/suc",	0x501},
	{ "muls/suc",	0x502},
	{ "divs/suc",	0x503},
	{ "addt/suc",	0x520},
	{ "subt/suc",	0x521},
	{ "mult/suc",	0x522},
	{ "divt/suc",	0x523},
	{ "cvtts/suc",	0x52c},
	{ "cvttq/svc",	0x52f},
	{ "adds/sum",	0x540},
	{ "subs/sum",	0x541},
	{ "muls/sum",	0x542},
	{ "divs/sum",	0x543},
	{ "addt/sum",	0x560},
	{ "subt/sum",	0x561},
	{ "mult/sum",	0x562},
	{ "divt/sum",	0x563},
	{ "cvtts/sum",	0x56c},
	{ "adds/su",	0x580},
	{ "subs/su",	0x581},
	{ "muls/su",	0x582},
	{ "divs/su",	0x583},
	{ "addt/su",	0x5a0},
	{ "subt/su",	0x5a1},
	{ "mult/su",	0x5a2},
	{ "divt/su",	0x5a3},
	{ "cmptun/su",	0x5a4},
	{ "cmpteq/su",	0x5a5},
	{ "cmptlt/su",	0x5a6},
	{ "cmptle/su",	0x5a7},
	{ "cvtts/su",	0x5ac},
	{ "cvttq/sv",	0x5af},
	{ "adds/sud",	0x5c0},
	{ "subs/sud",	0x5c1},
	{ "muls/sud",	0x5c2},
	{ "divs/sud",	0x5c3},
	{ "addt/sud",	0x5e0},
	{ "subt/sud",	0x5e1},
	{ "mult/sud",	0x5e2},
	{ "divt/sud",	0x5e3},
	{ "cvtts/sud",	0x5ec},
	{ "adds/suic",	0x700},
	{ "subs/suic",	0x701},
	{ "muls/suic",	0x702},
	{ "divs/suic",	0x703},
	{ "addt/suic",	0x720},
	{ "subt/suic",	0x721},
	{ "mult/suic",	0x722},
	{ "divt/suic",	0x723},
	{ "cvtts/suic",	0x72c},
	{ "cvttq/svic",	0x72f},
	{ "cvtqs/suic",	0x73c},
	{ "cvtqt/suic",	0x73e},
	{ "adds/suim",	0x740},
	{ "subs/suim",	0x741},
	{ "muls/suim",	0x742},
	{ "divs/suim",	0x743},
	{ "addt/suim",	0x760},
	{ "subt/suim",	0x761},
	{ "mult/suim",	0x762},
	{ "divt/suim",	0x763},
	{ "cvtts/suim",	0x76c},
	{ "cvtqs/suim",	0x77c},
	{ "cvtqt/suim",	0x77e},
	{ "adds/sui",	0x780},
	{ "subs/sui",	0x781},
	{ "muls/sui",	0x782},
	{ "divs/sui",	0x783},
	{ "addt/sui",	0x7a0},
	{ "subt/sui",	0x7a1},
	{ "mult/sui",	0x7a2},
	{ "divt/sui",	0x7a3},
	{ "cvtts/sui",	0x7ac},
	{ "cvttq/svi",	0x7af},
	{ "cvtqs/sui",	0x7bc},
	{ "cvtqt/sui",	0x7be},
	{ "adds/suid",	0x7c0},
	{ "subs/suid",	0x7c1},
	{ "muls/suid",	0x7c2},
	{ "divs/suid",	0x7c3},
	{ "addt/suid",	0x7e0},
	{ "subt/suid",	0x7e1},
	{ "mult/suid",	0x7e2},
	{ "divt/suid",	0x7e3},
	{ "cvtts/suid",	0x7ec},
	{ "cvtqs/suid",	0x7fc},
	{ "cvtqt/suid",	0x7fe},
	{ 0, 0}
};

static const struct tbl vaxf_tbl[] = {
	{ "addf/c",	0x000},
	{ "subf/c",	0x001},
	{ "mulf/c",	0x002},
	{ "divf/c",	0x003},
	{ "cvtdg/c",	0x01e},
	{ "addg/c",	0x020},
	{ "subg/c",	0x021},
	{ "mulg/c",	0x022},
	{ "divg/c",	0x023},
	{ "cvtgf/c",	0x02c},
	{ "cvtgd/c",	0x02d},
	{ "cvtgq/c",	0x02f},
	{ "cvtqf/c",	0x03c},
	{ "cvtqg/c",	0x03e},
	{ "addf",	0x080},
	{ "subf",	0x081},
	{ "mulf",	0x082},
	{ "divf",	0x083},
	{ "cvtdg",	0x09e},
	{ "addg",	0x0a0},
	{ "subg",	0x0a1},
	{ "mulg",	0x0a2},
	{ "divg",	0x0a3},
	{ "cmpgeq",	0x0a5},
	{ "cmpglt",	0x0a6},
	{ "cmpgle",	0x0a7},
	{ "cvtgf",	0x0ac},
	{ "cvtgd",	0x0ad},
	{ "cvtgq",	0x0af},
	{ "cvtqf",	0x0bc},
	{ "cvtqg",	0x0be},
	{ "addf/uc",	0x100},
	{ "subf/uc",	0x101},
	{ "mulf/uc",	0x102},
	{ "divf/uc",	0x103},
	{ "cvtdg/uc",	0x11e},
	{ "addg/uc",	0x120},
	{ "subg/uc",	0x121},
	{ "mulg/uc",	0x122},
	{ "divg/uc",	0x123},
	{ "cvtgf/uc",	0x12c},
	{ "cvtgd/uc",	0x12d},
	{ "cvtgq/vc",	0x12f},
	{ "addf/u",	0x180},
	{ "subf/u",	0x181},
	{ "mulf/u",	0x182},
	{ "divf/u",	0x183},
	{ "cvtdg/u",	0x19e},
	{ "addg/u",	0x1a0},
	{ "subg/u",	0x1a1},
	{ "mulg/u",	0x1a2},
	{ "divg/u",	0x1a3},
	{ "cvtgf/u",	0x1ac},
	{ "cvtgd/u",	0x1ad},
	{ "cvtgq/v",	0x1af},
	{ "addf/sc",	0x400},
	{ "subf/sc",	0x401},
	{ "mulf/sc",	0x402},
	{ "divf/sc",	0x403},
	{ "cvtdg/sc",	0x41e},
	{ "addg/sc",	0x420},
	{ "subg/sc",	0x421},
	{ "mulg/sc",	0x422},
	{ "divg/sc",	0x423},
	{ "cvtgf/sc",	0x42c},
	{ "cvtgd/sc",	0x42d},
	{ "cvtgq/sc",	0x42f},
	{ "cvtqf/sc",	0x43c},
	{ "cvtqg/sc",	0x43e},
	{ "addf/s",	0x480},
	{ "subf/s",	0x481},
	{ "mulf/s",	0x482},
	{ "divf/s",	0x483},
	{ "cvtdg/s",	0x49e},
	{ "addg/s",	0x4a0},
	{ "subg/s",	0x4a1},
	{ "mulg/s",	0x4a2},
	{ "divg/s",	0x4a3},
	{ "cmpgeq/s",	0x4a5},
	{ "cmpglt/s",	0x4a6},
	{ "cmpgle/s",	0x4a7},
	{ "cvtgf/s",	0x4ac},
	{ "cvtgd/s",	0x4ad},
	{ "cvtgq/s",	0x4af},
	{ "cvtqf/s",	0x4bc},
	{ "cvtqg/s",	0x4be},
	{ "addf/suc",	0x500},
	{ "subf/suc",	0x501},
	{ "mulf/suc",	0x502},
	{ "divf/suc",	0x503},
	{ "cvtdg/suc",	0x51e},
	{ "addg/suc",	0x520},
	{ "subg/suc",	0x521},
	{ "mulg/suc",	0x522},
	{ "divg/suc",	0x523},
	{ "cvtgf/suc",	0x52c},
	{ "cvtgd/suc",	0x52d},
	{ "cvtgq/svc",	0x52f},
	{ "addf/su",	0x580},
	{ "subf/su",	0x581},
	{ "mulf/su",	0x582},
	{ "divf/su",	0x583},
	{ "cvtdg/su",	0x59e},
	{ "addg/su",	0x5a0},
	{ "subg/su",	0x5a1},
	{ "mulg/su",	0x5a2},
	{ "divg/su",	0x5a3},
	{ "cvtgf/su",	0x5ac},
	{ "cvtgd/su",	0x5ad},
	{ "cvtgq/sv",	0x5af},
	{ 0, 0}
};

/*
 * General purpose registers
 */
static const char *name_of_register[32] = {
	"v0",	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",
	"t7",	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",
	"a0",	"a1",	"a2",	"a3",	"a4",	"a5",	"t8",	"t9",
	"t10",	"t11",	"ra",	"pv",	"at",	"gp",	"sp",	"zero"
};

static int regcount;		/* how many regs used in this inst */
static int regnum[3];		/* which regs used in this inst */

static const char *register_name(int);

static const char *
register_name (ireg)
	int ireg;
{
	int	i;

	for (i = 0; i < regcount; i++)
		if (regnum[i] == ireg)
			break;
	if (i >= regcount)
		regnum[regcount++] = ireg;
	return (name_of_register[ireg]);
}

/*
 * Disassemble instruction at 'loc'.  'altfmt' specifies an
 * (optional) alternate format.  Return address of start of
 * next instruction.
 */
int	alpha_print_instruction(db_addr_t, alpha_instruction, boolean_t);

db_addr_t
db_disasm(loc, altfmt)
	db_addr_t	loc;
	boolean_t	altfmt;
{
	alpha_instruction inst;

	inst.bits = db_get_value(loc, 4, 0);

	loc += alpha_print_instruction(loc, inst, altfmt);
	return (loc);
}

int
alpha_print_instruction(iadr, i, showregs)
	db_addr_t	iadr;
	alpha_instruction i;
	boolean_t	showregs;
{
	const char	*opcode;
	int		ireg;
	long		signed_immediate;
	boolean_t	fstore;
	pal_instruction	p;
	char		tmpfmt[28];

	regcount = 0;
	fstore = FALSE;
	opcode = op_name[i.mem_format.opcode];

	/*
	 *	Dispatch directly on the opcode, save code
	 *	duplication sometimes via "harmless gotos".
	 */
	switch (i.mem_format.opcode) {
	case op_pal:
		/* "call_pal" is a long string; just use a space. */
		db_printf("%s %s", opcode, pal_opname(i.pal_format.function));
		break;
	case op_lda:
	case op_ldah:
	case op_ldbu:
	case op_ldq_u:
	case op_ldwu:
	case op_stw:
	case op_stb:
	case op_stq_u:
		/*
		 * These loadstores are here to make compiling the
		 * switch a bit easier.  Could embellish the output
		 * someday, too.
		 */
		goto loadstore;
		break;
	case op_arit:
		/*
		 * For this and the following three groups we
		 * just need different opcode strings
		 */
		opcode = arit_name(i.operate_lit_format.function);
		goto operate;
		break;
	case op_logical:
		opcode = logical_name(i.operate_lit_format.function);
		goto operate;
		break;
	case op_bit:
		opcode = bitop_name(i.operate_lit_format.function);
		goto operate;
		break;
	case op_mul:
		opcode = mul_name(i.operate_lit_format.function);
operate:
		/*
		 * Nice and uniform, just check for literals
		 */
		db_printf("%s\t%s,", opcode,
		    register_name(i.operate_lit_format.ra));
		if (i.operate_lit_format.one)
			db_printf("#0x%x", i.operate_lit_format.literal);
		else
			db_printf("%s", register_name(i.operate_reg_format.rb));
		db_printf(",%s", register_name(i.operate_lit_format.rc));
		break;
	case op_vax_float:
		/*
		 * The three floating point groups are even simpler
		 */
		opcode = vaxf_name(i.float_format.function);
		goto foperate;
		break;
	case op_ieee_float:
		opcode = ieeef_name(i.float_format.function);
		goto foperate;
		break;
	case op_any_float:
		opcode = anyf_name(i.float_format.function);
foperate:
		db_printf("%s\tf%d,f%d,f%d", opcode,
			i.float_format.fa,
			i.float_format.fb,
			i.float_format.fc);
		break;
	case op_special:
		/*
		 * Miscellaneous.
		 */
		{
			register unsigned int code;

			code = (i.mem_format.displacement)&0xffff;
			opcode = special_name(code);

			switch (code) {
			case op_ecb:
				db_printf("%s\t(%s)", opcode,
					register_name(i.mem_format.rb));
				break;
			case op_fetch:
			case op_fetch_m:
				db_printf("%s\t0(%s)", opcode,
					register_name(i.mem_format.rb));
				break;
			case op_rpcc:
			case op_rc:
			case op_rs:
				db_printf("%s\t%s", opcode,
					register_name(i.mem_format.ra));
				break;
			default:
				db_printf("%s", opcode);
			break;
			}
		}
		break;
	case op_j:
		/*
		 * Jump instructions really are of two sorts,
		 * depending on the use of the hint info.
		 */
		opcode = jump_name(i.jump_format.action);
		switch (i.jump_format.action) {
		case op_jmp:
		case op_jsr:
			db_printf("%s\t%s,(%s),", opcode,
				register_name(i.jump_format.ra),
				register_name(i.jump_format.rb));
			signed_immediate = i.jump_format.hint;
			goto branch_displacement;
			break;
		case op_ret:
		case op_jcr:
			db_printf("%s\t%s,(%s)", opcode,
				register_name(i.jump_format.ra),
				register_name(i.jump_format.rb));
			break;
		}
		break;
	case op_intmisc:
		/*
		 * These are just in "operate" format.
		 */
		opcode = intmisc_name(i.operate_lit_format.function);
		goto operate;
		break;
			/* HW instructions, possibly chip-specific XXXX */
	case op_pal19:	/* "hw_mfpr" */
	case op_pal1d:	/* "hw_mtpr" */
		p.bits = i.bits;
		db_printf("\t%s%s\t%s, %d", opcode,
			mXpr_name[p.mXpr_format.regset],
			register_name(p.mXpr_format.rd),
			p.mXpr_format.index);
		break;
	case op_pal1b:	/* "hw_ld" */
	case op_pal1f:	/* "hw_st" */
		p.bits = i.bits;
		db_printf("\t%s%c%s\t%s,", opcode,
			(p.mem_format.qw) ? 'q' : 'l',
			hwlds_name[p.mem_format.qualif],
			register_name(p.mem_format.rd));
		signed_immediate = (long)p.mem_format.displacement;
		goto loadstore_address;

	case op_pal1e:	/* "hw_rei" */
		db_printf("\t%s", opcode);
		break;

	case op_ldf:
	case op_ldg:
	case op_lds:
	case op_ldt:
	case op_stf:
	case op_stg:
	case op_sts:
	case op_stt:
		fstore = TRUE;
		/* FALLTHROUGH */
	case op_ldl:
	case op_ldq:
	case op_ldl_l:
	case op_ldq_l:
	case op_stl:
	case op_stq:
	case op_stl_c:
	case op_stq_c:
		/*
		 * Memory operations, including floats
		 */
loadstore:
		if (fstore)
		    db_printf("%s\tf%d,", opcode, i.mem_format.ra);
		else
		    db_printf("%s\t%s,", opcode,
		        register_name(i.mem_format.ra));
		signed_immediate = (long)i.mem_format.displacement;
loadstore_address:
		db_printf("%s(%s)", db_format(tmpfmt, sizeof tmpfmt,
		    signed_immediate, DB_FORMAT_Z, 0, 0),
		    register_name(i.mem_format.rb));
		/*
		 * For convenience, do the address computation
		 */
		if (showregs) {
			if (i.mem_format.opcode == op_ldah)
				signed_immediate <<= 16;
			db_printf(" <0x%lx>", signed_immediate +
			    db_register_value(DDB_REGS, i.mem_format.rb));
		}
		break;
	case op_br:
	case op_fbeq:
	case op_fblt:
	case op_fble:
	case op_bsr:
	case op_fbne:
	case op_fbge:
	case op_fbgt:
	case op_blbc:
	case op_beq:
	case op_blt:
	case op_ble:
	case op_blbs:
	case op_bne:
	case op_bge:
	case op_bgt:
		/*
		 * We want to know where we are branching to
		 */
		signed_immediate = (long)i.branch_format.displacement;
		db_printf("%s\t%s,", opcode,
			  register_name(i.branch_format.ra));
branch_displacement:
		db_printsym(iadr + sizeof(alpha_instruction) +
		    (signed_immediate << 2), DB_STGY_PROC, db_printf);
		break;
	default:
		/*
		 * Shouldn't happen
		 */
		db_printf("? 0x%x ?", i.bits);
	}

	/*
	 *	Print out the registers used in this instruction
	 */
	if (showregs && regcount > 0) {
		db_printf("\t<");
		for (ireg = 0; ireg < regcount; ireg++) {
			if (ireg != 0)
				db_printf(",");
			db_printf("%s=0x%lx",
			    name_of_register[regnum[ireg]],
			    db_register_value(DDB_REGS, regnum[ireg]));
		}
		db_printf(">");
	}
	db_printf("\n");
	return (sizeof(alpha_instruction));
}