code:
/*	$OpenBSD: cgtwo.c,v 1.39 2013/10/20 20:07:25 miod Exp $	*/
/*	$NetBSD: cgtwo.c,v 1.22 1997/05/24 20:16:12 pk Exp $ */

/*
 * Copyright (c) 2002 Miodrag Vallat.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	from: @(#)cgthree.c	8.2 (Berkeley) 10/30/93
 */

/*
 * color display (cgtwo) driver.
 *
 * Does not handle interrupts, even though they can occur.
 *
 * XXX should defer colormap updates to vertical retrace interrupts
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/device.h>
#include <sys/ioctl.h>
#include <sys/malloc.h>
#include <sys/mman.h>
#include <sys/tty.h>
#include <sys/conf.h>

#include <uvm/uvm_extern.h>

#include <machine/autoconf.h>
#include <machine/pmap.h>
#if defined(SUN4)
#include <machine/eeprom.h>
#endif
#include <machine/conf.h>

#include <sparc/dev/cgtworeg.h>

#include <dev/wscons/wsconsio.h>
#include <dev/wscons/wsdisplayvar.h>
#include <dev/rasops/rasops.h>
#include <machine/fbvar.h>

/* per-display variables */
struct cgtwo_softc {
	struct	sunfb sc_sunfb;		/* common base part */
	struct	rom_reg	sc_phys;	/* display RAM (phys addr) */
	volatile struct cg2statusreg *sc_reg;	/* CG2 control registers */
	volatile u_short *sc_ppmask;
	volatile u_short *sc_cmap;
#define sc_redmap(cmap)		((cmap))
#define sc_greenmap(cmap)	((cmap) + CG2_CMSIZE)
#define sc_bluemap(cmap)	((cmap) + 2 * CG2_CMSIZE)
};

void	cgtwo_burner(void *, u_int, u_int);
int	cgtwo_getcmap(struct cgtwo_softc *, struct wsdisplay_cmap *);
int	cgtwo_ioctl(void *, u_long, caddr_t, int, struct proc *);
paddr_t	cgtwo_mmap(void *, off_t, int);
int	cgtwo_putcmap(struct cgtwo_softc *, struct wsdisplay_cmap *);
void	cgtwo_setcolor(void *, u_int, u_int8_t, u_int8_t, u_int8_t);

struct wsdisplay_accessops cgtwo_accessops = {
	.ioctl = cgtwo_ioctl,
	.mmap = cgtwo_mmap,
	.burn_screen = cgtwo_burner
};

int	cgtwomatch(struct device *, void *, void *);
void	cgtwoattach(struct device *, struct device *, void *);

struct cfattach cgtwo_ca = {
	sizeof(struct cgtwo_softc), cgtwomatch, cgtwoattach
};

struct cfdriver cgtwo_cd = {
	NULL, "cgtwo", DV_DULL
};

int
cgtwomatch(struct device *parent, void *vcf, void *aux)
{
	struct cfdata *cf = vcf;
	struct confargs *ca = aux;
	struct romaux *ra = &ca->ca_ra;
	caddr_t tmp;

	if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
		return (0);

	if (!CPU_ISSUN4 || ca->ca_bustype != BUS_VME16)
		return (0);

	/* XXX - Must do our own mapping at CG2_CTLREG_OFF */
	bus_untmp();
	tmp = (caddr_t)mapdev(ra->ra_reg, TMPMAP_VA, CG2_CTLREG_OFF, NBPG);
	if (probeget(tmp, 2) != -1)
		return (1);

	return (0);
}

void
cgtwoattach(struct device *parent, struct device *self, void *args)
{
	struct cgtwo_softc *sc = (struct cgtwo_softc *)self;
	struct confargs *ca = args;
	int node = 0;
	int isconsole = 0;

	if (CPU_ISSUN4) {
		struct eeprom *eep = (struct eeprom *)eeprom_va;
		/*
		 * Assume this is the console if there's no eeprom info
		 * to be found.
		 */
		if (eep == NULL || eep->ee_diag.eed_console == EED_CONS_COLOR)
			isconsole = 1;
	}

	/*
	 * When the ROM has mapped in a cgtwo display, the address
	 * maps only the video RAM, so in any case we have to map the
	 * registers ourselves.
	 */
	sc->sc_phys = ca->ca_ra.ra_reg[0];
	/* Apparently, the pixels are 32-bit data space */
	sc->sc_phys.rr_iospace = PMAP_VME32;

	sc->sc_reg = (volatile struct cg2statusreg *)
	    mapiodev(ca->ca_ra.ra_reg,
		CG2_ROPMEM_OFF + offsetof(struct cg2fb, status.reg),
		sizeof(struct cg2statusreg));

	sc->sc_ppmask = (volatile u_short *)
	    mapiodev(ca->ca_ra.ra_reg,
		CG2_ROPMEM_OFF + offsetof(struct cg2fb, ppmask.reg),
		sizeof(u_short));

	sc->sc_cmap = (volatile u_short *)
	    mapiodev(ca->ca_ra.ra_reg,
		     CG2_ROPMEM_OFF + offsetof(struct cg2fb, redmap),
		     3 * CG2_CMSIZE * sizeof(u_short));

	/* enable video */
	*sc->sc_ppmask = 0xffff;	/* enable all color planes... */
	cgtwo_burner(sc, 1, 0);		/* ... and video signals */

	fb_setsize(&sc->sc_sunfb, 8, 1152, 900, node, ca->ca_bustype);
	sc->sc_sunfb.sf_ro.ri_bits = mapiodev(&sc->sc_phys, CG2_PIXMAP_OFF,
	    round_page(sc->sc_sunfb.sf_fbsize));
	sc->sc_sunfb.sf_ro.ri_hw = sc;

	printf(": %dx%d\n", sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);

	fbwscons_init(&sc->sc_sunfb, isconsole);
	fbwscons_setcolormap(&sc->sc_sunfb, cgtwo_setcolor);

	if (isconsole) {
		fbwscons_console_init(&sc->sc_sunfb, -1);
	}

	fbwscons_attach(&sc->sc_sunfb, &cgtwo_accessops, isconsole);
}

int
cgtwo_ioctl(void *v, u_long cmd, caddr_t data, int flags, struct proc *p)
{
	struct cgtwo_softc *sc = v;
	struct wsdisplay_fbinfo *wdf;
	struct wsdisplay_cmap *cm;
	int error;

	switch (cmd) {
	case WSDISPLAYIO_GTYPE:
		*(u_int *)data = WSDISPLAY_TYPE_SUNCG2;
		break;
	case WSDISPLAYIO_GINFO:
		wdf = (struct wsdisplay_fbinfo *)data;
		wdf->height = sc->sc_sunfb.sf_height;
		wdf->width  = sc->sc_sunfb.sf_width;
		wdf->depth  = sc->sc_sunfb.sf_depth;
		wdf->cmsize = CG2_CMSIZE;
		break;
	case WSDISPLAYIO_LINEBYTES:
		*(u_int *)data = sc->sc_sunfb.sf_linebytes;
		break;

	case WSDISPLAYIO_GETCMAP:
		cm = (struct wsdisplay_cmap *)data;
		error = cgtwo_getcmap(sc, cm);
		if (error)
			return (error);
		break;

	case WSDISPLAYIO_PUTCMAP:
		cm = (struct wsdisplay_cmap *)data;
		error = cgtwo_putcmap(sc, cm);
		if (error)
			return (error);
		break;

	case WSDISPLAYIO_SVIDEO:
	case WSDISPLAYIO_GVIDEO:
		break;

	case WSDISPLAYIO_GCURPOS:
	case WSDISPLAYIO_SCURPOS:
	case WSDISPLAYIO_GCURMAX:
	case WSDISPLAYIO_GCURSOR:
	case WSDISPLAYIO_SCURSOR:
	default:
		return (-1);	/* not supported yet */
	}

	return (0);
}

paddr_t
cgtwo_mmap(void *v, off_t offset, int prot)
{
	struct cgtwo_softc *sc = v;

	if (offset & PGOFSET)
		return (-1);

	if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
		return (REG2PHYS(&sc->sc_phys,
		    CG2_PIXMAP_OFF + offset) | PMAP_NC);
	}

	return (-1);
}

void
cgtwo_burner(void *v, u_int on, u_int flags)
{
	struct cgtwo_softc *sc = v;
	int s;

	s = splhigh();
	if (on)
		sc->sc_reg->video_enab = 1;
	else
		sc->sc_reg->video_enab = 0;
	splx(s);
}

int
cgtwo_getcmap(struct cgtwo_softc *sc, struct wsdisplay_cmap *cmap)
{
	u_int index = cmap->index, count = cmap->count, i;
	u_char red[CG2_CMSIZE], green[CG2_CMSIZE], blue[CG2_CMSIZE];
	volatile u_short *hwcmap = sc->sc_cmap;
	int error;
	volatile u_short *p;

	if (index >= CG2_CMSIZE || count >= CG2_CMSIZE - index)
		return (EINVAL);

	while (sc->sc_reg->retrace == 0)
		DELAY(1);

	sc->sc_reg->update_cmap = 0;

	/* Copy hardware to local arrays. */
	p = &sc_redmap(hwcmap)[index];
	for (i = 0; i < count; i++)
		red[i] = *p++;
	p = &sc_greenmap(hwcmap)[index];
	for (i = 0; i < count; i++)
		green[i] = *p++;
	p = &sc_bluemap(hwcmap)[index];
	for (i = 0; i < count; i++)
		blue[i] = *p++;

	sc->sc_reg->update_cmap = 1;

	/* Copy local arrays to user space. */
	if ((error = copyout(red, cmap->red, count)) != 0)
		return (error);
	if ((error = copyout(green, cmap->green, count)) != 0)
		return (error);
	if ((error = copyout(blue, cmap->blue, count)) != 0)
		return (error);

	return (0);
}

int
cgtwo_putcmap(struct cgtwo_softc *sc, struct wsdisplay_cmap *cmap)
{
	u_int index = cmap->index, count = cmap->count, i;
	u_char red[CG2_CMSIZE], green[CG2_CMSIZE], blue[CG2_CMSIZE];
	volatile u_short *hwcmap = sc->sc_cmap;
	int error;
	volatile u_short *p;

	if (index >= CG2_CMSIZE || count >= CG2_CMSIZE - index)
		return (EINVAL);

	/* Copy from user space to local arrays. */
	if ((error = copyin(cmap->red, red, count)) != 0)
		return (error);
	if ((error = copyin(cmap->green, green, count)) != 0)
		return (error);
	if ((error = copyin(cmap->blue, blue, count)) != 0)
		return (error);

	while (sc->sc_reg->retrace == 0)
		DELAY(1);

	sc->sc_reg->update_cmap = 0;

	/* Copy from local arrays to hardware. */
	p = &sc_redmap(hwcmap)[index];
	for (i = 0; i < count; i++)
		*p++ = red[i];
	p = &sc_greenmap(hwcmap)[index];
	for (i = 0; i < count; i++)
		*p++ = green[i];
	p = &sc_bluemap(hwcmap)[index];
	for (i = 0; i < count; i++)
		*p++ = blue[i];

	sc->sc_reg->update_cmap = 1;

	return (0);
}

void
cgtwo_setcolor(void *v, u_int index, u_int8_t r, u_int8_t g, u_int8_t b)
{
	struct cgtwo_softc *sc = v;

	while (sc->sc_reg->retrace == 0)
		DELAY(1);

	sc->sc_reg->update_cmap = 0;

	sc_redmap(sc->sc_cmap)[index] = r;
	sc_greenmap(sc->sc_cmap)[index] = g;
	sc_bluemap(sc->sc_cmap)[index] = b;

	sc->sc_reg->update_cmap = 1;
}


code:
/*	$OpenBSD: cgtworeg.h,v 1.4 2011/10/24 18:32:47 miod Exp $	*/
/*	$NetBSD: cgtworeg.h,v 1.3 1995/10/04 00:21:27 pk Exp $ */

/*
 * Copyright (c) 1994 Dennis Ferguson
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/* cgtworeg.h - CG2 colour frame buffer definitions
 *
 * The mapped memory looks like:
 *
 *  offset     contents
 * 0x000000  bit plane map - 1st (of 8) plane used by the X server in -mono mode
 * 0x100000  pixel map - used by the X server in color mode
 * 0x200000  raster op mode memory map - unused by X server
 * 0x300000  random control registers (lots of spaces in between)
 * 0x310000  shadow colour map
 */

/* Frame buffer memory size and depth */
#define	CG2_FBSIZE	(1024 * 1024)
#define	CG2_N_PLANE	8

/* Screen dimensions */
#define	CG2_WIDTH	1152
#define	CG2_HEIGHT	900

/* Colourmap size */
#define CG2_CMSIZE	256

#define CG2_BITPLANE_OFF	0
#define CG2_BITPLANE_SIZE	0x100000
#define CG2_PIXMAP_OFF		(CG2_BITPLANE_OFF + CG2_BITPLANE_SIZE)
#define CG2_PIXMAP_SIZE		0x100000
#define CG2_ROPMEM_OFF		(CG2_PIXMAP_OFF + CG2_PIXMAP_SIZE)
#define CG2_ROPMEM_SIZE		0x100000
#define CG2_CTLREG_OFF		(CG2_ROPMEM_OFF + CG2_ROPMEM_SIZE)
#define CG2_CTLREG_SIZE		0x010600
#define CG2_MAPPED_SIZE		(CG2_CTLREG_OFF + CG2_CTLREG_SIZE)

/* arrangement of bit plane mode memory */
union bitplane {
	u_short word[CG2_HEIGHT][CG2_WIDTH/(CG2_N_PLANE * sizeof(u_short))];
	u_short plane[CG2_FBSIZE/(CG2_N_PLANE * sizeof(u_short))];
};

/* arrangement of pixel mode memory */
union byteplane {
	u_char pixel[CG2_HEIGHT][CG2_WIDTH];
	u_char frame[CG2_FBSIZE];
};

/*
 * Structure describing the first two megabytes of the frame buffer.
 * Normal memory maps in bit plane and pixel modes
 */
struct cg2memfb {
	union bitplane memplane[CG2_N_PLANE];	/* bit plane map */
	union byteplane pixplane;		/* pixel map */
};

/*
 * Control/status register.  The X server only appears to use update_cmap
 * and video_enab.
 */
struct cg2statusreg {
	uint16_t reserved:2;	/* not used */
        uint16_t fastread:1;	/* r/o: has some feature I don't understand */
        uint16_t id:1;		/* r/o: ext status and ID registers exist */
        uint16_t resolution:4;	/* screen resolution, 0 means 1152x900 */
        uint16_t retrace:1;	/* r/o: retrace in progress */
        uint16_t inpend:1;	/* r/o: interrupt request */
        uint16_t ropmode:3;	/* ?? */
        uint16_t inten:1;	/* interrupt enable (for end of retrace) */
        uint16_t update_cmap:1;	/* copy/use shadow colour map */
        uint16_t video_enab:1;	/* enable video */
};

/*
 * Extended status register.  Unused by X server
 */
struct cg2_extstatus {
	uint16_t gpintreq:1;	/* interrupt request */
	uint16_t gpintdis:1;	/* interrupt disable */
	uint16_t reserved:13;	/* unused */
	uint16_t gpbus:1;	/* bus enabled */
};

/*
 * Double buffer control register.  It appears that (some of?) the
 * cg2 cards support a pair of memory sets, referred to as `A' and
 * `B', which can be swapped to allow atomic screen updates.  This
 * controls them.
 */
struct dblbufreg {
	uint16_t display_b:1;	/* display memory B (set) or A (reset) */
	uint16_t read_b:1;	/* access memory B (set) or A (reset) */
	uint16_t nowrite_b:1;	/* when set, writes don't update memory B */
	uint16_t nowrite_a:1;	/* when set, writes don't update memory A */
	uint16_t read_ecmap:1;	/* copy from(clear)/to(set) shadow colour map */
	uint16_t fast_read:1;	/* fast reads, but wrong data */
	uint16_t wait:1;	/* when set, remains so to end up v. retrace */
	uint16_t update_ecmap:1;	/* copy/use shadow colour map */
        uint16_t reserved:8;
};

/*
 * Zoom register, apparently present on Sun-2 colour boards only.  See
 * the Sun documentation, I don't know anyone who still has a Sun-2.
 */
struct cg2_zoom {
	union {
		u_short reg;
		u_char reg_pad[4096];
	} wordpan;
	union {
		struct {
			uint16_t unused:8;
			uint16_t lineoff:4;
			uint16_t pixzoom:4;
		} reg;
		u_short word;
		u_char reg_pad[4096];
	} zoom;
        union {
		struct {
			uint16_t unused:8;
			uint16_t lorigin:4;
			uint16_t pixeloff:4;
		} reg;
		u_short word;
		u_char reg_pad[4096];
	} pixpan;
	union {
		u_short reg;
		u_char reg_pad[4096];
	} varzoom;
};

/*
 * Miscellany.  On the Sun-3 these registers exist in place of the above.
 */
struct cg2_nozoom {
	union {				/* double buffer register (see above) */
		struct dblbufreg reg;
		u_short word;
		u_char reg_pad[4096];
	} dblbuf;
	union {				/* start of dma window */
		u_short reg;
		u_char reg_pad[4096];
	} dmabase;
	union {				/* dma window size */
		u_short reg;		/* actually 8 bits.  reg*16 == size */
		u_char reg_pad[4096];
	} dmawidth;
	union {				/* frame count */
		u_short reg;		/* actually 8 bits only. r/o */
		u_char reg_pad[4096];
	} framecnt;
};

/*
 * Raster op control registers.  X doesn't use this, but documented here
 * for future reference.
 */
struct memropc {
	u_short mrc_dest;
	u_short mrc_source1;
	u_short mrc_source2;
	u_short mrc_pattern;
	u_short mrc_mask1;
	u_short mrc_mask2;
	u_short mrc_shift;
	u_short mrc_op;
	u_short mrc_width;
	u_short mrc_opcount;
	u_short mrc_decoderout;
	u_short mrc_x11;
	u_short mrc_x12;
	u_short mrc_x13;
	u_short mrc_x14;
	u_short mrc_x15;
};

/*
 * Last chunk of the frame buffer (i.e. from offset 0x200000 and above).
 * Exists separately from struct cg2memfb apparently because Sun software
 * avoids mapping the latter, though X uses it.
 */
struct cg2fb {
	union {			/* raster op mode frame memory */
		union bitplane ropplane[CG2_N_PLANE];
		union byteplane roppixel;
	} ropio;
	union {			/* raster op control unit (1 per plane) */
		struct memropc ropregs;
		struct {
			u_char pad[2048];
			struct memropc ropregs;
		} prime;
		u_char reg_pad[4096];
	} ropcontrol[9];
	union {			/* status register */
		struct cg2statusreg reg;
		u_short word;
		u_char reg_pad[4096];
	} status;
	union {			/* per-plane mask register */
		u_short reg;	/* 8 bit mask register - set means plane r/w */
		u_char reg_pad[4096];
	} ppmask;
	union {			/* miscellaneous registers */
		struct cg2_zoom zoom;
		struct cg2_nozoom nozoom;
	} misc;
	union {			/* interrupt vector */
		u_short reg;
		u_char reg_pad[32];
	} intrptvec;
	union {			 /* board ID */
		u_short reg;
		u_char reg_pad[16];
	} id;
	union {			 /* extended status */
		struct cg2_extstatus reg;
		u_short word;
		u_char reg_pad[16];
	} extstatus;
	union {			 /* auxiliary raster op mode register (?)*/
		u_short reg;
		u_char reg_pad[4032];
	} ropmode;
	u_short redmap[CG2_CMSIZE];	/* shadow colour maps */
	u_short greenmap[CG2_CMSIZE];
	u_short bluemap[CG2_CMSIZE];
};

license: unknown


code:
/*	$OpenBSD: com_obio.c,v 1.1 2005/07/17 12:22:42 miod Exp $	*/

/*
 * Copyright (c) 2005, Miodrag Vallat.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Driver for the built-in modem on Tadpole SPARCbooks, which provides a
 * 16C450-compatible interface. Later models apparently are 16550A-compatible
 * (i.e. with a 16 byte FIFO).
 */

#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/tty.h>

#include <machine/bus.h>
#include <sparc/sparc/auxioreg.h>

#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>

int	com_obio_match(struct device *, void *, void *);
void	com_obio_attach(struct device *, struct device *, void *);

struct com_obio_softc {
	struct com_softc	sc_com;
	struct intrhand		sc_ih;
	struct rom_reg		sc_reg;
	int			sc_pwr;
};

struct cfattach com_obio_ca = {
	sizeof(struct com_obio_softc), com_obio_match, com_obio_attach
};

void	com_obio_disable(struct com_softc *);
int	com_obio_enable(struct com_softc *);

int
com_obio_match(struct device *parent, void *match, void *aux)
{
	struct confargs *ca = aux;

	return (strcmp("modem", ca->ca_ra.ra_name) == 0);
}

void
com_obio_attach(struct device *parent, struct device *self, void *aux)
{
	struct confargs *ca = aux;
	struct com_softc *sc = (void *)self;
	struct com_obio_softc *osc = (void *)sc;

	/* build a bus tag */
	osc->sc_reg = ca->ca_ra.ra_reg[0];

#if 0	/* not necessary as we don't compile com console support */
	sc->sc_iobase = -1;
#endif
	sc->sc_iot = &osc->sc_reg;

	if (ca->ca_ra.ra_nreg == 0 || bus_space_map(sc->sc_iot, 0,
	    ca->ca_ra.ra_len, 0, &sc->sc_ioh) != 0) {
		printf(": can't map modem registers\n");
		return;
	}

	osc->sc_ih.ih_fun = comintr;
	osc->sc_ih.ih_arg = sc;
	intr_establish(ca->ca_ra.ra_intr[0].int_pri, &osc->sc_ih, -1,
	    self->dv_xname);
	printf(" pri %d", ca->ca_ra.ra_intr[0].int_pri);

	sc->disable = com_obio_disable;
	sc->enable = com_obio_enable;
	osc->sc_pwr = getpropint(ca->ca_ra.ra_node, "pwr-on-auxio", 0);
	com_obio_enable(sc);
	sc->enabled = 1;

	sc->sc_frequency = COM_FREQ;
	com_attach_subr(sc);
}

void
com_obio_disable(struct com_softc *sc)
{
	struct com_obio_softc *osc = (void *)sc;

	if (osc->sc_pwr) {
		sb_auxregbisc(0, 0, AUXIO_MODEM | AUXIO_MODEM_RESET);
	}
}

int
com_obio_enable(struct com_softc *sc)
{
	struct com_obio_softc *osc = (void *)sc;

	if (osc->sc_pwr) {
		/* enable and reset modem for 20 usec */
		sb_auxregbisc(0, AUXIO_MODEM, AUXIO_MODEM_RESET);
		delay(20);
		/* end reset (active low) */
		sb_auxregbisc(0, AUXIO_MODEM_RESET, 0);
		/* give the device some time to settle */
		delay(100);
	}
	return (0);
}


code:
/*	$OpenBSD: cons.h,v 1.2 2015/02/28 17:54:54 miod Exp $	*/

extern void *zs_conschan;

extern int  zs_getc(void *arg);
extern void zs_putc(void *arg, int c);

struct zschan;
struct zschan *zs_get_chan_addr(int zsc_unit, int channel);

#ifdef	KGDB
struct zs_chanstate;

void zs_kgdb_init(void);
void zskgdb(struct zs_chanstate *);
#endif


code:
/*	$OpenBSD: cs4231.c,v 1.34 2015/05/11 06:52:36 ratchov Exp $	*/

/*
 * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Driver for CS4231 based audio found in some sun4m systems (cs4231)
 * based on ideas from the S/Linux project and the NetBSD project.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/errno.h>
#include <sys/ioctl.h>
#include <sys/device.h>
#include <sys/proc.h>
#include <sys/malloc.h>

#include <machine/autoconf.h>
#include <sparc/cpu.h>
#include <sparc/sparc/cpuvar.h>
#include <sparc/dev/sbusvar.h>
#include <sparc/dev/dmareg.h>

#include <sys/audioio.h>
#include <dev/audio_if.h>
#include <dev/ic/apcdmareg.h>
#include <dev/ic/ad1848reg.h>
#include <dev/ic/cs4231reg.h>
#include <sparc/dev/cs4231reg.h>
#include <sparc/dev/cs4231var.h>

#define	CSAUDIO_DAC_LVL		0
#define	CSAUDIO_LINE_IN_LVL	1
#define	CSAUDIO_MIC_LVL		2
#define	CSAUDIO_CD_LVL		3
#define	CSAUDIO_MONITOR_LVL	4
#define	CSAUDIO_OUTPUT_LVL	5
#define	CSAUDIO_LINE_IN_MUTE	6
#define	CSAUDIO_DAC_MUTE	7
#define	CSAUDIO_CD_MUTE		8
#define	CSAUDIO_MIC_MUTE	9
#define	CSAUDIO_MONITOR_MUTE	10
#define	CSAUDIO_OUTPUT_MUTE	11
#define	CSAUDIO_REC_LVL		12
#define	CSAUDIO_RECORD_SOURCE	13
#define	CSAUDIO_OUTPUT		14
#define	CSAUDIO_INPUT_CLASS	15
#define	CSAUDIO_OUTPUT_CLASS	16
#define	CSAUDIO_RECORD_CLASS	17
#define	CSAUDIO_MONITOR_CLASS	18

#define	CSPORT_AUX2		0
#define	CSPORT_AUX1		1
#define	CSPORT_DAC		2
#define	CSPORT_LINEIN		3
#define	CSPORT_MONO		4
#define	CSPORT_MONITOR		5
#define	CSPORT_SPEAKER		6
#define	CSPORT_LINEOUT		7
#define	CSPORT_HEADPHONE	8
#define	CSPORT_MICROPHONE	9

#define MIC_IN_PORT	0
#define LINE_IN_PORT	1
#define AUX1_IN_PORT	2
#define DAC_IN_PORT	3

#ifdef AUDIO_DEBUG
#define	DPRINTF(x)	printf x
#else
#define	DPRINTF(x)
#endif

/* Sun uses these pins in pin control register as GPIO */
#define	CS_PC_LINEMUTE		XCTL0_ENABLE	/* mute line */
#define	CS_PC_HDPHMUTE		XCTL1_ENABLE	/* mute headphone */

/* cs4231 playback interrupt */
#define	CS_AFS_TI		0x40		/* timer interrupt */
#define	CS_AFS_CI		0x20		/* capture interrupt */
#define	CS_AFS_PI		0x10		/* playback interrupt */
#define	CS_AFS_CU		0x08		/* capture underrun */
#define	CS_AFS_CO		0x04		/* capture overrun */
#define	CS_AFS_PO		0x02		/* playback overrun */
#define	CS_AFS_PU		0x01		/* playback underrun */

#define CS_TIMEOUT		90000		/* recalibration timeout */

int	cs4231_match(struct device *, void *, void *);
void	cs4231_attach(struct device *, struct device *, void *);
int	cs4231_intr(void *);

int	cs4231_set_speed(struct cs4231_softc *, u_long *);
void	cs4231_setup_output(struct cs4231_softc *sc);

/* Audio interface */
int	cs4231_open(void *, int);
void	cs4231_close(void *);
int	cs4231_query_encoding(void *, struct audio_encoding *);
int	cs4231_set_params(void *, int, int, struct audio_params *,
    struct audio_params *);
int	cs4231_round_blocksize(void *, int);
int	cs4231_commit_settings(void *);
int	cs4231_halt_output(void *);
int	cs4231_halt_input(void *);
int	cs4231_getdev(void *, struct audio_device *);
int	cs4231_set_port(void *, mixer_ctrl_t *);
int	cs4231_get_port(void *, mixer_ctrl_t *);
int	cs4231_query_devinfo(void *addr, mixer_devinfo_t *);
void *	cs4231_alloc(void *, int, size_t, int, int);
void	cs4231_free(void *, void *, int);
int	cs4231_get_props(void *);
int	cs4231_trigger_output(void *, void *, void *, int,
    void (*intr)(void *), void *arg, struct audio_params *);
int	cs4231_trigger_input(void *, void *, void *, int,
    void (*intr)(void *), void *arg, struct audio_params *);
void cs4231_write(struct cs4231_softc *, u_int8_t, u_int8_t);
u_int8_t cs4231_read(struct cs4231_softc *, u_int8_t);

struct audio_hw_if cs4231_sa_hw_if = {
	cs4231_open,
	cs4231_close,
	0,
	cs4231_query_encoding,
	cs4231_set_params,
	cs4231_round_blocksize,
	cs4231_commit_settings,
	0,
	0,
	0,
	0,
	cs4231_halt_output,
	cs4231_halt_input,
	0,
	cs4231_getdev,
	0,
	cs4231_set_port,
	cs4231_get_port,
	cs4231_query_devinfo,
	cs4231_alloc,
	cs4231_free,
	0,
	0,
	cs4231_get_props,
	cs4231_trigger_output,
	cs4231_trigger_input,
	0
};

struct cfattach audiocs_ca = {
	sizeof (struct cs4231_softc), cs4231_match, cs4231_attach
};

struct cfdriver audiocs_cd = {
	NULL, "audiocs", DV_DULL
};

struct audio_device cs4231_device = {
	"SUNW,CS4231",
	"a",			/* XXX b for ultra */
	"onboard1",		/* XXX unknown for ultra */
};

int
cs4231_match(parent, vcf, aux)
	struct device *parent;
	void *vcf, *aux;
{
	struct cfdata *cf = vcf;
	struct confargs *ca = aux;
	register struct romaux *ra = &ca->ca_ra;

	if (strcmp(cf->cf_driver->cd_name, ra->ra_name) &&
	    strcmp("SUNW,CS4231", ra->ra_name)) {
		return (0);
	}
	return (1);
}

void
cs4231_attach(parent, self, aux)
	struct device *parent, *self;
	void *aux;
{
	struct confargs *ca = aux;
	struct cs4231_softc *sc = (struct cs4231_softc *)self;
	int pri;

	if (ca->ca_ra.ra_nintr != 1) {
		printf(": expected 1 interrupt, got %d\n", ca->ca_ra.ra_nintr);
		return;
	}
	pri = ca->ca_ra.ra_intr[0].int_pri;

	if (ca->ca_ra.ra_nreg != 1) {
		printf(": expected 1 register set, got %d\n",
		    ca->ca_ra.ra_nreg);
		return;
	}
	sc->sc_regs = mapiodev(&(ca->ca_ra.ra_reg[0]), 0,
	    ca->ca_ra.ra_reg[0].rr_len);

	sc->sc_node = ca->ca_ra.ra_node;

	sc->sc_burst = getpropint(ca->ca_ra.ra_node, "burst-sizes", -1);
	if (sc->sc_burst == -1)
		sc->sc_burst = ((struct sbus_softc *)parent)->sc_burst;

	/* Clamp at parent's burst sizes */
	sc->sc_burst &= ((struct sbus_softc *)parent)->sc_burst;

	sc->sc_ih.ih_fun = cs4231_intr;
	sc->sc_ih.ih_arg = sc;
	intr_establish(ca->ca_ra.ra_intr[0].int_pri, &sc->sc_ih, IPL_AUHARD,
	    self->dv_xname);

	printf(" pri %d\n", pri);

	audio_attach_mi(&cs4231_sa_hw_if, sc, &sc->sc_dev);

	/* Default to speaker, unmuted, reasonable volume */
	sc->sc_out_port = CSPORT_SPEAKER;
	sc->sc_in_port = CSPORT_MICROPHONE;
	sc->sc_mute[CSPORT_SPEAKER] = 1;
	sc->sc_mute[CSPORT_MONITOR] = 1;
	sc->sc_volume[CSPORT_SPEAKER].left = 192;
	sc->sc_volume[CSPORT_SPEAKER].right = 192;
}

void
cs4231_write(sc, r, v)
	struct cs4231_softc *sc;
	u_int8_t r, v;
{
	sc->sc_regs->iar = r;
	sc->sc_regs->idr = v;
}

u_int8_t
cs4231_read(sc, r)
	struct cs4231_softc *sc;
	u_int8_t r;
{
	sc->sc_regs->iar = r;
	return (sc->sc_regs->idr);
}

/*
 * Hardware interrupt handler
 */
int
cs4231_intr(v)
	void *v;
{
	struct cs4231_softc *sc = (struct cs4231_softc *)v;
	struct cs4231_regs *regs = sc->sc_regs;
	struct cs_channel *chan;
	struct cs_dma *p;
	u_int32_t csr;
	u_int8_t reg, status;
	int r = 0;

	mtx_enter(&audio_lock);
	csr = regs->dma_csr;
	regs->dma_csr = csr;

	if ((csr & APC_CSR_EIE) && (csr & APC_CSR_EI)) {
		printf("%s: error interrupt\n", sc->sc_dev.dv_xname);
		r = 1;
	}

	if ((csr & APC_CSR_PIE) && (csr & APC_CSR_PI)) {
		/* playback interrupt */
		r = 1;
	}

	if ((csr & APC_CSR_GIE) && (csr & APC_CSR_GI)) {
		/* general interrupt */
		status = regs->status;
		if (status & (INTERRUPT_STATUS | SAMPLE_ERROR)) {
			regs->iar = CS_IRQ_STATUS;
			reg = regs->idr;
			if (reg & CS_AFS_PI) {
				cs4231_write(sc, SP_LOWER_BASE_COUNT, 0xff);
				cs4231_write(sc, SP_UPPER_BASE_COUNT, 0xff);
			}
			if (reg & CS_AFS_CI) {
				cs4231_write(sc, CS_LOWER_REC_CNT, 0xff);
				cs4231_write(sc, CS_UPPER_REC_CNT, 0xff);
			}
			regs->status = 0;
		}
		r = 1;
	}

	if ((csr & APC_CSR_PMIE) && (csr & APC_CSR_PMI)) {
		u_int32_t nextaddr, togo;

		chan = &sc->sc_playback;

		p = chan->cs_curdma;
		togo = chan->cs_segsz - chan->cs_cnt;
		if (togo == 0) {
			nextaddr = (u_int32_t)p->addr_dva;
			chan->cs_cnt = togo = chan->cs_blksz;
		} else {
			nextaddr = regs->dma_pnva + chan->cs_blksz;
			if (togo > chan->cs_blksz)
				togo = chan->cs_blksz;
			chan->cs_cnt += togo;
		}

		regs->dma_pnva = nextaddr;
		regs->dma_pnc = togo;

		if (chan->cs_intr != NULL)
			(*chan->cs_intr)(chan->cs_arg);
		r = 1;
	}

	if ((csr & APC_CSR_CIE) && (csr & APC_CSR_CI)) {
		if (csr & APC_CSR_CD) {
			u_int32_t nextaddr, togo;

			chan = &sc->sc_capture;
			p = chan->cs_curdma;
			togo = chan->cs_segsz - chan->cs_cnt;
			if (togo == 0) {
				nextaddr = (u_int32_t)p->addr_dva;
				chan->cs_cnt = togo = chan->cs_blksz;
			} else {
				nextaddr = regs->dma_cnva + chan->cs_blksz;
				if (togo > chan->cs_blksz)
					togo = chan->cs_blksz;
				chan->cs_cnt += togo;
			}

			regs->dma_cnva = nextaddr;
			regs->dma_cnc = togo;

			if (chan->cs_intr != NULL)
				(*chan->cs_intr)(chan->cs_arg);
		}
		r = 1;
	}

	if ((csr & APC_CSR_CMIE) && (csr & APC_CSR_CMI)) {
		/* capture empty */
		r = 1;
	}
	mtx_leave(&audio_lock);
	return (r);
}

int
cs4231_set_speed(sc, argp)
	struct cs4231_softc *sc;
	u_long *argp;

{
	/*
	 * The available speeds are in the following table. Keep the speeds in
	 * the increasing order.
	 */
	typedef struct {
		int speed;
		u_char bits;
	} speed_struct;
	u_long arg = *argp;

	static speed_struct speed_table[] = {
		{5510,	(0 << 1) | CLOCK_XTAL2},
		{5510,	(0 << 1) | CLOCK_XTAL2},
		{6620,	(7 << 1) | CLOCK_XTAL2},
		{8000,	(0 << 1) | CLOCK_XTAL1},
		{9600,	(7 << 1) | CLOCK_XTAL1},
		{11025,	(1 << 1) | CLOCK_XTAL2},
		{16000,	(1 << 1) | CLOCK_XTAL1},
		{18900,	(2 << 1) | CLOCK_XTAL2},
		{22050,	(3 << 1) | CLOCK_XTAL2},
		{27420,	(2 << 1) | CLOCK_XTAL1},
		{32000,	(3 << 1) | CLOCK_XTAL1},
		{33075,	(6 << 1) | CLOCK_XTAL2},
		{33075,	(4 << 1) | CLOCK_XTAL2},
		{44100,	(5 << 1) | CLOCK_XTAL2},
		{48000,	(6 << 1) | CLOCK_XTAL1},
	};

	int i, n, selected = -1;

	n = sizeof(speed_table) / sizeof(speed_struct);

	if (arg < speed_table[0].speed)
		selected = 0;
	if (arg > speed_table[n - 1].speed)
		selected = n - 1;

	for (i = 1; selected == -1 && i < n; i++) {
		if (speed_table[i].speed == arg)
			selected = i;
		else if (speed_table[i].speed > arg) {
			int diff1, diff2;

			diff1 = arg - speed_table[i - 1].speed;
			diff2 = speed_table[i].speed - arg;
			if (diff1 < diff2)
				selected = i - 1;
			else
				selected = i;
		}
	}

	if (selected == -1)
		selected = 3;

	sc->sc_speed_bits = speed_table[selected].bits;
	sc->sc_need_commit = 1;
	*argp = speed_table[selected].speed;

	return (0);
}

/*
 * Audio interface functions
 */
int
cs4231_open(addr, flags)
	void *addr;
	int flags;
{
	struct cs4231_softc *sc = addr;
	struct cs4231_regs *regs = sc->sc_regs;
	int tries;

	if (sc->sc_open)
		return (EBUSY);
	sc->sc_open = 1;

	sc->sc_capture.cs_intr = NULL;
	sc->sc_capture.cs_arg = NULL;
	sc->sc_capture.cs_locked = 0;

	sc->sc_playback.cs_intr = NULL;
	sc->sc_playback.cs_arg = NULL;
	sc->sc_playback.cs_locked = 0;

	regs->dma_csr = APC_CSR_RESET;
	DELAY(10);
	regs->dma_csr = 0;
	DELAY(10);
	regs->dma_csr |= APC_CSR_CODEC_RESET;

	DELAY(20);

	regs->dma_csr &= ~(APC_CSR_CODEC_RESET);

	for (tries = CS_TIMEOUT; tries && regs->iar == SP_IN_INIT; tries--)
		DELAY(10);
	if (tries == 0)
		printf("%s: timeout waiting for reset\n", sc->sc_dev.dv_xname);

	/* Turn on cs4231 mode */
	cs4231_write(sc, SP_MISC_INFO,
	    cs4231_read(sc, SP_MISC_INFO) | MODE2);

	cs4231_setup_output(sc);

	cs4231_write(sc, SP_PIN_CONTROL,
	    cs4231_read(sc, SP_PIN_CONTROL) | INTERRUPT_ENABLE);

	return (0);
}

void
cs4231_setup_output(sc)
	struct cs4231_softc *sc;
{
	u_int8_t pc, mi, rm, lm;

	pc = cs4231_read(sc, SP_PIN_CONTROL) | CS_PC_HDPHMUTE | CS_PC_LINEMUTE;

	mi = cs4231_read(sc, CS_MONO_IO_CONTROL) | MONO_OUTPUT_MUTE;

	lm = cs4231_read(sc, SP_LEFT_OUTPUT_CONTROL);
	lm &= ~OUTPUT_ATTEN_BITS;
	lm |= ((~(sc->sc_volume[CSPORT_SPEAKER].left >> 2)) &
	    OUTPUT_ATTEN_BITS) | OUTPUT_MUTE;

	rm = cs4231_read(sc, SP_RIGHT_OUTPUT_CONTROL);
	rm &= ~OUTPUT_ATTEN_BITS;
	rm |= ((~(sc->sc_volume[CSPORT_SPEAKER].right >> 2)) &
	    OUTPUT_ATTEN_BITS) | OUTPUT_MUTE;

	if (sc->sc_mute[CSPORT_MONITOR]) {
		lm &= ~OUTPUT_MUTE;
		rm &= ~OUTPUT_MUTE;
	}

	switch (sc->sc_out_port) {
	case CSPORT_HEADPHONE:
		if (sc->sc_mute[CSPORT_SPEAKER])
			pc &= ~CS_PC_HDPHMUTE;
		break;
	case CSPORT_SPEAKER:
		if (sc->sc_mute[CSPORT_SPEAKER])
			mi &= ~MONO_OUTPUT_MUTE;
		break;
	case CSPORT_LINEOUT:
		if (sc->sc_mute[CSPORT_SPEAKER])
			pc &= ~CS_PC_LINEMUTE;
		break;
	}

	cs4231_write(sc, SP_LEFT_OUTPUT_CONTROL, lm);
	cs4231_write(sc, SP_RIGHT_OUTPUT_CONTROL, rm);
	cs4231_write(sc, SP_PIN_CONTROL, pc);
	cs4231_write(sc, CS_MONO_IO_CONTROL, mi);

	/* XXX doesn't really belong here... */
	switch (sc->sc_in_port) {
	case CSPORT_LINEIN:
		pc = LINE_INPUT;
		break;
	case CSPORT_AUX1:
		pc = AUX_INPUT;
		break;
	case CSPORT_DAC:
		pc = MIXED_DAC_INPUT;
		break;
	case CSPORT_MICROPHONE:
	default:
		pc = MIC_INPUT;
		break;
	}
	lm = cs4231_read(sc, SP_LEFT_INPUT_CONTROL);
	rm = cs4231_read(sc, SP_RIGHT_INPUT_CONTROL);
	lm &= ~(MIXED_DAC_INPUT | ATTEN_22_5);
	rm &= ~(MIXED_DAC_INPUT | ATTEN_22_5);
	lm |= pc | (sc->sc_adc.left >> 4);
	rm |= pc | (sc->sc_adc.right >> 4);
	cs4231_write(sc, SP_LEFT_INPUT_CONTROL, lm);
	cs4231_write(sc, SP_RIGHT_INPUT_CONTROL, rm);
}

void
cs4231_close(addr)
	void *addr;
{
	struct cs4231_softc *sc = addr;
	struct cs4231_regs *regs = sc->sc_regs;

	/* XXX: already called by upper layer */
	cs4231_halt_input(sc);
	cs4231_halt_output(sc);
	regs->iar = SP_PIN_CONTROL;
	regs->idr &= ~INTERRUPT_ENABLE;
	sc->sc_open = 0;
}

int
cs4231_query_encoding(addr, fp)
	void *addr;
	struct audio_encoding *fp;
{
	int err = 0;

	switch (fp->index) {
	case 0:
		strlcpy(fp->name, AudioEmulaw, sizeof fp->name);
		fp->encoding = AUDIO_ENCODING_ULAW;
		fp->precision = 8;
		fp->flags = 0;
		break;
	case 1:
		strlcpy(fp->name, AudioEalaw, sizeof fp->name);
		fp->encoding = AUDIO_ENCODING_ALAW;
		fp->precision = 8;
		fp->flags = 0;
		break;
	case 2:
		strlcpy(fp->name, AudioEslinear_le, sizeof fp->name);
		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
		fp->precision = 16;
		fp->flags = 0;
		break;
	case 3:
		strlcpy(fp->name, AudioEulinear, sizeof fp->name);
		fp->encoding = AUDIO_ENCODING_ULINEAR;
		fp->precision = 8;
		fp->flags = 0;
		break;
	case 4:
		strlcpy(fp->name, AudioEslinear_be, sizeof fp->name);
		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
		fp->precision = 16;
		fp->flags = 0;
		break;
	default:
		err = EINVAL;
	}
	fp->bps = AUDIO_BPS(fp->precision);
	fp->msb = 1;
	return (err);
}

int
cs4231_set_params(addr, setmode, usemode, p, r)
	void *addr;
	int setmode, usemode;
	struct audio_params *p, *r;
{
	struct cs4231_softc *sc = (struct cs4231_softc *)addr;
	int err, bits, enc = p->encoding;

	switch (enc) {
	case AUDIO_ENCODING_ULAW:
		if (p->precision != 8)
			return (EINVAL);
		bits = FMT_ULAW >> 5;
		break;
	case AUDIO_ENCODING_ALAW:
		if (p->precision != 8)
			return (EINVAL);
		bits = FMT_ALAW >> 5;
		break;
	case AUDIO_ENCODING_SLINEAR_LE:
		if (p->precision != 16)
			return (EINVAL);
		bits = FMT_TWOS_COMP >> 5;
		break;
	case AUDIO_ENCODING_SLINEAR_BE:
		if (p->precision != 16)
			return (EINVAL);
		bits = FMT_TWOS_COMP_BE >> 5;
		break;
	case AUDIO_ENCODING_ULINEAR_LE:
	case AUDIO_ENCODING_ULINEAR_BE:
		if (p->precision != 8)
			return (EINVAL);
		bits = FMT_PCM8 >> 5;
		break;
	default:
		return (EINVAL);
	}

	if (p->channels != 1 && p->channels != 2)
		return (EINVAL);

	err = cs4231_set_speed(sc, &p->sample_rate);
	if (err)
		return (err);

	p->bps = AUDIO_BPS(p->precision);
	r->bps = AUDIO_BPS(r->precision);
	p->msb = r->msb = 1;

	sc->sc_format_bits = bits;
	sc->sc_channels = p->channels;
	sc->sc_precision = p->precision;
	sc->sc_need_commit = 1;
	return (0);
}

int
cs4231_round_blocksize(addr, blk)
	void *addr;
	int blk;
{
	return ((blk + 3) & (-4));
}

int
cs4231_commit_settings(addr)
	void *addr;
{
	struct cs4231_softc *sc = (struct cs4231_softc *)addr;
	struct cs4231_regs *regs = sc->sc_regs;
	int tries;
	u_int8_t r, fs;

	if (sc->sc_need_commit == 0)
		return (0);

	fs = sc->sc_speed_bits | (sc->sc_format_bits << 5);
	if (sc->sc_channels == 2)
		fs |= FMT_STEREO;

	r = cs4231_read(sc, SP_INTERFACE_CONFIG) | AUTO_CAL_ENABLE;
	regs->iar = MODE_CHANGE_ENABLE;
	regs->iar = MODE_CHANGE_ENABLE | SP_INTERFACE_CONFIG;
	regs->idr = r;

	regs->iar = MODE_CHANGE_ENABLE | SP_CLOCK_DATA_FORMAT;
	regs->idr = fs;
	r = regs->idr;
	r = regs->idr;
	tries = CS_TIMEOUT;
	for (tries = CS_TIMEOUT; tries && regs->iar == SP_IN_INIT; tries--)
		DELAY(10);
	if (tries == 0)
		printf("%s: timeout committing fspb\n", sc->sc_dev.dv_xname);

	regs->iar = MODE_CHANGE_ENABLE | CS_REC_FORMAT;
	regs->idr = fs;
	r = regs->idr;
	r = regs->idr;
	for (tries = CS_TIMEOUT; tries && regs->iar == SP_IN_INIT; tries--)
		DELAY(10);
	if (tries == 0)
		printf("%s: timeout committing cdf\n", sc->sc_dev.dv_xname);

	regs->iar = 0;
	for (tries = CS_TIMEOUT; tries && regs->iar == SP_IN_INIT; tries--)
		DELAY(10);
	if (tries == 0)
		printf("%s: timeout waiting for !mce\n", sc->sc_dev.dv_xname);

	regs->iar = SP_TEST_AND_INIT;
	for (tries = CS_TIMEOUT; tries && regs->idr & AUTO_CAL_IN_PROG; tries--)
		DELAY(10);
	if (tries == 0)
		printf("%s: timeout waiting for autocalibration\n",
		    sc->sc_dev.dv_xname);

	sc->sc_need_commit = 0;
	return (0);
}

int
cs4231_halt_output(addr)
	void *addr;
{
	struct cs4231_softc *sc = (struct cs4231_softc *)addr;
	struct cs4231_regs *regs = sc->sc_regs;
	u_int8_t r;

	mtx_enter(&audio_lock);
	regs->dma_csr &= ~(APC_CSR_EI | APC_CSR_GIE | APC_CSR_PIE |
	    APC_CSR_EIE | APC_CSR_PDMA_GO | APC_CSR_PMIE);
	regs->iar = SP_INTERFACE_CONFIG;
	r = regs->idr & (~PLAYBACK_ENABLE);
	regs->iar = SP_INTERFACE_CONFIG;
	regs->idr = r;
	sc->sc_playback.cs_locked = 0;
	mtx_leave(&audio_lock);
	return (0);
}

int
cs4231_halt_input(addr)
	void *addr;
{
	struct cs4231_softc *sc = (struct cs4231_softc *)addr;
	struct cs4231_regs *regs = sc->sc_regs;

	mtx_enter(&audio_lock);
	regs->dma_csr = APC_CSR_CAPTURE_PAUSE;
	regs->iar = SP_INTERFACE_CONFIG;
	regs->idr &= ~CAPTURE_ENABLE;
	sc->sc_capture.cs_locked = 0;
	mtx_leave(&audio_lock);
	return (0);
}

int
cs4231_getdev(addr, retp)
	void *addr;
	struct audio_device *retp;
{
	*retp = cs4231_device;
	return (0);
}

int
cs4231_set_port(addr, cp)
	void *addr;
	mixer_ctrl_t *cp;
{
	struct cs4231_softc *sc = (struct cs4231_softc *)addr;
	int error = EINVAL;

	DPRINTF(("cs4231_set_port: port=%d type=%d\n", cp->dev, cp->type));

	switch (cp->dev) {
	case CSAUDIO_DAC_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_regs->iar = SP_LEFT_AUX1_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] &
			    AUX_INPUT_ATTEN_BITS;
		}
		else if (cp->un.value.num_channels == 2) {
			sc->sc_regs->iar = SP_LEFT_AUX1_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] &
			    AUX_INPUT_ATTEN_BITS;
			sc->sc_regs->iar = SP_RIGHT_AUX1_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] &
			    AUX_INPUT_ATTEN_BITS;
		} else
			break;
		error = 0;
		break;
	case CSAUDIO_LINE_IN_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_regs->iar = CS_LEFT_LINE_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] &
			    AUX_INPUT_ATTEN_BITS;
		}
		else if (cp->un.value.num_channels == 2) {
			sc->sc_regs->iar = CS_LEFT_LINE_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] &
			    AUX_INPUT_ATTEN_BITS;
			sc->sc_regs->iar = CS_RIGHT_LINE_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] &
			    AUX_INPUT_ATTEN_BITS;
		} else
			break;
		error = 0;
		break;
	case CSAUDIO_MIC_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
#if 0
			sc->sc_regs->iar = CS_MONO_IO_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] &
			    MONO_INPUT_ATTEN_BITS;
#endif
		} else
			break;
		error = 0;
		break;
	case CSAUDIO_CD_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_regs->iar = SP_LEFT_AUX2_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] &
			    AUX_INPUT_ATTEN_BITS;
			error = 0;
		}
		else if (cp->un.value.num_channels == 2) {
			sc->sc_regs->iar = SP_LEFT_AUX2_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] &
			    AUX_INPUT_ATTEN_BITS;
			sc->sc_regs->iar = SP_RIGHT_AUX2_CONTROL;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] &
			    AUX_INPUT_ATTEN_BITS;
			error = 0;
		}
		else
			break;
		break;
	case CSAUDIO_MONITOR_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_regs->iar = SP_DIGITAL_MIX;
			sc->sc_regs->idr =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] << 2;
		}
		else
			break;
		error = 0;
		break;
	case CSAUDIO_OUTPUT_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_volume[CSPORT_SPEAKER].left =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
			sc->sc_volume[CSPORT_SPEAKER].right =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
		}
		else if (cp->un.value.num_channels == 2) {
			sc->sc_volume[CSPORT_SPEAKER].left =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
			sc->sc_volume[CSPORT_SPEAKER].right =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
		}
		else
			break;

		cs4231_setup_output(sc);
		error = 0;
		break;
	case CSAUDIO_OUTPUT:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		if (cp->un.ord != CSPORT_LINEOUT &&
		    cp->un.ord != CSPORT_SPEAKER &&
		    cp->un.ord != CSPORT_HEADPHONE)
			return (EINVAL);
		sc->sc_out_port = cp->un.ord;
		cs4231_setup_output(sc);
		error = 0;
		break;
	case CSAUDIO_LINE_IN_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		sc->sc_mute[CSPORT_LINEIN] = cp->un.ord ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_DAC_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		sc->sc_mute[CSPORT_AUX1] = cp->un.ord ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_CD_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		sc->sc_mute[CSPORT_AUX2] = cp->un.ord ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_MIC_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		sc->sc_mute[CSPORT_MONO] = cp->un.ord ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_MONITOR_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		sc->sc_mute[CSPORT_MONITOR] = cp->un.ord ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_OUTPUT_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		sc->sc_mute[CSPORT_SPEAKER] = cp->un.ord ? 1 : 0;
		cs4231_setup_output(sc);
		error = 0;
		break;
	case CSAUDIO_REC_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_adc.left =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
			sc->sc_adc.right =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
		} else if (cp->un.value.num_channels == 2) {
			sc->sc_adc.left =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
			sc->sc_adc.right =
			    cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
		} else
			break;
		cs4231_setup_output(sc);
		error = 0;
		break;
	case CSAUDIO_RECORD_SOURCE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		if (cp->un.ord == CSPORT_MICROPHONE ||
		    cp->un.ord == CSPORT_LINEIN ||
		    cp->un.ord == CSPORT_AUX1 ||
		    cp->un.ord == CSPORT_DAC) {
			sc->sc_in_port = cp->un.ord;
			error = 0;
			cs4231_setup_output(sc);
		}
		break;
	}

	return (error);
}

int
cs4231_get_port(addr, cp)
	void *addr;
	mixer_ctrl_t *cp;
{
	struct cs4231_softc *sc = (struct cs4231_softc *)addr;
	int error = EINVAL;

	DPRINTF(("cs4231_get_port: port=%d type=%d\n", cp->dev, cp->type));

	switch (cp->dev) {
	case CSAUDIO_DAC_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_regs->iar = SP_LEFT_AUX1_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
			    sc->sc_regs->idr & AUX_INPUT_ATTEN_BITS;
		}
		else if (cp->un.value.num_channels == 2) {
			sc->sc_regs->iar = SP_LEFT_AUX1_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
			    sc->sc_regs->idr & AUX_INPUT_ATTEN_BITS;
			sc->sc_regs->iar = SP_RIGHT_AUX1_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
			    sc->sc_regs->idr & AUX_INPUT_ATTEN_BITS;
		} else
			break;
		error = 0;
		break;
	case CSAUDIO_LINE_IN_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_regs->iar = CS_LEFT_LINE_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
			    sc->sc_regs->idr & AUX_INPUT_ATTEN_BITS;
		}
		else if (cp->un.value.num_channels == 2) {
			sc->sc_regs->iar = CS_LEFT_LINE_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
			    sc->sc_regs->idr & AUX_INPUT_ATTEN_BITS;
			sc->sc_regs->iar = CS_RIGHT_LINE_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
			    sc->sc_regs->idr & AUX_INPUT_ATTEN_BITS;
		} else
			break;
		error = 0;
		break;
	case CSAUDIO_MIC_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
#if 0
			sc->sc_regs->iar = CS_MONO_IO_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
			    sc->sc_regs->idr & MONO_INPUT_ATTEN_BITS;
#endif
		} else
			break;
		error = 0;
		break;
	case CSAUDIO_CD_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_regs->iar = SP_LEFT_AUX2_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
			    sc->sc_regs->idr & AUX_INPUT_ATTEN_BITS;
			error = 0;
		}
		else if (cp->un.value.num_channels == 2) {
			sc->sc_regs->iar = SP_LEFT_AUX2_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
			    sc->sc_regs->idr & AUX_INPUT_ATTEN_BITS;
			sc->sc_regs->iar = SP_RIGHT_AUX2_CONTROL;
			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
			    sc->sc_regs->idr & AUX_INPUT_ATTEN_BITS;
			error = 0;
		}
		else
			break;
		break;
	case CSAUDIO_MONITOR_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			sc->sc_regs->iar = SP_DIGITAL_MIX;
			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
			    sc->sc_regs->idr >> 2;
		}
		else
			break;
		error = 0;
		break;
	case CSAUDIO_OUTPUT_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1)
			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
			    sc->sc_volume[CSPORT_SPEAKER].left;
		else if (cp->un.value.num_channels == 2) {
			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
			    sc->sc_volume[CSPORT_SPEAKER].left;
			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
			    sc->sc_volume[CSPORT_SPEAKER].right;
		}
		else
			break;
		error = 0;
		break;
	case CSAUDIO_LINE_IN_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		cp->un.ord = sc->sc_mute[CSPORT_LINEIN] ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_DAC_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		cp->un.ord = sc->sc_mute[CSPORT_AUX1] ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_CD_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		cp->un.ord = sc->sc_mute[CSPORT_AUX2] ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_MIC_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		cp->un.ord = sc->sc_mute[CSPORT_MONO] ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_MONITOR_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		cp->un.ord = sc->sc_mute[CSPORT_MONITOR] ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_OUTPUT_MUTE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		cp->un.ord = sc->sc_mute[CSPORT_SPEAKER] ? 1 : 0;
		error = 0;
		break;
	case CSAUDIO_REC_LVL:
		if (cp->type != AUDIO_MIXER_VALUE)
			break;
		if (cp->un.value.num_channels == 1) {
			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
			    sc->sc_adc.left;
		} else if (cp->un.value.num_channels == 2) {
			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
			    sc->sc_adc.left;
			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
			    sc->sc_adc.right;
		} else
			break;
		error = 0;
		break;
	case CSAUDIO_RECORD_SOURCE:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		cp->un.ord = sc->sc_in_port;
		error = 0;
		break;
	case CSAUDIO_OUTPUT:
		if (cp->type != AUDIO_MIXER_ENUM)
			break;
		cp->un.ord = sc->sc_out_port;
		error = 0;
		break;
	}
	return (error);
}

int
cs4231_query_devinfo(addr, dip)
	void *addr;
	mixer_devinfo_t *dip;
{
	int err = 0;

	switch (dip->index) {
	case CSAUDIO_MIC_LVL:		/* mono/microphone mixer */
		dip->type = AUDIO_MIXER_VALUE;
		dip->mixer_class = CSAUDIO_INPUT_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = CSAUDIO_MIC_MUTE;
		strlcpy(dip->label.name, AudioNmicrophone,
		    sizeof dip->label.name);
		dip->un.v.num_channels = 1;
		strlcpy(dip->un.v.units.name, AudioNvolume,
		    sizeof dip->un.v.units.name);
		break;
	case CSAUDIO_DAC_LVL:		/* dacout */
		dip->type = AUDIO_MIXER_VALUE;
		dip->mixer_class = CSAUDIO_INPUT_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = CSAUDIO_DAC_MUTE;
		strlcpy(dip->label.name, AudioNdac, sizeof dip->label.name);
		dip->un.v.num_channels = 2;
		strlcpy(dip->un.v.units.name, AudioNvolume,
		    sizeof dip->un.v.units.name);
		break;
	case CSAUDIO_LINE_IN_LVL:	/* line */
		dip->type = AUDIO_MIXER_VALUE;
		dip->mixer_class = CSAUDIO_INPUT_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = CSAUDIO_LINE_IN_MUTE;
		strlcpy(dip->label.name, AudioNline, sizeof dip->label.name);
		dip->un.v.num_channels = 2;
		strlcpy(dip->un.v.units.name, AudioNvolume,
		    sizeof dip->un.v.units.name);
		break;
	case CSAUDIO_CD_LVL:		/* cd */
		dip->type = AUDIO_MIXER_VALUE;
		dip->mixer_class = CSAUDIO_INPUT_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = CSAUDIO_CD_MUTE;
		strlcpy(dip->label.name, AudioNcd, sizeof dip->label.name);
		dip->un.v.num_channels = 2;
		strlcpy(dip->un.v.units.name, AudioNvolume,
		    sizeof dip->un.v.units.name);
		break;
	case CSAUDIO_MONITOR_LVL:	/* monitor level */
		dip->type = AUDIO_MIXER_VALUE;
		dip->mixer_class = CSAUDIO_MONITOR_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = CSAUDIO_MONITOR_MUTE;
		strlcpy(dip->label.name, AudioNmonitor, sizeof dip->label.name);
		dip->un.v.num_channels = 1;
		strlcpy(dip->un.v.units.name, AudioNvolume,
		    sizeof dip->un.v.units.name);
		break;
	case CSAUDIO_OUTPUT_LVL:
		dip->type = AUDIO_MIXER_VALUE;
		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = CSAUDIO_OUTPUT_MUTE;
		strlcpy(dip->label.name, AudioNoutput, sizeof dip->label.name);
		dip->un.v.num_channels = 2;
		strlcpy(dip->un.v.units.name, AudioNvolume,
		    sizeof dip->un.v.units.name);
		break;
	case CSAUDIO_LINE_IN_MUTE:
		dip->type = AUDIO_MIXER_ENUM;
		dip->mixer_class = CSAUDIO_INPUT_CLASS;
		dip->prev = CSAUDIO_LINE_IN_LVL;
		dip->next = AUDIO_MIXER_LAST;
		goto mute;
	case CSAUDIO_DAC_MUTE:
		dip->type = AUDIO_MIXER_ENUM;
		dip->mixer_class = CSAUDIO_INPUT_CLASS;
		dip->prev = CSAUDIO_DAC_LVL;
		dip->next = AUDIO_MIXER_LAST;
		goto mute;
	case CSAUDIO_CD_MUTE:
		dip->type = AUDIO_MIXER_ENUM;
		dip->mixer_class = CSAUDIO_INPUT_CLASS;
		dip->prev = CSAUDIO_CD_LVL;
		dip->next = AUDIO_MIXER_LAST;
		goto mute;
	case CSAUDIO_MIC_MUTE:
		dip->type = AUDIO_MIXER_ENUM;
		dip->mixer_class = CSAUDIO_INPUT_CLASS;
		dip->prev = CSAUDIO_MIC_LVL;
		dip->next = AUDIO_MIXER_LAST;
		goto mute;
	case CSAUDIO_MONITOR_MUTE:
		dip->type = AUDIO_MIXER_ENUM;
		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
		dip->prev = CSAUDIO_MONITOR_LVL;
		dip->next = AUDIO_MIXER_LAST;
		goto mute;
	case CSAUDIO_OUTPUT_MUTE:
		dip->type = AUDIO_MIXER_ENUM;
		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
		dip->prev = CSAUDIO_OUTPUT_LVL;
		dip->next = AUDIO_MIXER_LAST;
		goto mute;

	mute:
		strlcpy(dip->label.name, AudioNmute, sizeof dip->label.name);
		dip->un.e.num_mem = 2;
		strlcpy(dip->un.e.member[0].label.name, AudioNon,
		    sizeof dip->un.e.member[0].label.name);
		dip->un.e.member[0].ord = 0;
		strlcpy(dip->un.e.member[1].label.name, AudioNoff,
		    sizeof dip->un.e.member[1].label.name);
		dip->un.e.member[1].ord = 1;
		break;
	case CSAUDIO_REC_LVL:		/* record level */
		dip->type = AUDIO_MIXER_VALUE;
		dip->mixer_class = CSAUDIO_RECORD_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = CSAUDIO_RECORD_SOURCE;
		strlcpy(dip->label.name, AudioNrecord, sizeof dip->label.name);
		dip->un.v.num_channels = 2;
		strlcpy(dip->un.v.units.name, AudioNvolume,
		    sizeof dip->un.v.units.name);
		break;
	case CSAUDIO_RECORD_SOURCE:
		dip->type = AUDIO_MIXER_ENUM;
		dip->mixer_class = CSAUDIO_RECORD_CLASS;
		dip->prev = CSAUDIO_REC_LVL;
		dip->next = AUDIO_MIXER_LAST;
		strlcpy(dip->label.name, AudioNsource, sizeof dip->label.name);
		dip->un.e.num_mem = 4;
		strlcpy(dip->un.e.member[0].label.name, AudioNmicrophone,
		    sizeof dip->un.e.member[0].label.name);
		dip->un.e.member[0].ord = CSPORT_MICROPHONE;
		strlcpy(dip->un.e.member[1].label.name, AudioNline,
		    sizeof dip->un.e.member[1].label.name);
		dip->un.e.member[1].ord = CSPORT_LINEIN;
		strlcpy(dip->un.e.member[2].label.name, AudioNcd,
		    sizeof dip->un.e.member[2].label.name);
		dip->un.e.member[2].ord = CSPORT_AUX1;
		strlcpy(dip->un.e.member[3].label.name, AudioNdac,
		    sizeof dip->un.e.member[3].label.name);
		dip->un.e.member[3].ord = CSPORT_DAC;
		break;
	case CSAUDIO_OUTPUT:
		dip->type = AUDIO_MIXER_ENUM;
		dip->mixer_class = CSAUDIO_MONITOR_CLASS;
		dip->prev = dip->next = AUDIO_MIXER_LAST;
		strlcpy(dip->label.name, AudioNoutput, sizeof dip->label.name);
		dip->un.e.num_mem = 3;
		strlcpy(dip->un.e.member[0].label.name, AudioNspeaker,
		    sizeof dip->un.e.member[0].label.name);
		dip->un.e.member[0].ord = CSPORT_SPEAKER;
		strlcpy(dip->un.e.member[1].label.name, AudioNline,
		    sizeof dip->un.e.member[1].label.name);
		dip->un.e.member[1].ord = CSPORT_LINEOUT;
		strlcpy(dip->un.e.member[2].label.name, AudioNheadphone,
		    sizeof dip->un.e.member[2].label.name);
		dip->un.e.member[2].ord = CSPORT_HEADPHONE;
		break;
	case CSAUDIO_INPUT_CLASS:	/* input class descriptor */
		dip->type = AUDIO_MIXER_CLASS;
		dip->mixer_class = CSAUDIO_INPUT_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = AUDIO_MIXER_LAST;
		strlcpy(dip->label.name, AudioCinputs, sizeof dip->label.name);
		break;
	case CSAUDIO_OUTPUT_CLASS:	/* output class descriptor */
		dip->type = AUDIO_MIXER_CLASS;
		dip->mixer_class = CSAUDIO_OUTPUT_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = AUDIO_MIXER_LAST;
		strlcpy(dip->label.name, AudioCoutputs, sizeof dip->label.name);
		break;
	case CSAUDIO_MONITOR_CLASS:	/* monitor class descriptor */
		dip->type = AUDIO_MIXER_CLASS;
		dip->mixer_class = CSAUDIO_MONITOR_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = AUDIO_MIXER_LAST;
		strlcpy(dip->label.name, AudioCmonitor, sizeof dip->label.name);
		break;
	case CSAUDIO_RECORD_CLASS:	/* record class descriptor */
		dip->type = AUDIO_MIXER_CLASS;
		dip->mixer_class = CSAUDIO_RECORD_CLASS;
		dip->prev = AUDIO_MIXER_LAST;
		dip->next = AUDIO_MIXER_LAST;
		strlcpy(dip->label.name, AudioCrecord, sizeof dip->label.name);
		break;
	default:
		err = ENXIO;
	}

	return (err);
}

void *
cs4231_alloc(addr, direction, size, pool, flags)
	void *addr;
	int direction;
	size_t size;
	int pool;
	int flags;
{
	struct cs4231_softc *sc = (struct cs4231_softc *)addr;
	struct cs_dma *p;

	p = (struct cs_dma *)malloc(sizeof(struct cs_dma), pool, flags);
	if (p == NULL)
		return (NULL);

	p->addr_dva = dvma_malloc(size, &p->addr, flags);
	if (p->addr_dva == NULL) {
		free(p, pool, 0);
		return (NULL);
	}

	p->size = size;
	p->next = sc->sc_dmas;
	sc->sc_dmas = p;
	return (p->addr);
}

void
cs4231_free(addr, ptr, pool)
	void *addr;
	void *ptr;
	int pool;
{
	struct cs4231_softc *sc = addr;
	struct cs_dma *p, **pp;

	for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &(*pp)->next) {
		if (p->addr != ptr)
			continue;
		dvma_free(p->addr_dva, p->size, &p->addr);
		*pp = p->next;
		free(p, pool, 0);
		return;
	}
	printf("%s: attempt to free rogue pointer\n", sc->sc_dev.dv_xname);
}

int
cs4231_get_props(addr)
	void *addr;
{
	return (AUDIO_PROP_FULLDUPLEX);
}

int
cs4231_trigger_output(addr, start, end, blksize, intr, arg, param)
	void *addr, *start, *end;
	int blksize;
	void (*intr)(void *);
	void *arg;
	struct audio_params *param;
{
	struct cs4231_softc *sc = addr;
	struct cs4231_regs *regs = sc->sc_regs;
	struct cs_channel *chan = &sc->sc_playback;
	struct cs_dma *p;
	u_int8_t reg;
	u_int32_t n, csr;

	mtx_enter(&audio_lock);
	if (chan->cs_locked != 0) {
		printf("cs4231_trigger_output: already running\n");
		mtx_leave(&audio_lock);
		return (EINVAL);
	}

	chan->cs_locked = 1;
	chan->cs_intr = intr;
	chan->cs_arg = arg;

	p = sc->sc_dmas;
	while (p != NULL && p->addr != start)
		p = p->next;
	if (p == NULL) {
		printf("cs4231_trigger_output: bad addr: %p\n", start);
		mtx_leave(&audio_lock);
		return (EINVAL);
	}

	n = (char *)end - (char *)start;

	/*
	 * Do only `blksize' at a time, so audio_pint() is kept
	 * synchronous with us...
	 */
	chan->cs_blksz = blksize;
	chan->cs_curdma = p;
	chan->cs_segsz = n;

	if (n > chan->cs_blksz)
		n = chan->cs_blksz;

	chan->cs_cnt = n;

	csr = regs->dma_csr;
	regs->dma_pnva = (u_int32_t)p->addr_dva;
	regs->dma_pnc = n;

	if ((csr & APC_CSR_PDMA_GO) == 0 || (csr & APC_CSR_PPAUSE) != 0) {
		regs->dma_csr &= ~(APC_CSR_PIE | APC_CSR_PPAUSE);
		regs->dma_csr |= APC_CSR_EI | APC_CSR_GIE |
				 APC_CSR_PIE | APC_CSR_EIE |
				 APC_CSR_PMIE | APC_CSR_PDMA_GO;
		regs->iar = SP_LOWER_BASE_COUNT;
		regs->idr = 0xff;
		regs->iar = SP_UPPER_BASE_COUNT;
		regs->idr = 0xff;
		regs->iar = SP_INTERFACE_CONFIG;
		reg = regs->idr | PLAYBACK_ENABLE;
		regs->iar = SP_INTERFACE_CONFIG;
		regs->idr = reg;
	}
	mtx_leave(&audio_lock);
	return (0);
}

int
cs4231_trigger_input(addr, start, end, blksize, intr, arg, param)
	void *addr, *start, *end;
	int blksize;
	void (*intr)(void *);
	void *arg;
	struct audio_params *param;
{
	struct cs4231_softc *sc = addr;
	struct cs_channel *chan = &sc->sc_capture;
	struct cs_dma *p;
	u_int32_t csr;
	u_long n;

	mtx_enter(&audio_lock);
	if (chan->cs_locked != 0) {
		printf("%s: trigger_input: already running\n",
		    sc->sc_dev.dv_xname);
		mtx_leave(&audio_lock);
		return (EINVAL);
	}
	chan->cs_locked = 1;
	chan->cs_intr = intr;
	chan->cs_arg = arg;

	for (p = sc->sc_dmas; p->addr != start; p = p->next)
		/*EMPTY*/;
	if (p == NULL) {
		printf("%s: trigger_input: bad addr: %p\n",
		    sc->sc_dev.dv_xname, start);
		mtx_leave(&audio_lock);
		return (EINVAL);
	}

	n = (char *)end - (char *)start;

	/*
	 * Do only `blksize' at a time, so audio_cint() is kept
	 * synchronous with us...
	 */
	chan->cs_blksz = blksize;
	chan->cs_curdma = p;
	chan->cs_segsz = n;

	if (n > chan->cs_blksz)
		n = chan->cs_blksz;
	chan->cs_cnt = n;

	sc->sc_regs->dma_cnva = (u_int32_t)p->addr_dva;
	sc->sc_regs->dma_cnc = n;

	csr = sc->sc_regs->dma_csr;
	if ((csr & APC_CSR_CDMA_GO) == 0 || (csr & APC_CSR_CPAUSE) != 0) {
		csr &= APC_CSR_CPAUSE;
		csr |= APC_CSR_GIE | APC_CSR_CMIE | APC_CSR_CIE | APC_CSR_EI |
		    APC_CSR_CDMA_GO;
		sc->sc_regs->dma_csr = csr;
		cs4231_write(sc, CS_LOWER_REC_CNT, 0xff);
		cs4231_write(sc, CS_UPPER_REC_CNT, 0xff);
		cs4231_write(sc, SP_INTERFACE_CONFIG,
		    cs4231_read(sc, SP_INTERFACE_CONFIG) | CAPTURE_ENABLE);
	}

	if (sc->sc_regs->dma_csr & APC_CSR_CD) {
		u_long nextaddr, togo;

		p = chan->cs_curdma;
		togo = chan->cs_segsz - chan->cs_cnt;
		if (togo == 0) {
			nextaddr = (u_int32_t)p->addr_dva;
			chan->cs_cnt = togo = chan->cs_blksz;
		} else {
			nextaddr = sc->sc_regs->dma_cnva + chan->cs_blksz;
			if (togo > chan->cs_blksz)
				togo = chan->cs_blksz;
			chan->cs_cnt += togo;
		}

		sc->sc_regs->dma_cnva = nextaddr;
		sc->sc_regs->dma_cnc = togo;
	}
	mtx_leave(&audio_lock);
	return (0);
}


code:
/*	$OpenBSD: cs4231reg.h,v 1.4 2003/06/02 18:40:59 jason Exp $	*/

/*
 * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Driver for the CS4231 audio in some sun4m systems
 */

/*
 * CS4231 registers from CS web site and Solaris 2.6 includes.
 */
struct cs4231_regs {
	volatile u_int8_t	iar;		/* index address */
	volatile u_int8_t	_padding1[3];	/* reserved */
	volatile u_int8_t	idr;		/* index data */
	volatile u_int8_t	_padding2[3];	/* reserved */
	volatile u_int8_t	status;		/* status */
	volatile u_int8_t	_padding3[3];	/* reserved */
	volatile u_int8_t	pior;		/* PIO data i/o */
	volatile u_int8_t	_padding4[3];	/* reserved */
	volatile u_int32_t	dma_csr;	/* APC control/status */
	volatile u_int32_t	_padding5[3];	/* reserved */
	volatile u_int32_t	dma_cva;	/* capture virtual addr */
	volatile u_int32_t	dma_cc;		/* capture count */
	volatile u_int32_t	dma_cnva;	/* capture next virtual addr */
	volatile u_int32_t	dma_cnc;	/* capture next count */
	volatile u_int32_t	dma_pva;	/* playback virtual addr */
	volatile u_int32_t	dma_pc;		/* playback count */
	volatile u_int32_t	dma_pnva;	/* playback next virtual addr */
	volatile u_int32_t	dma_pnc;	/* playback next count */
};


code:
/*	$OpenBSD: cs4231var.h,v 1.10 2006/06/02 20:00:54 miod Exp $	*/

/*
 * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Driver for CS4231 based audio found in some sun4m systems
 */

/*
 * List of device memory allocations (see cs4231_malloc/cs4231_free).
 */
struct cs_dma {
	struct cs_dma *next;
	caddr_t addr;		/* cpu address */
	caddr_t addr_dva;	/* hardware address */
	size_t size;
};

struct cs_volume {
	u_int8_t	left;
	u_int8_t	right;
};

struct cs_channel {
	void		(*cs_intr)(void *);	/* interrupt handler */
	void		*cs_arg;		/* interrupt arg */
	struct cs_dma	*cs_curdma;		/* current dma block */
	u_int32_t	cs_cnt;			/* current block count */
	u_int32_t	cs_blksz;		/* current block size */
	u_int32_t	cs_segsz;		/* current segment size */
	int		cs_locked;		/* channel locked? */
};

struct cs4231_softc {
	struct	device sc_dev;		/* base device */
	struct	intrhand sc_ih;		/* hardware interrupt vectoring */
	struct	cs4231_regs *sc_regs;	/* CS4231/APC registers */
	int	sc_node;		/* which sbus node */
	int	sc_burst;		/* XXX: DMA burst size in effect */
	int	sc_open;		/* already open? */

	struct cs_channel sc_playback, sc_capture;

	char		sc_mute[9];	/* which devs are muted */
	u_int8_t	sc_out_port;	/* output port */
	u_int8_t	sc_in_port;	/* input port */
	struct	cs_volume sc_volume[9];	/* software volume */
	struct	cs_volume sc_adc;	/* adc volume */

	int sc_format_bits;
	int sc_speed_bits;
	int sc_precision;
	int sc_need_commit;
	int sc_channels;
	struct cs_dma	*sc_dmas;	/* dma list */
	struct cs_dma	*sc_nowplaying;
};


code:
/*	$OpenBSD: daadio.c,v 1.7 2015/03/28 19:07:07 miod Exp $	*/

/*
 * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
 * All rights reserved.
 *
 * This software was developed by Jason L. Wright under contract with
 * RTMX Incorporated (http://www.rtmx.com).
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Driver for the MATRIX Corporation MD-DAADIO digital->analog,
 * analog->digial, parallel i/o VME board.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/errno.h>
#include <sys/ioctl.h>
#include <sys/syslog.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <sys/conf.h>
#include <sys/fcntl.h>
#include <sys/proc.h>

#include <machine/autoconf.h>
#include <sparc/cpu.h>
#include <sparc/sparc/cpuvar.h>
#include <machine/daadioio.h>

#include <sparc/dev/fgareg.h>
#include <sparc/dev/fgavar.h>
#include <sparc/dev/daadioreg.h>

int	daadiomatch(struct device *, void *, void *);
void	daadioattach(struct device *, struct device *, void *);
int	daadiointr(void *);

struct daadio_softc {
	struct		device sc_dv;		/* base device */
	struct		daadioregs *sc_regs;	/* registers */
	struct		intrhand sc_ih;		/* interrupt vectoring */
	struct		daadio_adc *sc_adc_p;
	int		sc_adc_done;
	int		sc_flags;		/* flags */
#define	DAF_LOCKED	0x1
#define	DAF_WANTED	0x2
	u_int16_t	sc_adc_val;
	u_int8_t	sc_ier;			/* software copy of ier */
};

struct cfattach daadio_ca = {
	sizeof (struct daadio_softc), daadiomatch, daadioattach
};

struct cfdriver daadio_cd = {
	NULL, "daadio", DV_DULL
};

void	daadio_ier_setbit(struct daadio_softc *, u_int8_t);
void	daadio_ier_clearbit(struct daadio_softc *, u_int8_t);
int	daadio_adc(struct daadio_softc *, struct daadio_adc *);

int	daadioopen(dev_t, int, int, struct proc *);
int	daadioclose(dev_t, int, int, struct proc *);
int	daadioioctl(dev_t, u_long, caddr_t, int, struct proc *);

int
daadiomatch(parent, vcf, aux)
	struct device *parent;
	void *vcf, *aux;
{
	struct cfdata *cf = vcf;
	struct confargs *ca = aux;
	struct daadioregs *regs;

	if (ca->ca_bustype != BUS_FGA_A16D16)
		return (0);

	if (strcmp(ca->ca_ra.ra_name, cf->cf_driver->cd_name))
		return (0);

	if (ca->ca_ra.ra_reg[0].rr_len < sizeof(struct daadioboard))
		return (0);

	regs = ca->ca_ra.ra_reg[0].rr_paddr;
	if (probeget((caddr_t)&regs->sid, 1) != -1)
		return (1);

	return (0);
}

void
daadioattach(parent, self, aux)
	struct device *parent, *self;
	void *aux;
{
	struct confargs *ca = aux;
	struct daadio_softc *sc = (struct daadio_softc *)self;

	sc->sc_regs = mapiodev(&(ca->ca_ra.ra_reg[0]), 0,
	    sizeof(struct daadioboard));

	sc->sc_regs->pio_pattern = sc->sc_regs->pio_porta;
	sc->sc_regs->sid = ca->ca_ra.ra_intr[0].int_vec;
	sc->sc_regs->gvrilr &= ~ILR_IRQ_MASK;
	sc->sc_regs->gvrilr |= (ca->ca_ra.ra_intr[0].int_pri << ILR_IRQ_SHIFT)
	    & ILR_IRQ_MASK;
	sc->sc_ih.ih_fun = daadiointr;
	sc->sc_ih.ih_arg = sc;
	fvmeintrestablish(parent, ca->ca_ra.ra_intr[0].int_vec,
	    ca->ca_ra.ra_intr[0].int_pri, &sc->sc_ih, self->dv_xname);
	daadio_ier_setbit(sc, IER_PIOEVENT);
	daadio_ier_setbit(sc, IER_CONVERSION);

	printf(": level %d vec 0x%x\n",
	    ca->ca_ra.ra_intr[0].int_pri, ca->ca_ra.ra_intr[0].int_vec);
}

int
daadiointr(vsc)
	void *vsc;
{
	struct daadio_softc *sc = vsc;
	struct daadioregs *regs = sc->sc_regs;
	u_int8_t val, isr;
	int r = 0;

	isr = regs->isr;

	if (isr & ISR_PIOEVENT) {
		val = regs->pio_porta;
		printf("pio value: %x\n", val);
		r = 1;
		regs->pio_pattern = val;
	}

	if (isr & ISR_CONVERSION) {
		r = 1;
		sc->sc_adc_val = sc->sc_regs->adc12bit[0];
		sc->sc_adc_done = 1;
		if (sc->sc_adc_p != NULL)
			wakeup(sc->sc_adc_p);
	}

	return (r);
}

void
daadio_ier_setbit(sc, v)
	struct daadio_softc *sc;
	u_int8_t v;
{
	sc->sc_ier |= v;
	sc->sc_regs->ier = sc->sc_ier;
}

void
daadio_ier_clearbit(sc, v)
	struct daadio_softc *sc;
	u_int8_t v;
{
	sc->sc_ier &= ~v;
	sc->sc_regs->ier = sc->sc_ier;
}

#define	DAADIO_CARD(d)	((minor(d) >> 6) & 3)

int
daadioopen(dev, flags, mode, p)
	dev_t dev;
	int flags, mode;
	struct proc *p;
{
	struct daadio_softc *sc;
	int card = DAADIO_CARD(dev);

	if (card >= daadio_cd.cd_ndevs)
		return (ENXIO);
	sc = daadio_cd.cd_devs[card];
	if (sc == NULL)
		return (ENXIO);
	return (0);
}

int
daadioclose(dev, flags, mode, p)
	dev_t dev;
	int flags, mode;
	struct proc *p;
{
	return (0);
}

int
daadioioctl(dev, cmd, data, flags, p)
	dev_t dev;
	u_long cmd;
	caddr_t data;
	int flags;
	struct proc *p;
{
	struct daadio_softc *sc = daadio_cd.cd_devs[DAADIO_CARD(dev)];
	struct daadio_adc *adc = (struct daadio_adc *)data;
	struct daadio_dac *dac = (struct daadio_dac *)data;
	struct daadio_pio *pio = (struct daadio_pio *)data;
	int error = 0;
	u_int8_t reg, val;

	switch (cmd) {
	case DIOGADC:
		error = daadio_adc(sc, adc);
		break;
	case DIOGPIO:
		switch (pio->dap_reg) {
		case 0:
			pio->dap_val = sc->sc_regs->pio_porta;
			break;
		case 1:
			pio->dap_val = sc->sc_regs->pio_portb;
			break;
		case 2:
			pio->dap_val = sc->sc_regs->pio_portc;
			break;
		case 3:
			pio->dap_val = sc->sc_regs->pio_portd;
			break;
		case 4:
			pio->dap_val = sc->sc_regs->pio_porte;
			break;
		case 5:
			pio->dap_val = sc->sc_regs->pio_portf;
			break;
		default:
			error = EINVAL;
			break;
		}
		break;
	case DIOSPIO:
		if ((flags & FWRITE) == 0) {
			error = EPERM;
			break;
		}
		switch (pio->dap_reg) {
		case 0:
			sc->sc_regs->pio_porta = pio->dap_val;
			break;
		case 1:
			sc->sc_regs->pio_portb = pio->dap_val;
			break;
		case 2:
			sc->sc_regs->pio_portc = pio->dap_val;
			break;
		case 3:
			sc->sc_regs->pio_portd = pio->dap_val;
			break;
		case 4:
			sc->sc_regs->pio_porte = pio->dap_val;
			break;
		case 5:
			sc->sc_regs->pio_portf = pio->dap_val;
			break;
		default:
			error = EINVAL;
			break;
		}
		break;
	case DIOSOPIO:
		if ((flags & FWRITE) == 0) {
			error = EPERM;
			break;
		}
		if (pio->dap_reg >= 6) {
			error = EINVAL;
			break;
		}

		reg = sc->sc_regs->pio_oc;
		val = (1 << pio->dap_reg);

		if (pio->dap_val)
			reg |= val;
		else
			reg &= ~val;

		sc->sc_regs->pio_oc = reg;
		break;
	case DIOGOPIO:
		if (pio->dap_reg >= 6) {
			error = EINVAL;
			break;
		}

		reg = sc->sc_regs->pio_oc;
		val = (1 << pio->dap_reg);

		if ((reg & val) != 0)
			pio->dap_val = 1;
		else
			pio->dap_val = 0;
		break;
	case DIOSDAC:
		if ((flags & FWRITE) == 0) {
			error = EPERM;
			break;
		}
		if (dac->dac_reg >= 8) {
			error = EINVAL;
			break;
		}
		sc->sc_regs->dac_channel[dac->dac_reg] = dac->dac_val;
		break;
	default:
		error = ENOTTY;
	}

	return (error);
}

int
daadio_adc(sc, adc)
	struct daadio_softc *sc;
	struct daadio_adc *adc;
{
	int s, err = 0;

	if (adc->dad_reg >= 32)
		return (EINVAL);

	s = splhigh();

	/* Lock device. */
	while ((sc->sc_flags & DAF_LOCKED) != 0) {
		sc->sc_flags |= DAF_WANTED;
		if ((err = tsleep(sc, PWAIT, "daadio", 0)) != 0)
			goto out;
	}
	sc->sc_flags |= DAF_LOCKED;

	/* Start conversion. */
	sc->sc_adc_done = 0;
	sc->sc_adc_p = adc;
	sc->sc_regs->adc12bit[adc->dad_reg] = 0;

	/* Wait for conversion. */
	while (sc->sc_adc_done == 0)
		if ((err = tsleep(sc->sc_adc_p, PWAIT, "daadio", 0)) != 0)
			goto out;
	sc->sc_adc_p = NULL;
	adc->dad_val = sc->sc_adc_val;

	/* Unlock device. */
	sc->sc_flags &= ~DAF_LOCKED;
	if (sc->sc_flags & DAF_WANTED) {
		sc->sc_flags &= ~DAF_WANTED;
		wakeup(sc);
	}

out:
	splx(s);
	return (err);
}


code:
/*	$OpenBSD: daadioreg.h,v 1.2 2003/06/02 18:40:59 jason Exp $	*/

/*
 * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
 * All rights reserved.
 *
 * This software was developed by Jason L. Wright under contract with
 * RTMX Incorporated (http://www.rtmx.com).
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Register definitions for Matrix Corporation MD-DAADIO VME
 * digital/analog, analog/digitial, parallel i/o board.
 * Definitions from "MD-DAADIO User's Manual" revision B.3
 */

struct daadioregs {
	volatile u_int8_t	_unused0[32];	/* reserved */
	/* PIO module: 0x20-0x27 */
	volatile u_int8_t	pio_portb;	/* port b */
	volatile u_int8_t	pio_porta;	/* port a */
	volatile u_int8_t	pio_portd;	/* port d */
	volatile u_int8_t	pio_portc;	/* port c */
	volatile u_int8_t	pio_portf;	/* port f */
	volatile u_int8_t	pio_porte;	/* port e */
	volatile u_int8_t	_unused1[1];	/* reserved */
	volatile u_int8_t	pio_oc;		/* output control */

	volatile u_int8_t	_unused2[24];	/* reserved */

	/* DAC module: 0x40-0x4f */
	volatile u_int16_t	dac_channel[8];	/* dac channels 0-7 */

	volatile u_int8_t	_unused3[16];	/* reserved */

	/* Miscellaneous: 0x60-0x69 */
	volatile u_int8_t	_unused4;	/* reserved */
	volatile u_int8_t	gvrilr;		/* gain value/irq level */
	volatile u_int8_t	_unused5;	/* reserved */
	volatile u_int8_t	ier;		/* irq enable (wo) */
	volatile u_int8_t	_unused6;	/* reserved */
	volatile u_int8_t	pio_pattern;	/* pio pattern */
	volatile u_int8_t	_unused7;	/* reserved */
	volatile u_int8_t	sid;		/* status/id */
	volatile u_int8_t	_unused8;	/* reserved */
	volatile u_int8_t	isr;		/* interrupt status */

	volatile u_int8_t	_unused9[22];	/* reserved */

	/* ADC module: 0x80-0xff */
	volatile u_int16_t	adc12bit[32];	/* adc 12 bit channels 0-31 */
	volatile u_int16_t	adc8bit[32];	/* adc 8 bit channels 0-31 */
};

/*
 * The board occupies the space from 0 - 3ff (from some board configured
 * offset). There are four register mappings (the last three are redundant
 * mappings of the first)
 */
struct daadioboard {
	struct daadioregs	regs0;
	struct daadioregs	regs1;
	struct daadioregs	regs2;
	struct daadioregs	regs3;
};

/* gain value register/irq level register (gvr/ilr) */
#define ILR_TRIGGER		0x80		/* 0=internal,1=external */
#define	ILR_IRQ_MASK		0x70		/* IRQ level */
#define	ILR_IRQ_SHIFT		4		/* irq shift to/from lsbits */
#define	ILR_ADC_GAINMASK	0x07		/* adc gain select bits */
#define	ILR_ADC_GAIN1		0x00		/* 1x adc gain */
#define	ILR_ADC_GAIN2		0x01		/* 2x adc gain */
#define	ILR_ADC_GAIN4		0x02		/* 4x adc gain */
#define	ILR_ADC_GAIN8		0x03		/* 8x adc gain */
#define	ILR_ADC_GAIN16		0x04		/* 16x adc gain */

/* interrupt enable register (ier): WRITE ONLY */
#define	IER_MASK		0x07		/* interrupt bits */
#define	IER_PIPELINE		0x04		/* adc pipeline empty */
#define	IER_CONVERSION		0x02		/* adc conversion done */
#define	IER_PIOEVENT		0x01		/* pio event triggered */

/* interrupt status register (isr) */
#define	ISR_MASK		0x07		/* interrupt bits */
#define	ISR_PIPELINE		0x04		/* adc pipeline empty */
#define	ISR_CONVERSION		0x02		/* adc conversion done */
#define	ISR_PIOEVENT		0x01		/* pio event triggered */

/* analog/digital data register */
#define	ADC_IV			0x1000		/* invalid (out of range) */
#define	ADC_PR			0x2000		/* pipeline empty */
#define	ADC_DR			0x4000		/* data ready (valid) */
#define	ADC_OW			0x8000		/* data overwritten */
#define	ADC_DATAMASK		0x0fff		/* the actual data */

/* output control register (pio_oc) */
#define	PIOC_OCA		0x01		/* enable port A output */
#define	PIOC_OCB		0x02		/* enable port B output */
#define	PIOC_OCC		0x03		/* enable port C output */
#define	PIOC_OCD		0x04		/* enable port D output */
#define	PIOC_OCE		0x05		/* enable port E output */
#define	PIOC_OCF		0x06		/* enable port F output */