code:
/*	$OpenBSD: omrasops1.c,v 1.2 2014/01/02 15:30:34 aoyama Exp $	*/

/*
 * Copyright (c) 2005, Miodrag Vallat.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 */
/*
 * Copyright (c) 1996 Jason R. Thorpe.  All rights reserved.
 * Copyright (c) 1991 University of Utah.
 * Copyright (c) 1990, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * the Systems Programming Group of the University of Utah Computer
 * Science Department and Mark Davies of the Department of Computer
 * Science, Victoria University of Wellington, New Zealand.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * from: Utah $Hdr: grf_hy.c 1.2 93/08/13$
 *
 *	@(#)grf_hy.c	8.4 (Berkeley) 1/12/94
 */

/*
 * Graphics routines for OMRON LUNA 1bpp and 4bpp frame buffer.
 * On LUNA's frame buffer, pixels are not byte-addressed.
 *
 * Based on src/sys/arch/hp300/dev/diofb_mono.c
 */

#include <sys/param.h>
#include <sys/systm.h>

#include <dev/wscons/wsconsio.h>
#include <dev/wscons/wsdisplayvar.h>
#include <dev/rasops/rasops.h>
#include <dev/rasops/rasops_masks.h>

#include <luna88k/dev/maskbits.h>
#include <luna88k/dev/omrasops.h>

/* prototypes */
int om1_windowmove(struct rasops_info *, u_int16_t, u_int16_t,
	u_int16_t, u_int16_t, u_int16_t, u_int16_t, int16_t,
	int16_t /* ignored */);
int om4_windowmove(struct rasops_info *, u_int16_t, u_int16_t,
	u_int16_t, u_int16_t, u_int16_t, u_int16_t, int16_t,
	int16_t /* ignored */);

/*
 * Block-move function - 1bpp version
 */
int
om1_windowmove(struct rasops_info *ri, u_int16_t sx, u_int16_t sy,
	u_int16_t dx, u_int16_t dy, u_int16_t cx, u_int16_t cy, int16_t rop,
	int16_t planemask /* ignored */)
{
	int width;		/* add to get to same position in next line */

	u_int32_t *psrcLine, *pdstLine;
				/* pointers to line with current src and dst */
	u_int32_t *psrc;	/* pointer to current src longword */
	u_int32_t *pdst;	/* pointer to current dst longword */

				/* following used for looping through a line */
	u_int32_t startmask, endmask;  /* masks for writing ends of dst */
	int nlMiddle;		/* whole longwords in dst */
	int nl;			/* temp copy of nlMiddle */
	int xoffSrc;		/* offset (>= 0, < 32) from which to
				   fetch whole longwords fetched in src */
	int nstart;		/* number of ragged bits at start of dst */
	int nend;		/* number of ragged bits at end of dst */
	int srcStartOver;	/* pulling nstart bits from src
				   overflows into the next word? */

	width = ri->ri_stride / 4;	/* convert to number in longword */

	if (sy < dy) {	/* start at last scanline of rectangle */
		psrcLine = ((u_int32_t *)OMFB_FB_WADDR)
				 + ((sy + cy - 1) * width);
		pdstLine = ((u_int32_t *)OMFB_FB_WADDR)
				 + ((dy + cy - 1) * width);
		width = -width;
	} else {	/* start at first scanline */
		psrcLine = ((u_int32_t *)OMFB_FB_WADDR) + (sy * width);
		pdstLine = ((u_int32_t *)OMFB_FB_WADDR) + (dy * width);
	}

	/* x direction doesn't matter for < 1 longword */
	if (cx <= 32) {
		int srcBit, dstBit;	/* bit offset of src and dst */

		pdstLine += (dx >> 5);
		psrcLine += (sx >> 5);
		psrc = psrcLine;
		pdst = pdstLine;

		srcBit = sx & 0x1f;
		dstBit = dx & 0x1f;

		while (cy--) {
			getandputrop(R(psrc), srcBit, dstBit, cx, W(pdst), rop);
			pdst += width;
			psrc += width;
		}
	} else {
		maskbits(dx, cx, startmask, endmask, nlMiddle);
		if (startmask)
			nstart = 32 - (dx & 0x1f);
		else
			nstart = 0;
		if (endmask)
			nend = (dx + cx) & 0x1f;
		else
			nend = 0;

		xoffSrc = ((sx & 0x1f) + nstart) & 0x1f;
		srcStartOver = ((sx & 0x1f) + nstart) > 31;

		if (sx >= dx) {	/* move left to right */
			pdstLine += (dx >> 5);
			psrcLine += (sx >> 5);

			while (cy--) {
				psrc = psrcLine;
				pdst = pdstLine;

				if (startmask) {
					getandputrop(R(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, W(pdst), rop);
					pdst++;
					if (srcStartOver)
						psrc++;
				}

				/* special case for aligned operations */
				if (xoffSrc == 0) {
					nl = nlMiddle;
					while (nl--) {
						if (rop == RR_CLEAR)
							W(pdst) = 0;
						else
							W(pdst) = R(psrc);
						psrc++;
						pdst++;
					}
				} else {
					nl = nlMiddle + 1;
					while (--nl) {
						if (rop == RR_CLEAR)
							W(pdst) = 0;
						else
							getunalignedword(R(psrc),
							    xoffSrc, *W(pdst));
						pdst++;
						psrc++;
					}
				}

				if (endmask) {
					getandputrop(R(psrc), xoffSrc, 0, nend,
					    W(pdst), rop);
				}

				pdstLine += width;
				psrcLine += width;
			}
		} else {	/* move right to left */
			pdstLine += ((dx + cx) >> 5);
			psrcLine += ((sx + cx) >> 5);
			/*
			 * If fetch of last partial bits from source crosses
			 * a longword boundary, start at the previous longword
			 */
			if (xoffSrc + nend >= 32)
				--psrcLine;

			while (cy--) {
				psrc = psrcLine;
				pdst = pdstLine;

				if (endmask) {
					getandputrop(R(psrc), xoffSrc, 0, nend,
					    W(pdst), rop);
				}

				nl = nlMiddle + 1;
				while (--nl) {
					--psrc;
					--pdst;
					if (rop == RR_CLEAR)
						W(pdst) = 0;
					else
						getunalignedword(R(psrc), xoffSrc,
						    *W(pdst));
				}

				if (startmask) {
					if (srcStartOver)
						--psrc;
					--pdst;
					getandputrop(R(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, W(pdst), rop);
				}

				pdstLine += width;
				psrcLine += width;
			}
		}
	}

	return (0);
}

/*
 * Block-move function - 4bpp version
 */
int
om4_windowmove(struct rasops_info *ri, u_int16_t sx, u_int16_t sy,
	u_int16_t dx, u_int16_t dy, u_int16_t cx, u_int16_t cy, int16_t rop,
	int16_t planemask /* ignored */)
{
	int width;		/* add to get to same position in next line */

	u_int32_t *psrcLine, *pdstLine;
				/* pointers to line with current src and dst */
	u_int32_t *psrc;	/* pointer to current src longword */
	u_int32_t *pdst;	/* pointer to current dst longword */

				/* following used for looping through a line */
	u_int32_t startmask, endmask;  /* masks for writing ends of dst */
	int nlMiddle;		/* whole longwords in dst */
	int nl;			/* temp copy of nlMiddle */
	int xoffSrc;		/* offset (>= 0, < 32) from which to
				   fetch whole longwords fetched in src */
	int nstart;		/* number of ragged bits at start of dst */
	int nend;		/* number of ragged bits at end of dst */
	int srcStartOver;	/* pulling nstart bits from src
				   overflows into the next word? */

	width = ri->ri_stride / 4;	/* convert to number in longword */

	if (sy < dy) {	/* start at last scanline of rectangle */
		psrcLine = ((u_int32_t *)OMFB_FB_WADDR)
				 + ((sy + cy - 1) * width);
		pdstLine = ((u_int32_t *)OMFB_FB_WADDR)
				 + ((dy + cy - 1) * width);
		width = -width;
	} else {	/* start at first scanline */
		psrcLine = ((u_int32_t *)OMFB_FB_WADDR) + (sy * width);
		pdstLine = ((u_int32_t *)OMFB_FB_WADDR) + (dy * width);
	}

	/* x direction doesn't matter for < 1 longword */
	if (cx <= 32) {
		int srcBit, dstBit;	/* bit offset of src and dst */

		pdstLine += (dx >> 5);
		psrcLine += (sx >> 5);
		psrc = psrcLine;
		pdst = pdstLine;

		srcBit = sx & 0x1f;
		dstBit = dx & 0x1f;

		while (cy--) {
			getandputrop(P0(psrc), srcBit, dstBit, cx, P0(pdst), rop);
			getandputrop(P1(psrc), srcBit, dstBit, cx, P1(pdst), rop);
			getandputrop(P2(psrc), srcBit, dstBit, cx, P2(pdst), rop);
			getandputrop(P3(psrc), srcBit, dstBit, cx, P3(pdst), rop);
			pdst += width;
			psrc += width;
		}
	} else {
		maskbits(dx, cx, startmask, endmask, nlMiddle);
		if (startmask)
			nstart = 32 - (dx & 0x1f);
		else
			nstart = 0;
		if (endmask)
			nend = (dx + cx) & 0x1f;
		else
			nend = 0;

		xoffSrc = ((sx & 0x1f) + nstart) & 0x1f;
		srcStartOver = ((sx & 0x1f) + nstart) > 31;

		if (sx >= dx) {	/* move left to right */
			pdstLine += (dx >> 5);
			psrcLine += (sx >> 5);

			while (cy--) {
				psrc = psrcLine;
				pdst = pdstLine;

				if (startmask) {
					getandputrop(P0(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, P0(pdst), rop);
					getandputrop(P1(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, P1(pdst), rop);
					getandputrop(P2(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, P2(pdst), rop);
					getandputrop(P3(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, P3(pdst), rop);
					pdst++;
					if (srcStartOver)
						psrc++;
				}

				/* special case for aligned operations */
				if (xoffSrc == 0) {
					nl = nlMiddle;
					while (nl--) {
						if (rop == RR_CLEAR) {
							*P0(pdst) = 0;
							*P1(pdst) = 0;
							*P2(pdst) = 0;
							*P3(pdst) = 0;
						} else {
							*P0(pdst) = *P0(psrc);
							*P1(pdst) = *P1(psrc);
							*P2(pdst) = *P2(psrc);
							*P3(pdst) = *P3(psrc);
						}
						psrc++;
						pdst++;
					}
				} else {
					nl = nlMiddle + 1;
					while (--nl) {
						if (rop == RR_CLEAR) {
							*P0(pdst) = 0;
							*P1(pdst) = 0;
							*P2(pdst) = 0;
							*P3(pdst) = 0;
						} else {
							getunalignedword(P0(psrc),
							    xoffSrc, *P0(pdst));
							getunalignedword(P1(psrc),
							    xoffSrc, *P1(pdst));
							getunalignedword(P2(psrc),
							    xoffSrc, *P2(pdst));
							getunalignedword(P3(psrc),
							    xoffSrc, *P3(pdst));
						}
						pdst++;
						psrc++;
					}
				}

				if (endmask) {
					getandputrop(P0(psrc), xoffSrc, 0, nend,
					    P0(pdst), rop);
					getandputrop(P1(psrc), xoffSrc, 0, nend,
					    P1(pdst), rop);
					getandputrop(P2(psrc), xoffSrc, 0, nend,
					    P2(pdst), rop);
					getandputrop(P3(psrc), xoffSrc, 0, nend,
					    P3(pdst), rop);
				}

				pdstLine += width;
				psrcLine += width;
			}
		} else {	/* move right to left */
			pdstLine += ((dx + cx) >> 5);
			psrcLine += ((sx + cx) >> 5);
			/*
			 * If fetch of last partial bits from source crosses
			 * a longword boundary, start at the previous longword
			 */
			if (xoffSrc + nend >= 32)
				--psrcLine;

			while (cy--) {
				psrc = psrcLine;
				pdst = pdstLine;

				if (endmask) {
					getandputrop(P0(psrc), xoffSrc, 0, nend,
					    P0(pdst), rop);
					getandputrop(P1(psrc), xoffSrc, 0, nend,
					    P1(pdst), rop);
					getandputrop(P2(psrc), xoffSrc, 0, nend,
					    P2(pdst), rop);
					getandputrop(P3(psrc), xoffSrc, 0, nend,
					    P3(pdst), rop);
				}

				nl = nlMiddle + 1;
				while (--nl) {
					--psrc;
					--pdst;
					if (rop == RR_CLEAR) {
						*P0(pdst) = 0;
						*P1(pdst) = 0;
						*P2(pdst) = 0;
						*P3(pdst) = 0;
					} else {
						getunalignedword(P0(psrc),
						    xoffSrc, *P0(pdst));
						getunalignedword(P1(psrc),
						    xoffSrc, *P1(pdst));
						getunalignedword(P2(psrc),
						    xoffSrc, *P2(pdst));
						getunalignedword(P3(psrc),
						    xoffSrc, *P3(pdst));
					}
				}

				if (startmask) {
					if (srcStartOver)
						--psrc;
					--pdst;
					getandputrop(P0(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, P0(pdst), rop);
					getandputrop(P1(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, P1(pdst), rop);
					getandputrop(P2(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, P2(pdst), rop);
					getandputrop(P3(psrc), (sx & 0x1f),
					    (dx & 0x1f), nstart, P3(pdst), rop);
				}

				pdstLine += width;
				psrcLine += width;
			}
		}
	}

	return (0);
}


code:
/* $OpenBSD: sio.c,v 1.5 2014/06/07 11:55:35 aoyama Exp $ */
/* $NetBSD: sio.c,v 1.1 2000/01/05 08:48:55 nisimura Exp $ */

/*-
 * Copyright (c) 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Tohru Nishimura.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/* from NetBSD/luna68k dev/sio.c */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>

#include <machine/cpu.h>
#include <machine/autoconf.h>

#include <luna88k/luna88k/isr.h>
#include <luna88k/dev/siovar.h>

int  sio_match(struct device *, void *, void *);
void sio_attach(struct device *, struct device *, void *);
int  sio_print(void *, const char *);

const struct cfattach sio_ca = {
	sizeof(struct sio_softc), sio_match, sio_attach
};

struct cfdriver sio_cd = {
	NULL, "sio", DV_DULL, 0
};

void nullintr(int);
int xsiointr(void *);

int
sio_match(struct device *parent, void *cf, void *aux)
{
	struct mainbus_attach_args *ma = aux;

	if (strcmp(ma->ma_name, sio_cd.cd_name))
		return 0;
	if (badaddr((vaddr_t)ma->ma_addr, 4))
		return 0;
	return 1;
}

void
sio_attach(struct device *parent, struct device *self, void *aux)
{
	struct sio_softc *sc = (void *)self;
	struct mainbus_attach_args *ma = aux;
	struct sio_attach_args sio_args;
	int channel;
	extern int sysconsole; /* console: 0 for ttya, 1 for desktop */

	printf(": 7201a\n");

	sc->scp_ctl = (caddr_t)ma->ma_addr;
	sc->scp_intr[0] = sc->scp_intr[1] = nullintr;
	for (channel = 0; channel < 2; channel++) {
		sio_args.channel = channel;
		sio_args.hwflags = (channel == sysconsole);
		config_found(self, (void *)&sio_args, sio_print);
	}

	isrlink_autovec(xsiointr, sc, ma->ma_ilvl, ISRPRI_TTYNOBUF,
	    self->dv_xname);
}

int
sio_print(void *aux, const char *name)
{
	struct sio_attach_args *args = aux;

	if (name != NULL)
		printf("%s: ", name);

	if (args->channel != -1)
		printf(" channel %d", args->channel);

	return UNCONF;
}

int
xsiointr(void *arg)
{
	struct sio_softc *sc = arg;

	(*sc->scp_intr[0])(0); 	/* 0: ttya system serial port */
	(*sc->scp_intr[1])(1);	/* 1: keyboard and mouse */
	return 1;
}

void nullintr(int v)
{
}

license: unknown


code:
/* $OpenBSD: sioreg.h,v 1.1 2004/04/21 15:23:55 aoyama Exp $ */
/* $NetBSD: sioreg.h,v 1.1 2000/01/05 08:48:55 nisimura Exp $ */
/*
 * Copyright (c) 1992 OMRON Corporation.
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * OMRON Corporation.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Berkeley and its contributors.
 * 4. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)sioreg.h	8.1 (Berkeley) 6/10/93
 */

#define WR0		0x00
#define WR1		0x01
#define WR2		0x02
#define WR3		0x03
#define WR4		0x04
#define WR5		0x05
#define WR6		0x06
#define WR7		0x07

#define	WR2A		WR2
#define	WR2B		(WR2|0x10)

#define RR0		0x08
#define RR1		0x09
#define RR2		0x0A
#define RR3		0x0B
#define RR4		0x0C

#define RR2A		RR2
#define RR2B		(RR2|0x10)

#define WR0_NOP		0x00	/* No Operation */
#define WR0_SNDABRT	0x08	/* Send Abort (HDLC) */
#define WR0_RSTINT	0x10	/* Reset External/Status Interrupt */
#define WR0_CHANRST	0x18	/* Channel Reset */
#define WR0_INTNXT	0x20	/* Enable Interrupt on Next Receive Character */
#define WR0_RSTPEND	0x28	/* Reset Transmitter Interrput/DMA Pending */
#define WR0_ERRRST	0x30	/* Error Reset */
#define WR0_ENDINTR	0x38	/* End of Interrupt */

#define WR1_ESENBL	0x01	/* External/Status Interrupt Enable */
#define WR1_TXENBL	0x02	/* Tx Interrupt/DMA Enable */
#define WR1_STATVEC	0x04	/* Status Affects Vector (Only Chan-B) */
#define WR1_RXDSEBL	0x00	/* Rx Interrupt/DMA Disable */
#define WR1_RXFIRST	0x08	/* Interrupt only First Character Received */
#define WR1_RXALLS	0x10	/* Interrupt Every Characters Received (with Special Char.) */
#define WR1_RXALL	0x18	/* Interrupt Every Characters Received (without Special Char.) */

#define WR2_INTR_0	0x00	/* Interrupt Priority: RxA TxA RxB TxB E/SA E/SA */
#define WR2_INTR_1	0x04	/* Interrupt Priority: RxA RxB TxA TxB E/SA E/SA */
#define WR2_VEC85_1	0x00	/* 8085 Vectored Mode - 1 */
#define WR2_VEC85_2	0x08	/* 8085 Vectored Mode - 2 */
#define WR2_VEC86	0x10	/* 8086 Vectored */
#define WR2_VEC85_3	0x18	/* 8085 Vectored Mode - 3 */

#define WR3_RXENBL	0x01	/* Rx Enable */
#define WR3_RXCRC	0x08	/* Rx CRC Check */
#define WR3_AUTOEBL	0x20	/* Auto Enable (flow control for MODEM) */
#define WR3_RX5BIT	0x00	/* Rx Bits/Character: 5 Bits */
#define WR3_RX7BIT	0x40	/* Rx Bits/Character: 7 Bits */
#define WR3_RX6BIT	0x80	/* Rx Bits/Character: 6 Bits */
#define WR3_RX8BIT	0xc0	/* Rx Bits/Character: 8 Bits */

#define WR4_NPARITY	0x00	/* No Parity */
#define WR4_PARENAB	0x01	/* Parity Enable */
#define WR4_OPARITY	0x01	/* Parity Odd */
#define WR4_EPARITY	0x02	/* Parity Even */
#define WR4_STOP1	0x04	/* Stop  Bits (1bit) */
#define WR4_STOP15	0x08	/* Stop  Bits (1.5bit) */
#define WR4_STOP2	0x0c	/* Stop  Bits (2bit) */
#define WR4_BAUD96	0x40	/* Clock Rate (9600 BAUD) */
#define WR4_BAUD48	0x80	/* Clock Rate (4800 BAUD) */
#define WR4_BAUD24	0xc0	/* Clock Rate (2400 BAUD) */

#define WR5_TXCRC	0x01	/* Tx CRC Check */
#define WR5_RTS		0x02	/* Request To Send     [RTS] */
#define WR5_TXENBL	0x08	/* Transmit Enable */
#define WR5_BREAK	0x10	/* Send Break          [BRK] */
#define WR5_TX5BIT	0x00	/* Tx Bits/Character: 5 Bits */
#define WR5_TX7BIT	0x20	/* Tx Bits/Character: 7 Bits */
#define WR5_TX6BIT	0x40	/* Tx Bits/Character: 6 Bits */
#define WR5_TX8BIT	0x60	/* Tx Bits/Character: 8 Bits */
#define WR5_DTR		0x80	/* Data Terminal Ready [DTR] */

#define RR0_RXAVAIL	0x01	/* Rx Character Available */
#define RR0_INTRPEND	0x02	/* Interrupt Pending (Channel-A Only) */
#define RR0_TXEMPTY	0x04	/* Tx Buffer Empty */
#define RR0_DCD		0x08	/* Data Carrier Detect [DCD] */
#define RR0_SYNC	0x10	/* Synchronization */
#define RR0_CTS		0x20	/* Clear To Send       [CTS] */
#define RR0_BREAK	0x80	/* Break Detected      [BRK] */

#define RR1_PARITY	0x10	/* Parity Error */
#define RR1_OVERRUN	0x20	/* Data Over Run */
#define RR1_FRAMING	0x40	/* Framing Error */

#define RR_RXRDY	0x0100	/* Rx Character Available */
#define RR_INTRPEND	0x0200	/* Interrupt Pending (Channel-A Only) */
#define RR_TXRDY	0x0400	/* Tx Buffer Empty */
#define RR_DCD		0x0800	/* Data Carrier Detect [DCD] */
#define RR_SYNC		0x1000	/* Synchronization */
#define RR_CTS		0x2000	/* Clear To Send       [CTS] */
#define RR_BREAK	0x8000	/* Break Detected */
#define RR_PARITY	0x0010	/* Parity Error */
#define RR_OVERRUN	0x0020	/* Data Over Run */
#define RR_FRAMING	0x0040	/* Framing Error */


code:
/* $OpenBSD: siotty.c,v 1.16 2014/06/07 11:55:35 aoyama Exp $ */
/* $NetBSD: siotty.c,v 1.9 2002/03/17 19:40:43 atatat Exp $ */

/*-
 * Copyright (c) 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Tohru Nishimura.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/conf.h>
#include <sys/ioctl.h>
#include <sys/proc.h>
#include <sys/tty.h>
#include <sys/uio.h>
#include <sys/fcntl.h>
#include <dev/cons.h>

#include <machine/cpu.h>

#include <luna88k/dev/sioreg.h>
#include <luna88k/dev/siovar.h>

#define	TIOCM_BREAK 01000 /* non standard use */

static const u_int8_t ch0_regs[6] = {
	WR0_RSTINT,				/* reset E/S interrupt */
	WR1_RXALLS | WR1_TXENBL,	 	/* Rx per char, Tx */
	0,					/* */
	WR3_RX8BIT | WR3_RXENBL,		/* Rx */
	WR4_BAUD96 | WR4_STOP1,			/* Tx/Rx */
	WR5_TX8BIT | WR5_TXENBL | WR5_DTR | WR5_RTS, /* Tx */
};

static const struct speedtab siospeedtab[] = {
	{ 2400,	WR4_BAUD24, },
	{ 4800,	WR4_BAUD48, },
	{ 9600,	WR4_BAUD96, },
	{ -1,	0, },
};

struct siotty_softc {
	struct device	sc_dev;
	struct tty	*sc_tty;
	struct sioreg	*sc_ctl;
	u_int 		sc_flags;
	u_int8_t	sc_wr[6];
};

cdev_decl(sio);
void siostart(struct tty *);
int  sioparam(struct tty *, struct termios *);
void siottyintr(int);
int  siomctl(struct siotty_softc *, int, int);

int  siotty_match(struct device *, void *, void *);
void siotty_attach(struct device *, struct device *, void *);

const struct cfattach siotty_ca = {
	sizeof(struct siotty_softc), siotty_match, siotty_attach
};

struct cfdriver siotty_cd = {
        NULL, "siotty", DV_TTY
};

int
siotty_match(struct device *parent, void *cf, void *aux)
{
	struct sio_attach_args *args = aux;

	if (args->channel != 0) /* XXX allow tty on Ch.B XXX */
		return 0;
	return 1;
}

void
siotty_attach(struct device *parent, struct device *self, void *aux)
{
	struct sio_softc *scp = (void *)parent;
	struct siotty_softc *sc = (void *)self;
	struct sio_attach_args *args = aux;

	sc->sc_ctl = (struct sioreg *)scp->scp_ctl + args->channel;
	bcopy(ch0_regs, sc->sc_wr, sizeof(ch0_regs));
	scp->scp_intr[args->channel] = siottyintr;

	if (args->hwflags == 1) {
		printf(" (console)");
		sc->sc_flags = TIOCFLAG_SOFTCAR;
	}
	else {
		setsioreg(sc->sc_ctl, WR0, WR0_CHANRST);
		setsioreg(sc->sc_ctl, WR2A, WR2_VEC86 | WR2_INTR_1);
		setsioreg(sc->sc_ctl, WR2B, 0);
		setsioreg(sc->sc_ctl, WR0, sc->sc_wr[WR0]);
		setsioreg(sc->sc_ctl, WR4, sc->sc_wr[WR4]);
		setsioreg(sc->sc_ctl, WR3, sc->sc_wr[WR3]);
		setsioreg(sc->sc_ctl, WR5, sc->sc_wr[WR5]);
		setsioreg(sc->sc_ctl, WR0, sc->sc_wr[WR0]);
	}
	setsioreg(sc->sc_ctl, WR1, sc->sc_wr[WR1]); /* now interrupt driven */

	printf("\n");
}

/*--------------------  low level routine --------------------*/

void
siottyintr(int chan)
{
	struct siotty_softc *sc;
	struct sioreg *sio;
	struct tty *tp;
	unsigned int code;
	int rr;

	if (chan >= siotty_cd.cd_ndevs)
		return;
	sc = siotty_cd.cd_devs[chan];
	tp = sc->sc_tty;
	sio = sc->sc_ctl;
	rr = getsiocsr(sio);
	if (rr & RR_RXRDY) {
		do {
			code = sio->sio_data;
			if (rr & (RR_FRAMING | RR_OVERRUN | RR_PARITY)) {
				sio->sio_cmd = WR0_ERRRST;
				if (sio->sio_stat & RR_FRAMING)
					code |= TTY_FE;
				else if (sio->sio_stat & RR_PARITY)
					code |= TTY_PE;
			}
			if (tp == NULL || (tp->t_state & TS_ISOPEN) == 0)
				continue;
#if 0 && defined(DDB) /* ?!?! fails to resume ?!?! */
			if ((rr & RR_BREAK) && tp->t_dev == cn_tab->cn_dev) {
				if (db_console)
					Debugger();
				return;
			}
#endif
			(*linesw[tp->t_line].l_rint)(code, tp);
		} while ((rr = getsiocsr(sio)) & RR_RXRDY);
	}
	if (rr & RR_TXRDY) {
		sio->sio_cmd = WR0_RSTPEND;
		if (tp != NULL) {
			tp->t_state &= ~(TS_BUSY|TS_FLUSH);
			(*linesw[tp->t_line].l_start)(tp);
		}
	}
}

void
siostart(struct tty *tp)
{
	struct siotty_softc *sc = siotty_cd.cd_devs[minor(tp->t_dev)];
	int s, c;

	s = spltty();
	if (tp->t_state & (TS_BUSY|TS_TIMEOUT|TS_TTSTOP))
		goto out;
	ttwakeupwr(tp);
	if (tp->t_outq.c_cc == 0)
		goto out;

	tp->t_state |= TS_BUSY;
	while (getsiocsr(sc->sc_ctl) & RR_TXRDY) {
		if ((c = getc(&tp->t_outq)) == -1)
			break;
		sc->sc_ctl->sio_data = c;
	}
out:
	splx(s);
}

int
siostop(struct tty *tp, int flag)
{
	int s;

        s = spltty();
        if (TS_BUSY == (tp->t_state & (TS_BUSY|TS_TTSTOP))) {
                /*
                 * Device is transmitting; must stop it.
                 */
		tp->t_state |= TS_FLUSH;
        }
        splx(s);
	return (0);
}

int
sioparam(struct tty *tp, struct termios *t)
{
	struct siotty_softc *sc = siotty_cd.cd_devs[minor(tp->t_dev)];
	int wr4, s;

	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
		return EINVAL;
	wr4 = ttspeedtab(t->c_ospeed, siospeedtab);
	if (wr4 < 0)
		return EINVAL;

	if (sc->sc_flags & TIOCFLAG_SOFTCAR) {
		t->c_cflag |= CLOCAL;
		t->c_cflag &= ~HUPCL;
	}
	if (sc->sc_flags & TIOCFLAG_CLOCAL)
		t->c_cflag |= CLOCAL;

	/*
	 * If there were no changes, don't do anything.  This avoids dropping
	 * input and improves performance when all we did was frob things like
	 * VMIN and VTIME.
	 */
	if (tp->t_ospeed == t->c_ospeed && tp->t_cflag == t->c_cflag)
		return 0;

	tp->t_ispeed = t->c_ispeed;
	tp->t_ospeed = t->c_ospeed;
	tp->t_cflag = t->c_cflag;

	sc->sc_wr[WR3] &= 0x3f;
	sc->sc_wr[WR5] &= 0x9f;
	switch (tp->t_cflag & CSIZE) {
	case CS7:
		sc->sc_wr[WR3] |= WR3_RX7BIT; sc->sc_wr[WR5] |= WR5_TX7BIT;
		break;
	case CS8:
		sc->sc_wr[WR3] |= WR3_RX8BIT; sc->sc_wr[WR5] |= WR5_TX8BIT;
		break;
	}
	if (tp->t_cflag & PARENB) {
		wr4 |= WR4_PARENAB;
		if ((tp->t_cflag & PARODD) == 0)
			wr4 |= WR4_EPARITY;
	}
	wr4 |= (tp->t_cflag & CSTOPB) ? WR4_STOP2 : WR4_STOP1;
	sc->sc_wr[WR4] = wr4;

	s = spltty();
	setsioreg(sc->sc_ctl, WR4, sc->sc_wr[WR4]);
	setsioreg(sc->sc_ctl, WR3, sc->sc_wr[WR3]);
	setsioreg(sc->sc_ctl, WR5, sc->sc_wr[WR5]);
	splx(s);

	return 0;
}

int
siomctl(struct siotty_softc *sc, int control, int op)
{
	int val, s, wr5, rr;

	val = 0;
	if (control & TIOCM_BREAK)
		val |= WR5_BREAK;
	if (control & TIOCM_DTR)
		val |= WR5_DTR;
	if (control & TIOCM_RTS)
		val |= WR5_RTS;
	s = spltty();
	wr5 = sc->sc_wr[WR5];
	switch (op) {
	case DMSET:
		wr5 &= ~(WR5_BREAK|WR5_DTR|WR5_RTS);
		/* FALLTHROUGH */
	case DMBIS:
		wr5 |= val;
		break;
	case DMBIC:
		wr5 &= ~val;
		break;
	case DMGET:
		val = 0;
		rr = getsiocsr(sc->sc_ctl);
		if (wr5 & WR5_DTR)
			val |= TIOCM_DTR;
		if (wr5 & WR5_RTS)
			val |= TIOCM_RTS;
		if (rr & RR_CTS)
			val |= TIOCM_CTS;
		if (rr & RR_DCD)
			val |= TIOCM_CD;
		goto done;
	}
	sc->sc_wr[WR5] = wr5;
	setsioreg(sc->sc_ctl, WR5, wr5);
	val = 0;
done:
	splx(s);
	return val;
}

/*--------------------  cdevsw[] interface --------------------*/

int
sioopen(dev_t dev, int flag, int mode, struct proc *p)
{
	struct siotty_softc *sc;
	struct tty *tp;
	int error;

	if ((sc = siotty_cd.cd_devs[minor(dev)]) == NULL)
		return ENXIO;
	if ((tp = sc->sc_tty) == NULL) {
		tp = sc->sc_tty = ttymalloc(0);
	}
	else if ((tp->t_state & TS_ISOPEN) && (tp->t_state & TS_XCLUDE)
	    && suser(p, 0) != 0)
		return EBUSY;

	tp->t_oproc = siostart;
	tp->t_param = sioparam;
	tp->t_hwiflow = NULL /* XXX siohwiflow XXX */;
	tp->t_dev = dev;
	if ((tp->t_state & TS_ISOPEN) == 0) {
		struct termios t;

		t.c_ispeed = t.c_ospeed = TTYDEF_SPEED;
		t.c_cflag = TTYDEF_CFLAG;
		tp->t_ospeed = 0; /* force register update */
		(void)sioparam(tp, &t);
		tp->t_iflag = TTYDEF_IFLAG;
		tp->t_oflag = TTYDEF_OFLAG;
		tp->t_lflag = TTYDEF_LFLAG;
		ttychars(tp);
		ttsetwater(tp);
		/* raise RTS and DTR here; but, DTR lead is not wired */
		/* then check DCD condition; but, DCD lead is not wired */
		tp->t_state |= TS_CARR_ON; /* assume detected all the time */
#if 0
		if ((sc->sc_flags & TIOCFLAG_SOFTCAR)
		    || (tp->t_cflag & MDMBUF)
		    || (getsiocsr(sc->sc_ctl) & RR_DCD))
			tp->t_state |= TS_CARR_ON;
		else
			tp->t_state &= ~TS_CARR_ON;
#endif
	}

	error = ttyopen(dev, tp, p);
	if (error > 0)
		return error;
	return (*linesw[tp->t_line].l_open)(dev, tp, p);
}

int
sioclose(dev_t dev, int flag, int mode, struct proc *p)
{
	struct siotty_softc *sc = siotty_cd.cd_devs[minor(dev)];
	struct tty *tp = sc->sc_tty;
	int s;

	(*linesw[tp->t_line].l_close)(tp, flag, p);

	s = spltty();
	siomctl(sc, TIOCM_BREAK, DMBIC);
#if 0 /* because unable to feed DTR signal */
	if ((tp->t_cflag & HUPCL)
	    || tp->t_wopen || (tp->t_state & TS_ISOPEN) == 0) {
		siomctl(sc, TIOCM_DTR, DMBIC);
		/* Yield CPU time to others for 1 second, then ... */
		siomctl(sc, TIOCM_DTR, DMBIS);
	}
#endif
	splx(s);
	return ttyclose(tp);
}

int
sioread(dev_t dev, struct uio *uio, int flag)
{
	struct siotty_softc *sc = siotty_cd.cd_devs[minor(dev)];
	struct tty *tp = sc->sc_tty;

	return (*linesw[tp->t_line].l_read)(tp, uio, flag);
}

int
siowrite(dev_t dev, struct uio *uio, int flag)
{
	struct siotty_softc *sc = siotty_cd.cd_devs[minor(dev)];
	struct tty *tp = sc->sc_tty;

	return (*linesw[tp->t_line].l_write)(tp, uio, flag);
}

#if 0
int
sioselect(dev, events, p)
	dev_t dev;
	int events;
	struct proc *p;
{
	struct siotty_softc *sc = siotty_cd.cd_devs[minor(dev)];
	struct tty *tp = sc->sc_tty;

	return ((*linesw[tp->t_line].l_select)(tp, events, p));

}
#endif

int
sioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
{
	struct siotty_softc *sc = siotty_cd.cd_devs[minor(dev)];
	struct tty *tp = sc->sc_tty;
	int error;

	error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
	if (error >= 0)
		return error;

	error = ttioctl(tp, cmd, data, flag, p);
	if (error >= 0)
		return error;

	/* the last resort for TIOC ioctl tranversing */
	switch (cmd) {
	case TIOCSBRK: /* Set the hardware into BREAK condition */
		siomctl(sc, TIOCM_BREAK, DMBIS);
		break;
	case TIOCCBRK: /* Clear the hardware BREAK condition */
		siomctl(sc, TIOCM_BREAK, DMBIC);
		break;
	case TIOCSDTR: /* Assert DTR signal */
		siomctl(sc, TIOCM_DTR|TIOCM_RTS, DMBIS);
		break;
	case TIOCCDTR: /* Clear DTR signal */
		siomctl(sc, TIOCM_DTR|TIOCM_RTS, DMBIC);
		break;
	case TIOCMSET: /* Set modem state replacing current one */
		siomctl(sc, *(int *)data, DMSET);
		break;
	case TIOCMGET: /* Return current modem state */
		*(int *)data = siomctl(sc, 0, DMGET);
		break;
	case TIOCMBIS: /* Set individual bits of modem state */
		siomctl(sc, *(int *)data, DMBIS);
		break;
	case TIOCMBIC: /* Clear individual bits of modem state */
		siomctl(sc, *(int *)data, DMBIC);
		break;
	case TIOCSFLAGS: /* Instruct how serial port behaves */
		error = suser(p, 0);
		if (error != 0)
			return EPERM;
		sc->sc_flags = *(int *)data;
		break;
	case TIOCGFLAGS: /* Return current serial port state */
		*(int *)data = sc->sc_flags;
		break;
	default:
		return ENOTTY;
	}
	return 0;
}

/* ARSGUSED */
struct tty *
siotty(dev_t dev)
{
	struct siotty_softc *sc = siotty_cd.cd_devs[minor(dev)];

	return sc->sc_tty;
}

/*--------------------  miscellaneous routines --------------------*/

/* EXPORT */ void
setsioreg(struct sioreg *sio, int regno, int val)
{
	if (regno != 0)
		sio->sio_cmd = regno;	/* DELAY(); */
	sio->sio_cmd = val;		/* DELAY(); */
}

/* EXPORT */ int
getsiocsr(struct sioreg *sio)
{
	int val;

	val = sio->sio_stat << 8;	/* DELAY(); */
	sio->sio_cmd = 1;		/* DELAY(); */
	val |= sio->sio_stat;		/* DELAY(); */
	return val;
}

/*---------------------  console interface ----------------------*/

void syscnattach(int);
int  syscngetc(dev_t);
void syscnputc(dev_t, int);

struct consdev syscons = {
	NULL,
	NULL,
	syscngetc,
	syscnputc,
	nullcnpollc,
	NULL,
	NODEV,
	CN_HIGHPRI,
};

/* EXPORT */ void
syscnattach(int channel)
{
/*
 * Channel A is immediately initialized with 9600N1 right after cold
 * boot/reset/poweron.  ROM monitor emits one line message on CH.A.
 */
	struct sioreg *sio;
	sio = (struct sioreg *)0x51000000 + channel;

	syscons.cn_dev = makedev(12, channel);
	cn_tab = &syscons;

#if 0
	setsioreg(sio, WR0, WR0_CHANRST);
	setsioreg(sio, WR2A, WR2_VEC86 | WR2_INTR_1);
	setsioreg(sio, WR2B, 0);
	setsioreg(sio, WR0, ch0_regs[WR0]);
	setsioreg(sio, WR4, ch0_regs[WR4]);
	setsioreg(sio, WR3, ch0_regs[WR3]);
	setsioreg(sio, WR5, ch0_regs[WR5]);
	setsioreg(sio, WR0, ch0_regs[WR0]);
#endif
}

/* EXPORT */ int
syscngetc(dev_t dev)
{
	struct sioreg *sio;
	int s, c;

	sio = (struct sioreg *)0x51000000 + ((int)dev & 0x1);
	s = splhigh();
	while ((getsiocsr(sio) & RR_RXRDY) == 0)
		;
	c = sio->sio_data;
	splx(s);

	return c;
}

/* EXPORT */ void
syscnputc(dev_t dev, int c)
{
	struct sioreg *sio;
	int s;

	sio = (struct sioreg *)0x51000000 + ((int)dev & 0x1);
	s = splhigh();
	while ((getsiocsr(sio) & RR_TXRDY) == 0)
		;
	sio->sio_cmd = WR0_RSTPEND;
	sio->sio_data = c;
	splx(s);
}


code:
/* $OpenBSD: siovar.h,v 1.2 2008/06/26 05:42:11 ray Exp $ */
/* $NetBSD: siovar.h,v 1.1 2000/01/05 08:48:55 nisimura Exp $ */

/*-
 * Copyright (c) 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Tohru Nishimura.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

struct sio_softc {
	struct device scp_dev;
	caddr_t scp_ctl;
	void (*scp_intr[2])(int);
};

struct sio_attach_args {
	int channel;
	int hwflags;
};

struct sioreg {
	volatile u_int8_t sio_data;
	volatile unsigned : 24;
	volatile u_int8_t sio_cmd;
	volatile unsigned : 24;
#define sio_stat sio_cmd
};

int  getsiocsr(struct sioreg *);
void setsioreg(struct sioreg *, int, int);


code:
/* $OpenBSD: spc.c,v 1.8 2015/02/14 14:54:13 aoyama Exp $ */
/* $NetBSD: spc.c,v 1.4 2003/07/05 19:00:17 tsutsui Exp $ */

/*-
 * Copyright (c) 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Tohru Nishimura.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/buf.h>

#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/autoconf.h>

#include <scsi/scsi_all.h>
#include <scsi/scsi_message.h>
#include <scsi/scsiconf.h>

#include <luna88k/dev/mb89352reg.h>
#include <luna88k/dev/mb89352var.h>

#include <luna88k/luna88k/isr.h>

int  spc_mainbus_match(struct device *, void *, void *);
void spc_mainbus_attach(struct device *, struct device *, void *);

struct cfattach spc_ca = {
	sizeof(struct spc_softc), spc_mainbus_match, spc_mainbus_attach
};

struct cfdriver spc_cd = {
	NULL, "spc", DV_DULL
};

struct scsi_adapter spc_switch = {
	spc_scsi_cmd,
	scsi_minphys,		/* no max at this level; handled by DMA code */
	NULL,
	NULL,
};

/* bus space tag for spc */
struct luna88k_bus_space_tag spc_bst = {
	4,	/* when reading/writing 1 byte, the stride is 4. */
	0,	/* not used */
	0,	/* not used */
	0,	/* not used */
	0,	/* no offset */
};

int
spc_mainbus_match(struct device *parent, void *cf, void *aux)
{
	struct mainbus_attach_args *ma = aux;

	if (strcmp(ma->ma_name, spc_cd.cd_name))
		return 0;
#if 0
	if (badaddr((caddr_t)ma->ma_addr, 4))
		return 0;
	/* Experiments proved 2nd SPC address does NOT make a buserror. */
#endif
	return 1;
}

void
spc_mainbus_attach(struct device *parent, struct device *self, void *aux)
{
	struct spc_softc *sc = (void *)self;
	struct mainbus_attach_args *ma = aux;

	printf ("\n");

	sc->sc_iot = &spc_bst;
	sc->sc_ioh = ma->ma_addr;
	sc->sc_initiator = 7;
	sc->sc_dma_start = NULL;
	sc->sc_dma_done = NULL;

	isrlink_autovec(spc_intr, (void *)sc, ma->ma_ilvl, ISRPRI_BIO,
	    self->dv_xname);

	spc_attach(sc, &spc_switch);
}


code:
/* $OpenBSD: timekeeper.c,v 1.9 2014/06/07 11:55:35 aoyama Exp $ */
/* $NetBSD: timekeeper.c,v 1.1 2000/01/05 08:48:56 nisimura Exp $ */

/*-
 * Copyright (c) 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Tohru Nishimura.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/evcount.h>

#include <machine/autoconf.h>
#include <machine/board.h>	/* machtype value */
#include <machine/cpu.h>

#include <dev/clock_subr.h>

#include <luna88k/luna88k/clockvar.h>
#include <luna88k/dev/timekeeper.h>

#define	MK_YEAR0	1970	/* year offset of MK */
#define	DS_YEAR0	1990	/* year offset of DS */

struct timekeeper_softc {
	struct device sc_dev;
	void *sc_clock, *sc_nvram;
	int sc_nvramsize;
	struct evcount sc_count;
};

/*
 * BCD to decimal and decimal to BCD.
 */
#define FROMBCD(x)      (((x) >> 4) * 10 + ((x) & 0xf))
#define TOBCD(x)        (((x) / 10 * 16) + ((x) % 10))

int  clock_match(struct device *, void *, void *);
void clock_attach(struct device *, struct device *, void *);

struct cfattach clock_ca = {
	sizeof (struct timekeeper_softc), clock_match, clock_attach
};

struct cfdriver clock_cd = {
        NULL, "clock", DV_DULL
};

void mkclock_get(struct device *, time_t, struct clock_ymdhms *);
void mkclock_set(struct device *, struct clock_ymdhms *);
void dsclock_get(struct device *, time_t, struct clock_ymdhms *);
void dsclock_set(struct device *, struct clock_ymdhms *);

const struct clockfns mkclock_clockfns = {
	NULL /* never used */, mkclock_get, mkclock_set,
};

const struct clockfns dsclock_clockfns = {
	NULL /* never used */, dsclock_get, dsclock_set,
};

int
clock_match(struct device *parent, void *match, void *aux)
{
	struct mainbus_attach_args *ma = aux;

	if (strcmp(ma->ma_name, clock_cd.cd_name))
		return 0;
	return 1;
}

extern int machtype; /* in machdep.c */

void
clock_attach(struct device *parent, struct device *self, void *aux)
{
	struct timekeeper_softc *sc = (void *)self;
	struct mainbus_attach_args *ma = aux;
	const struct clockfns *clockwork;

	switch (machtype) {
	default:
	case LUNA_88K:	/* Mostek MK48T02 */
		sc->sc_clock = (void *)(ma->ma_addr + MK_NVRAM_SPACE);
		sc->sc_nvram = (void *)ma->ma_addr;
		sc->sc_nvramsize = MK_NVRAM_SPACE;
		clockwork = &mkclock_clockfns;
		printf(": MK48T02\n");
		break;
	case LUNA_88K2: /* Dallas DS1397 */
		sc->sc_clock = (void *)ma->ma_addr;
		sc->sc_nvram = (void *)(ma->ma_addr + 50);
		sc->sc_nvramsize = 50;
		clockwork = &dsclock_clockfns;
		printf(": DS1397\n");
		break;
	}

	evcount_attach(&sc->sc_count, self->dv_xname, &ma->ma_ilvl);

	clockattach(&sc->sc_dev, clockwork, &sc->sc_count);
}

/*
 * On LUNA-88K, NVRAM contents and Timekeeper registers are mapped on the
 * most significant byte of each 32bit word. (i.e. 4-bytes stride)
 *
 * Get the time of day, based on the clock's value and/or the base value.
 */
void
mkclock_get(struct device *dev, time_t base, struct clock_ymdhms *dt)
{
	struct timekeeper_softc *sc = (void *)dev;
	volatile u_int32_t *chiptime = (void *)sc->sc_clock;
	int s;

	s = splclock();

	/* enable read (stop time) */
	chiptime[MK_CSR] |= (MK_CSR_READ << 24);

	dt->dt_sec  = FROMBCD(chiptime[MK_SEC]   >> 24);
	dt->dt_min  = FROMBCD(chiptime[MK_MIN]   >> 24);
	dt->dt_hour = FROMBCD(chiptime[MK_HOUR]  >> 24);
	dt->dt_wday = FROMBCD(chiptime[MK_DOW]   >> 24);
	dt->dt_day  = FROMBCD(chiptime[MK_DOM]   >> 24);
	dt->dt_mon  = FROMBCD(chiptime[MK_MONTH] >> 24);
	dt->dt_year = FROMBCD(chiptime[MK_YEAR]  >> 24);

	chiptime[MK_CSR] &= (~MK_CSR_READ << 24);	/* time wears on */

	/* UniOS-Mach doesn't set the correct BCD year after Y2K */
	if (dt->dt_year > 100) dt->dt_year -= (MK_YEAR0 % 100);

	dt->dt_year += MK_YEAR0;
	splx(s);
#ifdef TIMEKEEPER_DEBUG
	printf("get %02d/%02d/%02d %02d:%02d:%02d\n",
	    dt->dt_year, dt->dt_mon, dt->dt_day,
	    dt->dt_hour, dt->dt_min, dt->dt_sec);
#endif
}

/*
 * Reset the TODR based on the time value.
 */
void
mkclock_set(struct device *dev, struct clock_ymdhms *dt)
{
	struct timekeeper_softc *sc = (void *)dev;
	volatile u_int32_t *chiptime = (void *)sc->sc_clock;
	volatile u_int32_t *stamp = (void *)(sc->sc_nvram + (4 * 0x10));
	int s;

	s = splclock();
	chiptime[MK_CSR]  |= (MK_CSR_WRITE << 24);	/* enable write */

	chiptime[MK_SEC]   = TOBCD(dt->dt_sec)  << 24;
	chiptime[MK_MIN]   = TOBCD(dt->dt_min)  << 24;
	chiptime[MK_HOUR]  = TOBCD(dt->dt_hour) << 24;
	chiptime[MK_DOW]   = TOBCD(dt->dt_wday) << 24;
	chiptime[MK_DOM]   = TOBCD(dt->dt_day)  << 24;
	chiptime[MK_MONTH] = TOBCD(dt->dt_mon)  << 24;
	/* XXX: We don't consider UniOS-Mach Y2K problem */
	chiptime[MK_YEAR]  = TOBCD(dt->dt_year - MK_YEAR0) << 24;

	chiptime[MK_CSR]  &= (~MK_CSR_WRITE << 24);	/* load them up */
	splx(s);
#ifdef TIMEKEEPER_DEBUG
	printf("set %02d/%02d/%02d %02d:%02d:%02d\n",
	    dt->dt_year, dt->dt_mon, dt->dt_day,
	    dt->dt_hour, dt->dt_min, dt->dt_sec);
#endif

	/* Write a stamp at NVRAM address 0x10-0x13 */
	stamp[0] = 'R' << 24; stamp[1] = 'T' << 24;
	stamp[2] = 'C' << 24; stamp[3] = '\0' << 24;
}

#define _DS_GET(off, data) \
	do { *chiptime = (off); (data) = (*chipdata); } while (0)
#define _DS_SET(off, data) \
	do { *chiptime = (off); *chipdata = (u_int8_t)(data); } while (0)
#define _DS_GET_BCD(off, data) \
	do { \
		u_int8_t c; \
		*chiptime = (off); \
		c = *chipdata; (data) = FROMBCD(c); \
	} while (0)
#define _DS_SET_BCD(off, data) \
	do { \
		*chiptime = (off); \
		*chipdata = TOBCD((u_int8_t)(data)); \
	} while (0)

/*
 * Get the time of day, based on the clock's value and/or the base value.
 */
void
dsclock_get(struct device *dev, time_t base, struct clock_ymdhms *dt)
{
	struct timekeeper_softc *sc = (void *)dev;
	volatile u_int8_t *chiptime = (void *)sc->sc_clock;
	volatile u_int8_t *chipdata = (void *)(sc->sc_clock + 1);
	int s;
	u_int8_t c;

	s = splclock();

	/* specify 24hr and BCD mode */
	_DS_GET(DS_REGB, c);
	c |= DS_REGB_24HR;
	c &= ~DS_REGB_BINARY;
	_DS_SET(DS_REGB, c);

	/* update in progress; spin loop */
	for (;;) {
		*chiptime = DS_REGA;
		if ((*chipdata & DS_REGA_UIP) == 0)
			break;
	}

	_DS_GET_BCD(DS_SEC,   dt->dt_sec);
	_DS_GET_BCD(DS_MIN,   dt->dt_min);
	_DS_GET_BCD(DS_HOUR,  dt->dt_hour);
	_DS_GET_BCD(DS_DOW,   dt->dt_wday);
	_DS_GET_BCD(DS_DOM,   dt->dt_day);
	_DS_GET_BCD(DS_MONTH, dt->dt_mon);
	_DS_GET_BCD(DS_YEAR,  dt->dt_year);

	/* UniOS-Mach doesn't set the correct BCD year after Y2K */
	if (dt->dt_year > 100) dt->dt_year -= (DS_YEAR0 % 100);

	dt->dt_year += DS_YEAR0;
	splx(s);

#ifdef TIMEKEEPER_DEBUG
	printf("get %02d/%02d/%02d %02d:%02d:%02d\n",
	    dt->dt_year, dt->dt_mon, dt->dt_day,
	    dt->dt_hour, dt->dt_min, dt->dt_sec);
#endif
}

/*
 * Reset the TODR based on the time value.
 */
void
dsclock_set(struct device *dev, struct clock_ymdhms *dt)
{
	struct timekeeper_softc *sc = (void *)dev;
	volatile u_int8_t *chiptime = (void *)sc->sc_clock;
	volatile u_int8_t *chipdata = (void *)(sc->sc_clock + 1);
	int s;
	u_int8_t c;

	s = splclock();

	/* enable write */
	_DS_GET(DS_REGB, c);
	c |= DS_REGB_SET;
	_DS_SET(DS_REGB, c);

	_DS_SET_BCD(DS_SEC,   dt->dt_sec);
	_DS_SET_BCD(DS_MIN,   dt->dt_min);
	_DS_SET_BCD(DS_HOUR,  dt->dt_hour);
	_DS_SET_BCD(DS_DOW,   dt->dt_wday);
	_DS_SET_BCD(DS_DOM,   dt->dt_day);
	_DS_SET_BCD(DS_MONTH, dt->dt_mon);
	/* XXX: We don't consider UniOS-Mach Y2K problem */
	_DS_SET_BCD(DS_YEAR,  dt->dt_year - DS_YEAR0);

	_DS_GET(DS_REGB, c);
	c &= ~DS_REGB_SET;
	_DS_SET(DS_REGB, c);

	splx(s);

#ifdef TIMEKEEPER_DEBUG
	printf("set %02d/%02d/%02d %02d:%02d:%02d\n",
	    dt->dt_year, dt->dt_mon, dt->dt_day,
	    dt->dt_hour, dt->dt_min, dt->dt_sec);
#endif
}


code:
/* $OpenBSD: timekeeper.h,v 1.3 2013/08/10 22:27:14 aoyama Exp $ */
/* $NetBSD: timekeeper.h,v 1.1 2000/01/05 08:48:56 nisimura Exp $ */

/*-
 * Copyright (c) 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Tohru Nishimura.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Mostek MK48T02 for LUNA-88K
 */
#define	MK_CSR		0	/* control register */
#define	MK_SEC		1	/* seconds (0..59; BCD) */
#define	MK_MIN		2	/* minutes (0..59; BCD) */
#define	MK_HOUR		3	/* hour (0..23; BCD) */
#define	MK_DOW		4	/* weekday (1..7) */
#define	MK_DOM		5	/* day in month (1..31; BCD) */
#define	MK_MONTH	6	/* month (1..12; BCD) */
#define	MK_YEAR		7	/* year (0..99; BCD) */
/* bits in cl_csr */
#define MK_CSR_WRITE	0x80	/* want to write */
#define MK_CSR_READ	0x40	/* want to read (freeze clock) */
/* NVRAM space is mapped with 4-bytes stride */
#define MK_NVRAM_SPACE	(4 * (2048 - 8))

/*
 * Dallas Semiconductor DS1397 for LUNA-88K2
 */
#define DS_SEC          0x0     /* Time of year: seconds (0-59) */
#define DS_MIN          0x2     /* Time of year: minutes (0-59) */
#define DS_HOUR         0x4     /* Time of year: hour (see above) */
#define DS_DOW          0x6     /* Time of year: day of week (1-7) */
#define DS_DOM          0x7     /* Time of year: day of month (1-31) */
#define DS_MONTH        0x8     /* Time of year: month (1-12) */
#define DS_YEAR         0x9     /* Time of year: year in century (0-99) */

#define DS_REGA         0xa     /* Control register A */
#define  DS_REGA_RSMASK 0x0f    /* Interrupt rate select mask (see below) */
#define  DS_REGA_DVMASK 0x70    /* Divisor select mask (see below) */
#define  DS_REGA_UIP    0x80    /* Update in progress; read only. */

#define DS_REGB         0xb     /* Control register B */
#define  DS_REGB_DSE    0x01    /* Daylight Savings Enable */
#define  DS_REGB_24HR   0x02    /* 24-hour mode (AM/PM mode when clear) */
#define  DS_REGB_BINARY 0x04    /* Binary mode (BCD mode when clear) */
#define  DS_REGB_SQWE   0x08    /* Square Wave Enable */
#define  DS_REGB_UIE    0x10    /* Update End interrupt enable */
#define  DS_REGB_AIE    0x20    /* Alarm interrupt enable */
#define  DS_REGB_PIE    0x40    /* Periodic interrupt enable */
#define  DS_REGB_SET    0x80    /* Allow time to be set; stops updates */

#define DS_REGC         0xc     /* Control register C */
/*       DS_REGC_UNUSED 0x0f    UNUSED */
#define  DS_REGC_UF     0x10    /* Update End interrupt flag */
#define  DS_REGC_AF     0x20    /* Alarm interrupt flag */
#define  DS_REGC_PF     0x40    /* Periodic interrupt flag */
#define  DS_REGC_IRQF   0x80    /* Interrupt request pending flag */

#define DS_REGD         0xd     /* Control register D */
/*       DS_REGD_UNUSED 0x7f    UNUSED */
#define  DS_REGD_VRT    0x80    /* Valid RAM and Time bit */

#define DS_NREGS        0xe     /* 14 registers; CMOS follows */
#define DS_NTODREGS     0xa     /* 10 of those regs are for TOD and alarm */


code:
/*	$OpenBSD: _float.h,v 1.1 2012/06/26 16:12:44 deraadt Exp $ */

#include <m88k/_float.h>


code:
/*	$OpenBSD: _types.h,v 1.5 2012/11/05 19:39:34 miod Exp $	*/

/* public domain */
#include <m88k/_types.h>


code:
/* $OpenBSD: asm.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/asm.h>


code:
/* $OpenBSD: asm_macro.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/asm_macro.h>


code:
/*	$OpenBSD: atomic.h,v 1.3 2011/03/23 16:54:35 pirofti Exp $	*/

/* Public Domain */

#ifndef _MACHINE_ATOMIC_H_
#define _MACHINE_ATOMIC_H_

#include <m88k/atomic.h>

#endif /* _MACHINE_ATOMIC_H_ */


code:
/*	$OpenBSD: autoconf.h,v 1.6 2011/03/23 16:54:35 pirofti Exp $ */
/*
 * Copyright (c) 1999, Steve Murphree, Jr.
 * Copyright (c) 1996 Nivas Madhur
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Nivas Madhur.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
/*
 * Autoconfiguration information.
 */

#ifndef _MACHINE_AUTOCONF_H_
#define _MACHINE_AUTOCONF_H_

/* the following are from the prom/bootblocks */
extern void	*bootaddr;	/* PA of boot device */
extern int	bootpart;	/* boot partition (disk) */

struct mainbus_attach_args {
        const char *ma_name;
        paddr_t    ma_addr;
        int        ma_ilvl;
	int	   ma_machine;
};
#endif


code:
/*	$OpenBSD: board.h,v 1.12 2014/01/06 21:28:53 miod Exp $	*/
/*
 * Mach Operating System
 * Copyright (c) 1993-1991 Carnegie Mellon University
 * Copyright (c) 1991 OMRON Corporation
 * All Rights Reserved.
 *
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#ifndef _MACHINE_BOARD_H_
#define _MACHINE_BOARD_H_

/*
 *      OMRON SX9100DT CPU board constants
 */

/*
 * Something to put append a 'U' to a long constant if it's C so that
 * it'll be unsigned in both ANSI and traditional.
 */
#if defined(_LOCORE)
#define U(num)  num
#elif defined(__STDC__)
#define U(num)  num ## U
#else
#define U(num)  num/**/U
#endif
#define UDEFINED

/* machtype values */
#define LUNA_88K	0x1
#define LUNA_88K2	0x2

#define	SYSV_BASE	U(0x00000000) 	/* system virtual base */
#define VEQR_ADDR	U(0x00000000)

#define OBIO_START	U(0x41000000)
#define OBIO_SIZE	U(0xBf000000)

#define OBIO1_BASE	U(0x41000000) 	/* on board i/o 1 base */
#define OBIO1_SPACE	U(0x1f000000) 	/* on board i/o 1 space */
#define OBIO2_BASE	U(0x61000000) 	/* on board i/o 2 base */
#define OBIO2_SPACE	U(0x1f000000) 	/* on board i/o 2 space */
#define OBIO3_BASE	U(0x80000000)	/* on board i/o 3 base */
#define OBIO3_SPACE	U(0x80000000)	/* on board i/o 3 space */

#define	MAXU_ADDR	U(0x40000000) 	/* size of user virtual space */
#define MAXPHYSMEM	U(0x10000000) 	/* max physical memory */

#define PROM_ADDR	U(0x41000000) 	/* PROM */
#define PROM_SPACE	U(0x00040000)
#define NVRAM_ADDR	U(0x45000000) 	/* Non Volatile */
#define NVRAM_SPACE	U(0x00001FDC)
#define	FUSE_ROM_ADDR	U(0x43000000) 	/* FUSE_ROM */
#define	FUSE_ROM_SPACE	        1024
#define	OBIO_CAL_CTL	U(0x45001FE0) 	/* calendar control register */
#define OBIO_CAL_SEC	U(0x45001FE4) 	/* seconds */
#define OBIO_CAL_MIN	U(0x45001FE8) 	/* minutes */
#define OBIO_CAL_HOUR	U(0x45001FEC) 	/* hours */
#define OBIO_CAL_DOW	U(0x45001FF0) 	/* Day Of the Week */
#define OBIO_CAL_DAY	U(0x45001FF4) 	/* days */
#define OBIO_CAL_MON	U(0x45001FF8) 	/* months */
#define OBIO_CAL_YEAR	U(0x45001FFC) 	/* years */
#define NVRAM_ADDR_88K2	U(0x47000000)	/* Non Volatile RAM area for LUNA-88K2 */
#define OBIO_PIO0_BASE	U(0x49000000) 	/* PIO-0 */
#define OBIO_PIO0_SPACE	U(0x0000000C)
#define OBIO_PIO0A	U(0x49000000) 	/* PIO-0 port A */
#define OBIO_PIO0B	U(0x49000004) 	/* PIO-0 port B */
#define OBIO_PIO0C	U(0x49000008) 	/* PIO-0 port C*/
#define OBIO_PIO0	U(0x4900000C) 	/* PIO-0 control */
#define OBIO_PIO1_BASE	U(0x4D000000) 	/* PIO-1 */
#define OBIO_PIO1_SPACE U(0x0000000C)
#define OBIO_PIO1A	U(0x4D000000) 	/* PIO-1 port A */
#define OBIO_PIO1B	U(0x4D000004) 	/* PIO-1 port B */
#define OBIO_PIO1C	U(0x4D000008) 	/* PIO-1 port C*/
#define OBIO_PIO1	U(0x4D00000C) 	/* PIO-1 control */
#define OBIO_SIO	U(0x51000000) 	/* SIO */
#define	OBIO_TAS	U(0x61000000) 	/* TAS register */
#define OBIO_CLOCK0	U(0x63000000) 	/* system clock CPU 0 */
#define OBIO_CLOCK1	U(0x63000004) 	/* system clock CPU 1 */
#define OBIO_CLOCK2	U(0x63000008) 	/* system clock CPU 2 */
#define OBIO_CLOCK3	U(0x6300000C) 	/* system clock CPU 3 */
#define OBIO_CLK_INTR	          31	/* system clock interrupt flag */
#define INT_ST_MASK0	U(0x65000000) 	/* interrupt status register CPU 0 */
#define INT_ST_MASK1	U(0x65000004) 	/* interrupt status register CPU 1 */
#define INT_ST_MASK2	U(0x65000008) 	/* interrupt status register CPU 2 */
#define INT_ST_MASK3	U(0x6500000C) 	/* interrupt status register CPU 3 */
#define  INT_LEVEL	           8	/* # of interrupt level + 1 */
#define  INT_SET_LV7	U(0x00000000) 	/* disable interrupts */
#define  INT_SET_LV6	U(0x00000000) 	/* enable level 7 */
#define  INT_SET_LV5	U(0x84000000) 	/* enable level 7-6 */
#define  INT_SET_LV4	U(0xC4000000) 	/* enable level 7-5 */
#define  INT_SET_LV3	U(0xE4000000) 	/* enable level 7-4 */
#define  INT_SET_LV2	U(0xF4000000) 	/* enable level 7-3 */
#define  INT_SET_LV1	U(0xFC000000) 	/* enable level 7-2 */
#define  INT_SET_LV0	U(0xFC000000) 	/* enable interrupts */
#define  INT_SLAVE_MASK	U(0x84000000) 	/* slave can only enable 6 and 1 */
#define	 INT_CLOCK_MASK	0xBFFFFFFF 	/* mask clock */

#define NON_MASKABLE_LEVEL 7		/* non-maskable-interrupt (abort) */
#define	CLOCK_INT_LEVEL	6		/* clock interrupt level */
#define SOFT_INT_LEVEL	1		/* software interrupt level */
#define SOFT_INT0	U(0x69000000) 	/* software interrupt CPU 0 */
#define SOFT_INT1	U(0x69000004) 	/* software interrupt CPU 1 */
#define SOFT_INT2	U(0x69000008) 	/* software interrupt CPU 2 */
#define SOFT_INT3	U(0x6900000C)	/* software interrupt CPU 3 */
#define SOFT_INT_FLAG0	U(0x6B000000) 	/* software interrupt flag CPU 0 */
#define SOFT_INT_FLAG1	U(0x6B000000) 	/* software interrupt flag CPU 1 */
#define SOFT_INT_FLAG2	U(0x6B000000) 	/* software interrupt flag CPU 2 */
#define SOFT_INT_FLAG3	U(0x6B000000) 	/* software interrupt flag CPU 3  */
#define  SOFT_INT_BIT	31		/* software interrupt flag bit */
#define RESET_CPU0	U(0x6D000000) 	/* reset CPU 0 */
#define RESET_CPU1	U(0x6D000004) 	/* reset CPU 1 */
#define RESET_CPU2	U(0x6D000008)	/* reset CPU 2 */
#define RESET_CPU3	U(0x6D00000C) 	/* reset CPU 3 */
#define RESET_CPU_ALL	U(0x6D000010) 	/* reset ALL CPUs */
#define TRI_PORT_RAM	U(0x71000000) 	/* 3 port RAM */
#define TRI_PORT_RAM_SPACE	0x20000
#define EXT_A_ADDR	U(0x81000000) 	/* extension board A */
#define EXT_A_SPACE	U(0x02000000)
#define	EU_BASE		U(0x81fe0000) 	/* VME expand board */
#define EXT_B_ADDR	U(0x83000000) 	/* extension board B */
#define EXT_B_SPACE	U(0x01000000)
#define	PC_BASE		U(0x90000000) 	/* pc-98 extension board */
#define	PC_SPACE	U(0x02000000)

#define MROM_ADDR	U(0xA1000000) 	/* Mask ROM address */
#define MROM_SPACE		0x400000
#define	BMAP_START	U(0xB1000000) 	/* Bitmap start address */
#define	BMAP_SPACE	(BMAP_END - BMAP_START)
#define BMAP_RFCNT	U(0xB1000000) 	/* RFCNT register */
#define BMAP_BMSEL	U(0xB1040000) 	/* BMSEL register */
#define BMAP_BMP	U(0xB1080000) 	/* common bitmap plane */
#define BMAP_BMAP0	U(0xB10C0000) 	/* bitmap plane 0 */
#define BMAP_BMAP1	U(0xB1100000) 	/* bitmap plane 1 */
#define BMAP_BMAP2	U(0xB1140000) 	/* bitmap plane 2 */
#define BMAP_BMAP3	U(0xB1180000) 	/* bitmap plane 3 */
#define BMAP_BMAP4	U(0xB11C0000) 	/* bitmap plane 4 */
#define BMAP_BMAP5	U(0xB1200000) 	/* bitmap plane 5 */
#define BMAP_BMAP6	U(0xB1240000) 	/* bitmap plane 6 */
#define BMAP_BMAP7	U(0xB1280000) 	/* bitmap plane 7 */
#define BMAP_FN		U(0xB12C0000) 	/* common bitmap function */
#define BMAP_FN0	U(0xB1300000) 	/* bitmap function 0 */
#define BMAP_FN1	U(0xB1340000) 	/* bitmap function 1 */
#define BMAP_FN2	U(0xB1380000) 	/* bitmap function 2 */
#define BMAP_FN3	U(0xB13C0000) 	/* bitmap function 3 */
#define BMAP_FN4	U(0xB1400000) 	/* bitmap function 4 */
#define BMAP_FN5	U(0xB1440000) 	/* bitmap function 5 */
#define BMAP_FN6	U(0xB1480000) 	/* bitmap function 6 */
#define BMAP_FN7	U(0xB14C0000) 	/* bitmap function 7 */
#define BMAP_END	U(0xB1500000)
#define BMAP_END24P     U(0xB1800000)   /* end of 24p framemem */
#define BMAP_PALLET0	U(0xC0000000) 	/* color pallet */
#define BMAP_PALLET1	U(0xC1000000) 	/* color pallet */
#define BMAP_PALLET2	U(0xC1100000) 	/* color pallet */
#define BOARD_CHECK_REG	U(0xD0000000) 	/* board check register */
#define BMAP_CRTC	U(0xD1000000) 	/* CRTC-II */
#define BMAP_IDENTROM   U(0xD1800000)   /* bitmap-board identify ROM */
#define SCSI_ADDR	U(0xE1000000) 	/* SCSI address */
#define LANCE_ADDR	U(0xF1000000) 	/* LANCE */
#define	EXT_IACK_ADDR	0xFFFFFFF7 	/* IACK Space for Extended Board */

#define	VDMA_STD(x)	((int)(x))

#define CMMU_I0		U(0xFFF07000) 	/* CMMU instruction cpu 0 */
#define CMMU_D0		U(0xFFF06000) 	/* CMMU data cpu 0 */
#define CMMU_I1		U(0xFFF05000) 	/* CMMU instruction cpu 1 */
#define CMMU_D1		U(0xFFF04000) 	/* CMMU data cpu 1 */
#define CMMU_I2		U(0xFFF03000) 	/* CMMU instruction cpu 2 */
#define CMMU_D2		U(0xFFF02000) 	/* CMMU data cpu 2 */
#define CMMU_I3		U(0xFFF01000) 	/* CMMU instruction cpu 3 */
#define CMMU_D3		U(0xFFF00000) 	/* CMMU data cpu 3 */

#endif /* _MACHINE_BOARD_H_ */


code:
/*	$OpenBSD: bus.h,v 1.10 2015/03/03 23:50:37 aoyama Exp $	*/
/*	$NetBSD: bus.h,v 1.9 1998/01/13 18:32:15 scottr Exp $	*/

/*-
 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
 * NASA Ames Research Center.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (C) 1997 Scott Reynolds.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_BUS_H_
#define _MACHINE_BUS_H_

/*
 * Bus address and size types
 */
typedef u_long bus_addr_t;
typedef u_long bus_size_t;

/*
 * Access methods for bus resources and address space.
 */
typedef u_long bus_space_handle_t;
typedef struct luna88k_bus_space_tag *bus_space_tag_t;

struct luna88k_bus_space_tag {
	/* 'stride' for each bytes reading/writing */
	uint8_t	bs_stride_1;
	uint8_t	bs_stride_2;
	uint8_t bs_stride_4;
	uint8_t	bs_stride_8;
	bus_size_t bs_offset;
	uint	bs_flags;
#define	TAG_LITTLE_ENDIAN	0x01
};

#define	SET_TAG_BIG_ENDIAN(t)		((t))->bs_flags &= ~TAG_LITTLE_ENDIAN
#define	SET_TAG_LITTLE_ENDIAN(t)	((t))->bs_flags |= TAG_LITTLE_ENDIAN

#define	IS_TAG_LITTLE_ENDIAN(t)		((t)->bs_flags & TAG_LITTLE_ENDIAN)

/*
 *	int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
 *	    bus_size_t size, int flags, bus_space_handle_t *bshp);
 *
 * Map a region of bus space.
 */

#define	BUS_SPACE_MAP_CACHEABLE		0x01
#define	BUS_SPACE_MAP_LINEAR		0x02

static __inline__ int
bus_space_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags,
    bus_space_handle_t *bshp)
{
	/* direct-mapped on luna88k, with offset */
	*bshp = (bus_space_handle_t)(bpa + (t->bs_offset));
	return 0;
}

/*
 *	void bus_space_unmap(bus_space_tag_t t,
 *	    bus_space_handle_t bsh, bus_size_t size);
 *
 * Unmap a region of bus space.
 */

static __inline__ void
bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
{
	/* direct-mapped on luna88k; nothing to do */
	return;
}

/*
 *	int bus_space_subregion(bus_space_tag_t t,
 *	    bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
 *	    bus_space_handle_t *nbshp);
 *
 * Get a new handle for a subregion of an already-mapped area of bus space.
 */

static __inline__ int
bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
    bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
{
	*nbshp = bsh + offset;
	return 0;
}

/*
 *	int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
 *	    bus_addr_t rend, bus_size_t size, bus_size_t align,
 *	    bus_size_t boundary, int flags, bus_addr_t *addrp,
 *	    bus_space_handle_t *bshp);
 *
 * Allocate a region of bus space.
 */

static __inline__ int
bus_space_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend,
    bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
    bus_addr_t *addrp, bus_space_handle_t *handlep)
{
	panic("bus_space_alloc: unimplemented");
}

/*
 *	int bus_space_free(bus_space_tag_t t,
 *	    bus_space_handle_t bsh, bus_size_t size);
 *
 * Free a region of bus space.
 */

static __inline__ void
bus_space_free(bus_space_tag_t tag, bus_space_handle_t handle, bus_size_t size)
{
	panic("bus_space_free: unimplemented");
}

/*
 *	u_intN_t bus_space_read_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset);
 *
 * Read a 1, 2, 4, or 8 byte quantity from bus space
 * described by tag/handle/offset.
 */

#define	bus_space_read_1(t, h, o)					\
    (*(volatile u_int8_t *)((h) + (t->bs_stride_1) * (o)))

#define	__bus_space_read_2(t, h, o)					\
    (*(volatile u_int16_t *)((h) + (t->bs_stride_2) * (o)))

#define	__bus_space_read_4(t, h, o)					\
    (*(volatile u_int32_t *)((h) + (t->bs_stride_4) * (o)))

#define bus_space_read_2(t, h, o)					\
    ((IS_TAG_LITTLE_ENDIAN(t)) ? 					\
	letoh16(__bus_space_read_2(t, h, o)) :				\
	__bus_space_read_2(t, h, o))

#define bus_space_read_4(t, h, o)					\
    ((IS_TAG_LITTLE_ENDIAN(t)) ? 					\
	letoh32(__bus_space_read_4(t, h, o)) :				\
	__bus_space_read_4(t, h, o))

#if 0	/* Cause a link error for bus_space_read_8 */
#define	bus_space_read_8(t, h, o)	!!! bus_space_read_8 unimplemented !!!
#endif

/*
 *	void bus_space_read_multi_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset,
 *	    u_intN_t *addr, size_t count);
 *
 * Read `count' 1, 2, 4, or 8 byte quantities from bus space
 * described by tag/handle/offset and copy into buffer provided.
 */

static __inline__ void
bus_space_read_multi_1(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t *dest, size_t count)
{
	while ((int)--count >= 0)
		*dest++ = bus_space_read_1(tag, handle, offset);
}

static __inline__ void
bus_space_read_multi_2(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int16_t *dest, size_t count)
{
	while ((int)--count >= 0)
		*dest++ = bus_space_read_2(tag, handle, offset);
}

static __inline__ void
bus_space_read_multi_4(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int32_t *dest, size_t count)
{
	while ((int)--count >= 0)
		*dest++ = bus_space_read_4(tag, handle, offset);
}

#if 0	/* Cause a link error for bus_space_read_multi_8 */
#define	bus_space_read_multi_8	!!! bus_space_read_multi_8 unimplemented !!!
#endif

static __inline__ void
bus_space_read_raw_multi_2(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t *dest, size_t size)
{
	size >>= 1;
	while ((int)--size >= 0) {
		*(u_int16_t *)dest =
		    __bus_space_read_2(tag, handle, offset);
		dest += 2;
	}
}

static __inline__ void
bus_space_read_raw_multi_4(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t *dest, size_t size)
{
	size >>= 2;
	while ((int)--size >= 0) {
		*(u_int32_t *)dest =
		    __bus_space_read_4(tag, handle, offset);
		dest += 4;
	}
}

/*
 *	void bus_space_read_region_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset,
 *	    u_intN_t *addr, size_t count);
 *
 * Read `count' 1, 2, 4, or 8 byte quantities from bus space
 * described by tag/handle and starting at `offset' and copy into
 * buffer provided.
 */

static __inline__ void
bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t *dest, size_t count)
{
	while ((int)--count >= 0)
		*dest++ = bus_space_read_1(tag, handle, offset++);
}

static __inline__ void
bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int16_t *dest, size_t count)
{
	while ((int)--count >= 0) {
		*dest++ = bus_space_read_2(tag, handle, offset);
		offset += 2;
	}
}

static __inline__ void
bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int32_t *dest, size_t count)
{
	while ((int)--count >= 0) {
		*dest++ = bus_space_read_4(tag, handle, offset);
		offset += 4;
	}
}

#if 0	/* Cause a link error for bus_space_read_region_8 */
#define	bus_space_read_region_8	!!! bus_space_read_region_8 unimplemented !!!
#endif

/*
 *	void bus_space_write_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset,
 *	    u_intN_t value);
 *
 * Write the 1, 2, 4, or 8 byte value `value' to bus space
 * described by tag/handle/offset.
 */

#define	bus_space_write_1(t, h, o, v)					\
    ((void)(*(volatile u_int8_t *)((h) + (t->bs_stride_1) * (o)) = (v)))

#define	__bus_space_write_2(t, h, o, v)					\
    ((void)(*(volatile u_int16_t *)((h) + (t->bs_stride_2) * (o)) = (v)))

#define	__bus_space_write_4(t, h, o, v)					\
    ((void)(*(volatile u_int32_t *)((h) + (t->bs_stride_4) * (o)) = (v)))

#define	bus_space_write_2(t, h, o, v)					\
    __bus_space_write_2(t, h, o,					\
	(IS_TAG_LITTLE_ENDIAN(t)) ? htole16(v) : (v))

#define	bus_space_write_4(t, h, o, v)					\
    __bus_space_write_4(t, h, o,					\
	(IS_TAG_LITTLE_ENDIAN(t)) ? htole32(v) : (v))

#if 0	/* Cause a link error for bus_space_write_8 */
#define	bus_space_write_8	!!! bus_space_write_8 not implemented !!!
#endif

/*
 *	void bus_space_write_multi_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset,
 *	    const u_intN_t *addr, size_t count);
 *
 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
 * provided to bus space described by tag/handle/offset.
 */

static __inline__ void
bus_space_write_multi_1(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t *dest, size_t count)
{
	while ((int)--count >= 0)
		bus_space_write_1(tag, handle, offset, *dest++);
}

static __inline__ void
bus_space_write_multi_2(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int16_t *dest, size_t count)
{
	while ((int)--count >= 0)
		bus_space_write_2(tag, handle, offset, *dest++);
}

static __inline__ void
bus_space_write_multi_4(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int32_t *dest, size_t count)
{
	while ((int)--count >= 0)
		bus_space_write_4(tag, handle, offset, *dest++);
}

#if 0	/* Cause a link error for bus_space_write_8 */
#define	bus_space_write_multi_8(t, h, o, a, c)				\
			!!! bus_space_write_multi_8 unimplemented !!!
#endif

static __inline__ void
bus_space_write_raw_multi_2(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t *dest, size_t size)
{
	size >>= 1;
	while ((int)--size >= 0) {
		__bus_space_write_2(tag, handle, offset,*(u_int16_t *)dest);
		dest += 2;
	}
}

static __inline__ void
bus_space_write_raw_multi_4(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t *dest, size_t size)
{
	size >>= 2;
	while ((int)--size >= 0) {
		__bus_space_write_4(tag, handle, offset, *(u_int32_t *)dest);
		dest += 4;
	}
}

/*
 *	void bus_space_write_region_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset,
 *	    const u_intN_t *addr, size_t count);
 *
 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
 * to bus space described by tag/handle starting at `offset'.
 */

static __inline__ void
bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t *dest, size_t count)
{
	while ((int)--count >= 0)
		bus_space_write_1(tag, handle, offset++, *dest++);
}

static __inline__ void
bus_space_write_region_2(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int16_t *dest, size_t count)
{
	while ((int)--count >= 0) {
		bus_space_write_2(tag, handle, offset, *dest++);
		offset += 2;
	}
}

static __inline__ void
bus_space_write_region_4(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int32_t *dest, size_t count)
{
	while ((int)--count >= 0) {
		bus_space_write_4(tag, handle, offset, *dest++);
		offset += 4;
	}
}

#if 0	/* Cause a link error for bus_space_write_region_8 */
#define	bus_space_write_region_8					\
			!!! bus_space_write_region_8 unimplemented !!!
#endif

/*
 *	void bus_space_set_multi_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
 *	    size_t count);
 *
 * Write the 1, 2, 4, or 8 byte value `val' to bus space described
 * by tag/handle/offset `count' times.
 */

static __inline__ void
bus_space_set_multi_1(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t value, size_t count)
{
	while ((int)--count >= 0)
		bus_space_write_1(tag, handle, offset, value);
}

static __inline__ void
bus_space_set_multi_2(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int16_t value, size_t count)
{
	while ((int)--count >= 0)
		bus_space_write_2(tag, handle, offset, value);
}

static __inline__ void
bus_space_set_multi_4(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int32_t value, size_t count)
{
	while ((int)--count >= 0)
		bus_space_write_4(tag, handle, offset, value);
}

#if 0	/* Cause a link error for bus_space_set_multi_8 */
#define	bus_space_set_multi_8						\
			!!! bus_space_set_multi_8 unimplemented !!!
#endif

/*
 *	void bus_space_set_region_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
 *	    size_t count);
 *
 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
 * by tag/handle starting at `offset'.
 */

static __inline__ void
bus_space_set_region_1(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int8_t value, size_t count)
{
	while ((int)--count >= 0)
		bus_space_write_1(tag, handle, offset++, value);
}

static __inline__ void
bus_space_set_region_2(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int16_t value, size_t count)
{
	while ((int)--count >= 0) {
		bus_space_write_2(tag, handle, offset, value);
		offset += 2;
	}
}

static __inline__ void
bus_space_set_region_4(bus_space_tag_t tag, bus_space_handle_t handle,
    bus_addr_t offset, u_int32_t value, size_t count)
{
	while ((int)--count >= 0) {
		bus_space_write_4(tag, handle, offset, value);
		offset += 4;
	}
}

#if 0	/* Cause a link error for bus_space_set_region_8 */
#define	bus_space_set_region_8						\
			!!! bus_space_set_region_8 unimplemented !!!
#endif

/*
 *	void bus_space_copy_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh1, bus_size_t off1,
 *	    bus_space_handle_t bsh2, bus_size_t off2,
 *	    size_t count);
 *
 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
 */

#define	__LUNA88K_copy_N(BYTES)					\
static __inline void __CONCAT(bus_space_copy_,BYTES)		\
	    (bus_space_tag_t,						\
	    bus_space_handle_t bsh1, bus_size_t off1,			\
	    bus_space_handle_t bsh2, bus_size_t off2,			\
	    bus_size_t count);						\
									\
static __inline void							\
__CONCAT(bus_space_copy_,BYTES)(t, h1, o1, h2, o2, c)		\
	bus_space_tag_t t;						\
	bus_space_handle_t h1, h2;					\
	bus_size_t o1, o2, c;						\
{									\
	bus_size_t o;							\
									\
	if ((h1 + o1) >= (h2 + o2)) {					\
		/* src after dest: copy forward */			\
		for (o = 0; c != 0; c--, o += BYTES)			\
			__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o,	\
			    __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
	} else {							\
		/* dest after src: copy backwards */			\
		for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES)	\
			__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o,	\
			    __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
	}								\
}
__LUNA88K_copy_N(1)
__LUNA88K_copy_N(2)
__LUNA88K_copy_N(4)
#if 0	/* Cause a link error for bus_space_copy_8 */
#define	bus_space_copy_8						\
			!!! bus_space_copy_8 unimplemented !!!
#endif

#undef __LUNA88K_copy_N

/*
 * Bus read/write barrier methods.
 *
 *	void bus_space_barrier(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset,
 *	    bus_size_t len, int flags);
 *
 */
#define	bus_space_barrier(t, h, o, l, f)	\
	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
#define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
#define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */

#endif /* _MACHINE_BUS_H_ */


code:
/* $OpenBSD: cdefs.h,v 1.4 2005/11/24 20:46:45 deraadt Exp $ */
/* public domain */

#include <m88k/cdefs.h>


code:
/* $OpenBSD: cmmu.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/cmmu.h>


code:
/*	$OpenBSD: conf.h,v 1.4 2015/03/03 23:50:37 aoyama Exp $	*/
/*
 * Copyright (c) 2004, Miodrag Vallat.
 * All rights reserved.
 *
 * Permission to redistribute, use, copy, and modify this software
 * is hereby granted without fee, provided that the following
 * conditions are met:
 *
 * 1. This entire notice is included in all source code copies of any
 *    software which is or includes a copy or modification of this
 *    software.
 * 2. The name of the author may not be used to endorse or promote
 *    products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/conf.h>

#define	mmread	mmrw
#define	mmwrite	mmrw
cdev_decl(mm);

cdev_decl(sio);

cdev_decl(lcd);

cdev_decl(pcex);

/* devices on PCMCIA */
/* block devices */
bdev_decl(wd);
/* character devices */
cdev_decl(com);
cdev_decl(wd);

/* open, close, write, ioctl */
#define	cdev_lcd_init(c,n) { \
	dev_init(c,n,open), dev_init(c,n,close), \
	(dev_type_read((*))) enodev, dev_init(c,n,write), \
	dev_init(c,n,ioctl), (dev_type_stop((*))) enodev, \
	0, seltrue, (dev_type_mmap((*))) enodev }

/* open, close, ioctl, mmap */
#define cdev_pcex_init(c,n) { \
	dev_init(c,n,open), dev_init(c,n,close), (dev_type_read((*))) enodev, \
	(dev_type_write((*))) enodev, dev_init(c,n,ioctl), \
	(dev_type_stop((*))) enodev, 0, selfalse, \
	dev_init(c,n,mmap) }


code:
/* $OpenBSD: cpu.h,v 1.7 2014/06/03 22:43:51 aoyama Exp $ */
/* public domain */
#ifndef	_MACHINE_CPU_H_
#define	_MACHINE_CPU_H_

#include <m88k/cpu.h>

#ifdef _KERNEL
void luna88k_ext_int(struct trapframe *eframe);
#define	md_interrupt_func	luna88k_ext_int
#endif	/* _KERNEL */

#endif	/* _MACHINE_CPU_H_ */


code:
/* $OpenBSD: db_machdep.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/db_machdep.h>


code:
/*	$OpenBSD: disklabel.h,v 1.5 2007/06/20 18:15:45 deraadt Exp $	*/

/*
 * Copyright (c) 1994 Christopher G. Demetriou
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Christopher G. Demetriou.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_DISKLABEL_H_
#define _MACHINE_DISKLABEL_H_

#define	LABELSECTOR	0			/* sector containing label */
#define	LABELOFFSET	64			/* offset of label in sector */
#define	MAXPARTITIONS	16			/* number of partitions */

#endif /* _MACHINE_DISKLABEL_H_ */


code:
/* $OpenBSD: endian.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/endian.h>


code:
/* $OpenBSD: exec.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/exec.h>


code:
/*	$OpenBSD: fenv.h,v 1.2 2013/06/01 21:20:54 jasper Exp $	*/
/* public domain */
#include <m88k/fenv.h>


code:
/* $OpenBSD: fpu.h,v 1.1 2007/12/08 18:39:50 miod Exp $ */
/* public domain */
#include <m88k/fpu.h>


code:
/* $OpenBSD: frame.h,v 1.5 2007/01/13 22:00:56 miod Exp $ */
/* public domain */
#include <m88k/frame.h>


code:
/* $OpenBSD: ieee.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/ieee.h>


code:
/* $OpenBSD: ieeefp.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/ieeefp.h>


code:
/*	$OpenBSD: intr.h,v 1.9 2014/12/28 13:03:18 aoyama Exp $	*/
/*
 * Copyright (C) 2000 Steve Murphree, Jr.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_INTR_H_
#define _MACHINE_INTR_H_

/*
 * IPL levels.
 */

#define IPL_NONE	0
#define IPL_SOFTINT	1
#define IPL_BIO		3
#define IPL_AUDIO	4
#define IPL_NET		4
#define IPL_TTY		5
#define IPL_VM		5
#define IPL_CLOCK	6
#define IPL_STATCLOCK	6
#define	IPL_SCHED	6
#define IPL_HIGH	7
#define IPL_NMI		7
#define IPL_ABORT	7

#define IPL_MPSAFE	0	/* no "mpsafe" interrupts */

#include <m88k/intr.h>

#endif /* _MACHINE_INTR_H_ */


code:
/* $OpenBSD: kcore.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/kcore.h>


code:
/* $OpenBSD: lcd.h,v 1.2 2011/03/23 16:54:35 pirofti Exp $ */

/*
 * Copyright (c) 2007 Kenji AOYAMA <aoyama@nk-home.net>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

#ifndef _MACHINE_LCD_H_
#define _MACHINE_LCD_H_

/*
 * OpenBSD/luna88k LCD driver
 */

/* The ioctl defines */

#define	LCDCLS		_IO('L', 1)		/* Clear LCD screen */
#define	LCDHOME		_IO('L', 2)		/* Move the cursor to left-upper */
#define	LCDMODE		_IOW('L', 3, int)	/* Set the data entry mode */
#define	LCDDISP		_IOW('L', 4, int)	/* Blink, cursor, and display on/off */
#define	LCDMOVE		_IOW('L', 5, int)	/* Move cursor / shift display area */
#define	LCDSEEK		_IOW('L', 6, int)	/* Move the cursor to specified position */
#define	LCDRESTORE	_IO('L', 7)		/* Restore boot-time LCD message */

/* argument value for each ioctl */

/* LCDMODE; when a character data is written, then ... */
#define	LCDMODE_C_LEFT	0x04	/* cursor moves left */
#define	LCDMODE_C_RIGHT	0x06	/* cursor moves right */
#define	LCDMODE_D_LEFT	0x05	/* display area shifts to left */
#define	LCDMODE_D_RIGHT	0x07	/* display area shifts to right */

/* LCDDISP; you can use these values or'ed */
#define	LCD_DISPLAY	0x04	/* LCD display on */
#define	LCD_CURSOR	0x02 	/* Cursor on */
#define	LCD_BLINK	0x01	/* Blink on */

/* LCDMOVE; just move the cursor or shift the display area */
#define	LCDMOVE_C_LEFT	0x10	/* cursor moves left */
#define	LCDMOVE_C_RIGHT	0x14	/* cursor moves right */
#define	LCDMOVE_D_LEFT	0x18	/* display area shifts to left */
#define	LCDMOVE_D_RIGHT	0x1c	/* display area shifts to right */

#endif /* _MACHINE_LCD_H_ */


code:
/* $OpenBSD: limits.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/limits.h>


code:
/*	$OpenBSD: loadfile_machdep.h,v 1.1 2013/10/18 10:55:33 miod Exp $	*/

/*-
 * Copyright (c) 1999 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Christos Zoulas.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#define BOOT_ELF

#define LOAD_KERNEL		LOAD_ALL
#define COUNT_KERNEL		COUNT_ALL

#define LOADADDR(a)		(((u_long)(a)) + offset)
#define ALIGNENTRY(a)		((u_long)(a) & ~0x0fff)
#define READ(f, b, c)		read((f), (void *)LOADADDR(b), (c))
#define BCOPY(s, d, c)		memcpy((void *)LOADADDR(d), (void *)(s), (c))
#define BZERO(d, c)		memset((void *)LOADADDR(d), 0, (c))
#define	WARN(a)			(void)(printf a, \
				    printf((errno ? ": %s\n" : "\n"), \
				    strerror(errno)))
#define PROGRESS(a)		(void) printf a
#define ALLOC(a)		alloc(a)
#define FREE(a, b)		free(a, b)


code:
/* $OpenBSD: lock.h,v 1.1 2005/12/03 19:04:03 miod Exp $ */
/* public domain */
#include <m88k/lock.h>


code:
/* $OpenBSD: mmu.h,v 1.3 2004/04/26 14:31:08 miod Exp $ */
/* public domain */
#include <m88k/mmu.h>


code:
/*	$OpenBSD: mplock.h,v 1.1 2007/12/02 21:20:17 miod Exp $	*/
/* public domain */
#include <m88k/mplock.h>


code:
/* $OpenBSD: mutex.h,v 1.1 2005/12/03 19:01:10 miod Exp $ */
/* public domain */
#include <m88k/mutex.h>