code:
/*	$OpenBSD: fenv.h,v 1.3 2011/05/25 21:46:49 martynas Exp $	*/

/*
 * Copyright (c) 2011 Martynas Venckus <martynas@openbsd.org>
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef	_ALPHA_FENV_H_
#define	_ALPHA_FENV_H_

/*
 * Each symbol representing a floating point exception expands to an integer
 * constant expression with values, such that bitwise-inclusive ORs of _all
 * combinations_ of the constants result in distinct values.
 *
 * We use such values that allow direct bitwise operations on FPU registers.
 */
#define	FE_INVALID		0x01
#define	FE_DIVBYZERO		0x02
#define	FE_OVERFLOW		0x04
#define	FE_UNDERFLOW		0x08
#define	FE_INEXACT		0x10

/*
 * The following symbol is simply the bitwise-inclusive OR of all floating-point
 * exception constants defined above.
 */
#define	FE_ALL_EXCEPT		(FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | \
				 FE_UNDERFLOW)

/*
 * Each symbol representing the rounding direction, expands to an integer
 * constant expression whose value is distinct non-negative value.
 *
 * We use such values that allow direct bitwise operations on FPU registers.
 */
#define	FE_TOWARDZERO		0x0
#define	FE_DOWNWARD		0x1
#define	FE_TONEAREST		0x2
#define	FE_UPWARD		0x3

/*
 * The following symbol is simply the bitwise-inclusive OR of all floating-point
 * rounding direction constants defined above.
 */
#define	_ROUND_MASK		(FE_TOWARDZERO | FE_DOWNWARD | FE_TONEAREST | \
				 FE_UPWARD)
#define	_ROUND_SHIFT		58

/*
 * fenv_t represents the entire floating-point environment.
 */
typedef	struct {
	unsigned int __sticky;
	unsigned int __mask;
	unsigned int __round;
} fenv_t;

/*
 * The following constant represents the default floating-point environment
 * (that is, the one installed at program startup) and has type pointer to
 * const-qualified fenv_t.
 *
 * It can be used as an argument to the functions within the <fenv.h> header
 * that manage the floating-point environment, namely fesetenv() and
 * feupdateenv().
 */
__BEGIN_DECLS
extern	fenv_t			__fe_dfl_env;
__END_DECLS
#define	FE_DFL_ENV		((const fenv_t *)&__fe_dfl_env)

/*
 * fexcept_t represents the floating-point status flags collectively, including
 * any status the implementation associates with the flags.
 *
 * A floating-point status flag is a system variable whose value is set (but
 * never cleared) when a floating-point exception is raised, which occurs as a
 * side effect of exceptional floating-point arithmetic to provide auxiliary
 * information.
 *
 * A floating-point control mode is a system variable whose value may be set by
 * the user to affect the subsequent behavior of floating-point arithmetic.
 */
typedef	unsigned int		fexcept_t;

#endif	/* !_ALPHA_FENV_H_ */


code:
/*	$OpenBSD: fpu.h,v 1.2 2011/03/23 16:54:34 pirofti Exp $	*/
/*	$NetBSD: fpu.h,v 1.4 2001/04/26 03:10:46 ross Exp $	*/

/*-
 * Copyright (c) 2001 Ross Harvey
 * All rights reserved.
 *
 * This software was written for NetBSD.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by the NetBSD
 *	Foundation, Inc. and its contributors.
 * 4. Neither the name of The NetBSD Foundation nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_FPU_H_
#define _MACHINE_FPU_H_

#define	_FP_C_DEF(n) (1UL << (n))

/*
 * Most of these next definitions were moved from <ieeefp.h>. Apparently the
 * names happen to match those exported by Compaq and Linux from their fpu.h
 * files.
 */

#define	FPCR_SUM	_FP_C_DEF(63)
#define	FPCR_INED	_FP_C_DEF(62)
#define	FPCR_UNFD	_FP_C_DEF(61)
#define	FPCR_UNDZ	_FP_C_DEF(60)
#define	FPCR_DYN(rm)	((unsigned long)(rm) << 58)
#define	FPCR_IOV	_FP_C_DEF(57)
#define	FPCR_INE	_FP_C_DEF(56)
#define	FPCR_UNF	_FP_C_DEF(55)
#define	FPCR_OVF	_FP_C_DEF(54)
#define	FPCR_DZE	_FP_C_DEF(53)
#define	FPCR_INV	_FP_C_DEF(52)
#define	FPCR_OVFD	_FP_C_DEF(51)
#define	FPCR_DZED	_FP_C_DEF(50)
#define	FPCR_INVD	_FP_C_DEF(49)
#define	FPCR_DNZ	_FP_C_DEF(48)
#define	FPCR_DNOD	_FP_C_DEF(47)

#define	FPCR_MIRRORED (FPCR_INE | FPCR_UNF | FPCR_OVF | FPCR_DZE | FPCR_INV)
#define FPCR_MIR_START 52

/*
 * The AARM specifies the bit positions of the software word used for
 * user mode interface to the control and status of the kernel completion
 * routines. Although it largely just redefines the FPCR, it shuffles
 * the bit order. The names of the bits are defined in the AARM, and
 * the definition prefix can easily be determined from public domain
 * programs written to either the Compaq or Linux interfaces, which
 * appear to be identical.
 */

#define IEEE_STATUS_DNO _FP_C_DEF(22)
#define IEEE_STATUS_INE _FP_C_DEF(21)
#define IEEE_STATUS_UNF _FP_C_DEF(20)
#define IEEE_STATUS_OVF _FP_C_DEF(19)
#define IEEE_STATUS_DZE _FP_C_DEF(18)
#define IEEE_STATUS_INV _FP_C_DEF(17)

#define	IEEE_TRAP_ENABLE_DNO _FP_C_DEF(6)
#define	IEEE_TRAP_ENABLE_INE _FP_C_DEF(5)
#define	IEEE_TRAP_ENABLE_UNF _FP_C_DEF(4)
#define	IEEE_TRAP_ENABLE_OVF _FP_C_DEF(3)
#define	IEEE_TRAP_ENABLE_DZE _FP_C_DEF(2)
#define	IEEE_TRAP_ENABLE_INV _FP_C_DEF(1)

#define	IEEE_INHERIT _FP_C_DEF(14)
#define	IEEE_MAP_UMZ _FP_C_DEF(13)
#define	IEEE_MAP_DMZ _FP_C_DEF(12)

#define FP_C_MIRRORED (IEEE_STATUS_INE | IEEE_STATUS_UNF | IEEE_STATUS_OVF\
				| IEEE_STATUS_DZE | IEEE_STATUS_INV)
#define	FP_C_MIR_START 17

#ifdef _KERNEL

#define	FLD_MASK(len) ((1UL << (len)) - 1)
#define FLD_CLEAR(obj, origin, len)	\
		((obj) & ~(FLD_MASK(len) << (origin)))
#define	FLD_INSERT(obj, origin, len, value)	\
		(FLD_CLEAR(obj, origin, len) | (value) << origin)

#define	FP_C_TO_OPENBSD_MASK(fp_c) 	((fp_c) >> 1 & 0x3f)
#define	FP_C_TO_OPENBSD_FLAG(fp_c) 	((fp_c) >> 17 & 0x3f)
#define OPENBSD_MASK_TO_FP_C(m)		(((m) & 0x3f) << 1)
#define OPENBSD_FLAG_TO_FP_C(s)		(((s) & 0x3f) << 17)
#define	CLEAR_FP_C_MASK(fp_c)		((fp_c) & ~(0x3f << 1))
#define	CLEAR_FP_C_FLAG(fp_c)		((fp_c) & ~(0x3f << 17))
#define	SET_FP_C_MASK(fp_c, m) (CLEAR_FP_C_MASK(fp_c) | OPENBSD_MASK_TO_FP_C(m))
#define	SET_FP_C_FLAG(fp_c, m) (CLEAR_FP_C_FLAG(fp_c) | OPENBSD_FLAG_TO_FP_C(m))

#endif

#endif

license: unknown


code:
/*	$OpenBSD: frame.h,v 1.4 2011/03/23 16:54:34 pirofti Exp $	*/
/*	$NetBSD: frame.h,v 1.3 1996/07/11 05:31:32 cgd Exp $	*/

/*
 * Copyright (c) 1994, 1995 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#ifndef _MACHINE_FRAME_H_
#define	_MACHINE_FRAME_H_

#include <machine/alpha_cpu.h>

/*
 * Software trap, exception, and syscall frame.
 *
 * Includes "hardware" (PALcode) frame.
 *
 * PALcode puts ALPHA_HWFRAME_* fields on stack.  We have to add
 * all of the general-purpose registers except for zero, for sp
 * (which is automatically saved in the PCB's USP field for entries
 * from user mode, and which is implicitly saved and restored by the
 * calling conventions for entries from kernel mode), and (on traps
 * and exceptions) for a0, a1, and a2 (which are saved by PALcode).
 */

/* Quadword offsets of the registers to be saved. */
#define	FRAME_V0	0
#define	FRAME_T0	1
#define	FRAME_T1	2
#define	FRAME_T2	3
#define	FRAME_T3	4
#define	FRAME_T4	5
#define	FRAME_T5	6
#define	FRAME_T6	7
#define	FRAME_T7	8
#define	FRAME_S0	9
#define	FRAME_S1	10
#define	FRAME_S2	11
#define	FRAME_S3	12
#define	FRAME_S4	13
#define	FRAME_S5	14
#define	FRAME_S6	15
#define	FRAME_A3	16
#define	FRAME_A4	17
#define	FRAME_A5	18
#define	FRAME_T8	19
#define	FRAME_T9	20
#define	FRAME_T10	21
#define	FRAME_T11	22
#define	FRAME_RA	23
#define	FRAME_T12	24
#define	FRAME_AT	25
#define	FRAME_SP	26

#define	FRAME_SW_SIZE	(FRAME_SP + 1)
#define	FRAME_HW_OFFSET	FRAME_SW_SIZE

#define	FRAME_PS	(FRAME_HW_OFFSET + ALPHA_HWFRAME_PS)
#define	FRAME_PC	(FRAME_HW_OFFSET + ALPHA_HWFRAME_PC)
#define	FRAME_GP	(FRAME_HW_OFFSET + ALPHA_HWFRAME_GP)
#define	FRAME_A0	(FRAME_HW_OFFSET + ALPHA_HWFRAME_A0)
#define	FRAME_A1	(FRAME_HW_OFFSET + ALPHA_HWFRAME_A1)
#define	FRAME_A2	(FRAME_HW_OFFSET + ALPHA_HWFRAME_A2)

#define	FRAME_HW_SIZE	ALPHA_HWFRAME_SIZE
#define	FRAME_SIZE	(FRAME_HW_OFFSET + FRAME_HW_SIZE)

struct trapframe {
	unsigned long	tf_regs[FRAME_SIZE];	/* See above */
};

#endif /* _MACHINE_FRAME_H_ */


code:
/*	$OpenBSD: ieee.h,v 1.5 2008/09/07 20:36:06 martynas Exp $	*/
/*	$NetBSD: ieee.h,v 1.1 1995/02/13 23:07:40 cgd Exp $	*/

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)ieee.h	8.1 (Berkeley) 6/11/93
 *
 * from: Header: ieee.h,v 1.7 92/11/26 02:04:37 torek Exp
 */

/*
 * ieee.h defines the machine-dependent layout of the machine's IEEE
 * floating point.  It does *not* define (yet?) any of the rounding
 * mode bits, exceptions, and so forth.
 */

/*
 * Define the number of bits in each fraction and exponent.
 *
 *		     k	         k+1
 * Note that  1.0 x 2  == 0.1 x 2      and that denorms are represented
 *
 *					  (-exp_bias+1)
 * as fractions that look like 0.fffff x 2             .  This means that
 *
 *			 -126
 * the number 0.10000 x 2    , for instance, is the same as the normalized
 *
 *		-127			   -128
 * float 1.0 x 2    .  Thus, to represent 2    , we need one leading zero
 *
 *				  -129
 * in the fraction; to represent 2    , we need two, and so on.  This
 *
 *						     (-exp_bias-fracbits+1)
 * implies that the smallest denormalized number is 2
 *
 * for whichever format we are talking about: for single precision, for
 *
 *						-126		-149
 * instance, we get .00000000000000000000001 x 2    , or 1.0 x 2    , and
 *
 * -149 == -127 - 23 + 1.
 */
#define	SNG_EXPBITS	8
#define	SNG_FRACBITS	23

#define	DBL_EXPBITS	11
#define	DBL_FRACHBITS	20
#define	DBL_FRACLBITS	32
#define	DBL_FRACBITS	52

struct ieee_single {
	u_int	sng_frac:23;
	u_int	sng_exp:8;
	u_int	sng_sign:1;
};

struct ieee_double {
	u_int	dbl_fracl;
	u_int	dbl_frach:20;
	u_int	dbl_exp:11;
	u_int	dbl_sign:1;
};

/*
 * Floats whose exponent is in [1..INFNAN) (of whatever type) are
 * `normal'.  Floats whose exponent is INFNAN are either Inf or NaN.
 * Floats whose exponent is zero are either zero (iff all fraction
 * bits are zero) or subnormal values.
 *
 * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
 * high fraction; if the bit is set, it is a `quiet NaN'.
 */
#define	SNG_EXP_INFNAN	255
#define	DBL_EXP_INFNAN	2047

#if 0
#define	SNG_QUIETNAN	(1 << 22)
#define	DBL_QUIETNAN	(1 << 19)
#endif

/*
 * Exponent biases.
 */
#define	SNG_EXP_BIAS	127
#define	DBL_EXP_BIAS	1023


code:
/*	$OpenBSD: ieeefp.h,v 1.6 2011/03/23 16:54:34 pirofti Exp $	*/
/*	$NetBSD: ieeefp.h,v 1.1 1995/04/29 01:09:17 cgd Exp $	*/

/*
 * Written by J.T. Conklin, Apr 28, 1995
 * Public domain.
 */

#ifndef _MACHINE_IEEEFP_H_
#define _MACHINE_IEEEFP_H_

typedef int fp_except;

#ifdef _KERNEL

#include <sys/param.h>
#include <sys/proc.h>
#include <machine/fpu.h>
#include <machine/cpu.h>

/* FP_X_IOV is intentionally omitted from the architecture flags mask */

#define	FP_AA_FLAGS (FP_X_INV | FP_X_DZ | FP_X_OFL | FP_X_UFL | FP_X_IMP)

#define float_raise(f)						\
	do curproc->p_md.md_flags |= OPENBSD_FLAG_TO_FP_C(f);	\
	while(0)

#define	float_set_inexact()	float_raise(FP_X_IMP)
#define	float_set_invalid()	float_raise(FP_X_INV)
#define	fpgetround()		(alpha_read_fpcr() >> 58 & 3)

#endif

#define	FP_X_INV	0x01	/* invalid operation exception */
#define	FP_X_DZ		0x02	/* divide-by-zero exception */
#define	FP_X_OFL	0x04	/* overflow exception */
#define	FP_X_UFL	0x08	/* underflow exception */
#define	FP_X_IMP	0x10	/* imprecise (loss of precision; "inexact") */
#define	FP_X_IOV	0x20    /* integer overflow */

/*
 * fp_rnd bits match the fpcr, below, as well as bits 12:11
 * in fp operate instructions
 */
typedef enum {
    FP_RZ = 0,			/* round to zero (truncate) */
    FP_RM = 1,			/* round toward negative infinity */
    FP_RN = 2,			/* round to nearest representable number */
    FP_RP = 3			/* round toward positive infinity */
} fp_rnd;

#endif /* _MACHINE_IEEEFP_H_ */


code:
/* $OpenBSD: intr.h,v 1.44 2015/02/11 01:13:22 dlg Exp $ */
/* $NetBSD: intr.h,v 1.26 2000/06/03 20:47:41 thorpej Exp $ */

/*-
 * Copyright (c) 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 1997 Christopher G. Demetriou.  All rights reserved.
 * Copyright (c) 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#ifndef _MACHINE_INTR_H_
#define _MACHINE_INTR_H_

#include <sys/evcount.h>
#include <sys/mutex.h>
#include <sys/queue.h>
#include <machine/atomic.h>

/*
 * The Alpha System Control Block.  This is 8k long, and you get
 * 16 bytes per vector (i.e. the vector numbers are spaced 16
 * apart).
 *
 * This is sort of a "shadow" SCB -- rather than the CPU jumping
 * to (SCBaddr + (16 * vector)), like it does on the VAX, we get
 * a vector number in a1.  We use the SCB to look up a routine/arg
 * and jump to it.
 *
 * Since we use the SCB only for I/O interrupts, we make it shorter
 * than normal, starting it at vector 0x800 (the start of the I/O
 * interrupt vectors).
 */
#define	SCB_IOVECBASE	0x0800
#define	SCB_VECSIZE	0x0010
#define	SCB_SIZE	0x2000

#define	SCB_VECTOIDX(x)	((x) >> 4)
#define	SCB_IDXTOVEC(x)	((x) << 4)

#define	SCB_NIOVECS	SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE)

struct scbvec {
	void	(*scb_func)(void *, u_long);
	void	*scb_arg;
};

/*
 * Alpha interrupts come in at one of 4 levels:
 *
 *	software interrupt level
 *	i/o level 1
 *	i/o level 2
 *	clock level
 *
 * However, since we do not have any way to know which hardware
 * level a particular i/o interrupt comes in on, we have to
 * whittle it down to 3.
 */

#define	IPL_NONE	ALPHA_PSL_IPL_0
#define	IPL_SOFTINT	ALPHA_PSL_IPL_SOFT
#define	IPL_BIO		ALPHA_PSL_IPL_IO
#define	IPL_NET		ALPHA_PSL_IPL_IO
#define	IPL_TTY		ALPHA_PSL_IPL_IO
#define	IPL_SERIAL	ALPHA_PSL_IPL_IO
#define	IPL_AUDIO	ALPHA_PSL_IPL_IO
#define	IPL_VM		ALPHA_PSL_IPL_IO
#define	IPL_CLOCK	ALPHA_PSL_IPL_CLOCK
#define	IPL_SCHED	ALPHA_PSL_IPL_CLOCK
#define	IPL_IPI		ALPHA_PSL_IPL_HIGH	/* occur on _CLOCK, though */
#define	IPL_HIGH	ALPHA_PSL_IPL_HIGH

#define	IPL_SOFTSERIAL	0	/* serial software interrupts */
#define	IPL_SOFTCLOCK	1	/* clock software interrupts */
#define	IPL_SOFTNET	2	/* network software interrupts */
#define	IPL_SOFT	3	/* other software interrupts */

#define	IPL_MPSAFE	0	/* no "mpsafe" interrupts */

#define	IST_UNUSABLE	-1	/* interrupt cannot be used */
#define	IST_NONE	0	/* none (dummy) */
#define	IST_PULSE	1	/* pulsed */
#define	IST_EDGE	2	/* edge-triggered */
#define	IST_LEVEL	3	/* level-triggered */

#define SI_SOFT		0
#define SI_SOFTCLOCK	1
#define SI_SOFTNET	2
#define SI_SOFTSERIAL	3
#define	SI_NSOFT	4

#ifdef	_KERNEL

/* SPL asserts */
#ifdef DIAGNOSTIC
/*
 * Although this function is implemented in MI code, it must be in this MD
 * header because we don't want this header to include MI includes.
 */
void splassert_fail(int, int, const char *);
extern int splassert_ctl;
void splassert_check(int, const char *);
#define	splassert(__wantipl)						\
	do {								\
		if (splassert_ctl > 0) {				\
			splassert_check(__wantipl, __func__);		\
		}							\
	} while (0)
#define	splsoftassert(wantipl)	splassert(IPL_SOFTINT)
#else
#define	splassert(wantipl)	do { /* nothing */ } while (0)
#define	splsoftassert(wantipl)	do { /* nothing */ } while (0)
#endif

/* IPL-lowering/restoring macros */
#define splx(s)								\
    ((s) == ALPHA_PSL_IPL_0 ? spl0() : alpha_pal_swpipl(s))

/* IPL-raising functions/macros */
int _splraise(int);

#define splsoft()		_splraise(IPL_SOFTINT)
#define splsoftserial()		splsoft()
#define splsoftclock()		splsoft()
#define splsoftnet()		splsoft()
#define splnet()		_splraise(IPL_NET)
#define splbio()		_splraise(IPL_BIO)
#define spltty()		_splraise(IPL_TTY)
#define splserial()		_splraise(IPL_SERIAL)
#define splaudio()		_splraise(IPL_AUDIO)
#define splvm()			_splraise(IPL_VM)
#define splclock()		_splraise(IPL_CLOCK)
#define splstatclock()		_splraise(IPL_CLOCK)
#define splsched()		_splraise(IPL_SCHED)
#define splipi()		_splraise(IPL_IPI)
#define splhigh()		_splraise(IPL_HIGH)

#define spllock()		splhigh()

/*
 * Interprocessor interrupts.  In order how we want them processed.
 */
#define	ALPHA_IPI_HALT			(1UL << 0)
#define	ALPHA_IPI_SHOOTDOWN		(1UL << 1)
#define	ALPHA_IPI_IMB			(1UL << 2)
#define	ALPHA_IPI_AST			(1UL << 3)
#define	ALPHA_IPI_SYNCH_FPU		(1UL << 4)
#define	ALPHA_IPI_DISCARD_FPU		(1UL << 5)
#define	ALPHA_IPI_PAUSE			(1UL << 6)

#define	ALPHA_NIPIS		7	/* must not exceed 64 */

struct cpu_info;
struct trapframe;

void	alpha_ipi_process(struct cpu_info *, struct trapframe *);
#ifdef MP_LOCKDEBUG
void	alpha_ipi_process_with_frame(struct cpu_info *);
#else
#define	alpha_ipi_process_with_frame(ci) alpha_ipi_process((ci), NULL)
#endif
void	alpha_send_ipi(unsigned long, unsigned long);
void	alpha_broadcast_ipi(unsigned long);
void	alpha_multicast_ipi(unsigned long, unsigned long);

/*
 * Alpha shared-interrupt-line common code.
 */

struct alpha_shared_intrhand {
	TAILQ_ENTRY(alpha_shared_intrhand)
		ih_q;
	struct alpha_shared_intr *ih_intrhead;
	int	(*ih_fn)(void *);
	void	*ih_arg;
	int	ih_level;
	unsigned int ih_num;
	struct evcount ih_count;
};

struct alpha_shared_intr {
	TAILQ_HEAD(,alpha_shared_intrhand)
		intr_q;
	void	*intr_private;
	int	intr_sharetype;
	int	intr_dfltsharetype;
	int	intr_nstrays;
	int	intr_maxstrays;
};

#define	ALPHA_SHARED_INTR_DISABLE(asi, num)				\
	((asi)[num].intr_maxstrays != 0 &&				\
	 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays)

extern int	intr_shared_edge;

/*
 * simulated software interrupt register
 */
extern unsigned long ssir;

#define	setsoft(x)	atomic_setbits_ulong(&ssir, 1 << (x))

struct alpha_soft_intrhand {
	TAILQ_ENTRY(alpha_soft_intrhand)
		sih_q;
	struct alpha_soft_intr *sih_intrhead;
	void	(*sih_fn)(void *);
	void	*sih_arg;
	int	sih_pending;
};

struct alpha_soft_intr {
	TAILQ_HEAD(, alpha_soft_intrhand)
		softintr_q;
	struct mutex softintr_mtx;
	unsigned long softintr_siq;
};

void	 softintr_disestablish(void *);
void	 softintr_dispatch(void);
void	*softintr_establish(int, void (*)(void *), void *);
void	 softintr_init(void);
void	 softintr_schedule(void *);

struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int);
int	alpha_shared_intr_dispatch(struct alpha_shared_intr *,
	    unsigned int);
void	*alpha_shared_intr_establish(struct alpha_shared_intr *,
	    unsigned int, int, int, int (*)(void *), void *, const char *);
void	alpha_shared_intr_disestablish(struct alpha_shared_intr *, void *);
int	alpha_shared_intr_get_sharetype(struct alpha_shared_intr *,
	    unsigned int);
int	alpha_shared_intr_isactive(struct alpha_shared_intr *,
	    unsigned int);
int	alpha_shared_intr_firstactive(struct alpha_shared_intr *,
	    unsigned int);
void	alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *,
	    unsigned int, int);
void	alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *,
	    unsigned int, int);
void	alpha_shared_intr_reset_strays(struct alpha_shared_intr *,
	    unsigned int);
void	alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int,
	    const char *);
void	alpha_shared_intr_set_private(struct alpha_shared_intr *,
	    unsigned int, void *);
void	*alpha_shared_intr_get_private(struct alpha_shared_intr *,
	    unsigned int);

extern struct scbvec scb_iovectab[];

void	scb_init(void);
void	scb_set(u_long, void (*)(void *, u_long), void *);
u_long	scb_alloc(void (*)(void *, u_long), void *);
void	scb_free(u_long);

#define	SCB_ALLOC_FAILED	((u_long) -1)

#endif /* _KERNEL */
#endif /* ! _MACHINE_INTR_H_ */


code:
/*	$OpenBSD: ioctl_fd.h,v 1.3 2011/03/23 16:54:34 pirofti Exp $	*/
/*	from: ioctl_fd.h,v 1.4 1995/06/29 03:49:32 jtk Exp 	*/

/*
 * Copyright (C) 1992-1994 by Joerg Wunsch, Dresden
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR(S) ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR(S) BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 *
 * From: Id: ioctl_fd.h,v 1.7 1994/10/30 19:17:39 joerg Exp
 */

#ifndef _MACHINE_IOCTL_FD_H_
#define _MACHINE_IOCTL_FD_H_

#define FD_FORMAT_VERSION 110	/* used to validate before formatting */
#define FD_MAX_NSEC 36		/* highest known number of spt - allow for */
				/* 2.88 MB drives */

struct fd_formb {
	int format_version;	/* == FD_FORMAT_VERSION */
	int cyl, head;
	int transfer_rate;	/* fdreg.h: FDC_???KBPS */

	union {
		struct fd_form_data {
			/*
			 * DO NOT CHANGE THE LAYOUT OF THIS STRUCTS
			 * it is hardware-dependent since it exactly
			 * matches the byte sequence to write to FDC
			 * during its `format track' operation
			 */
			u_char secshift; /* 0 -> 128, ...; usually 2 -> 512 */
			u_char nsecs;	/* must be <= FD_MAX_NSEC */
			u_char gaplen;	/* GAP 3 length; usually 84 */
			u_char fillbyte; /* usually 0xf6 */
			struct fd_idfield_data {
				/*
				 * data to write into id fields;
				 * for obscure formats, they mustn't match
				 * the real values (but mostly do)
				 */
				u_char cylno;	/* 0 thru 79 (or 39) */
				u_char headno;	/* 0, or 1 */
				u_char secno;	/* starting at 1! */
				u_char secsize;	/* usually 2 */
			} idfields[FD_MAX_NSEC]; /* 0 <= idx < nsecs used */
		} structured;
		u_char raw[1];	/* to have continuous indexed access */
	} format_info;
};

/* make life easier */
# define fd_formb_secshift   format_info.structured.secshift
# define fd_formb_nsecs      format_info.structured.nsecs
# define fd_formb_gaplen     format_info.structured.gaplen
# define fd_formb_fillbyte   format_info.structured.fillbyte
/* these data must be filled in for(i = 0; i < fd_formb_nsecs; i++) */
# define fd_formb_cylno(i)   format_info.structured.idfields[i].cylno
# define fd_formb_headno(i)  format_info.structured.idfields[i].headno
# define fd_formb_secno(i)   format_info.structured.idfields[i].secno
# define fd_formb_secsize(i) format_info.structured.idfields[i].secsize

/*
 * Floppies come in various flavors, e.g., 1.2MB vs 1.44MB; here is how
 * we tell them apart.
 */
struct fd_type {
	int	sectrac;	/* sectors per track */
	int	heads;		/* number of heads */
	int	seccyl;		/* sectors per cylinder */
	int	secsize;	/* size code for sectors */
	int	datalen;	/* data len when secsize = 0 */
	int	steprate;	/* step rate and head unload time */
	int	gap1;		/* gap len between sectors */
	int	gap2;		/* formatting gap */
	int	tracks;		/* total num of tracks */
	int	size;		/* size of disk in sectors */
	int	step;		/* steps per cylinder */
	int	rate;		/* transfer speed code */
	char	*name;
};

#define FD_FORM   _IOW('F', 61, struct fd_formb) /* format a track */
#define FD_GTYPE  _IOR('F', 62, struct fd_type)  /* get drive type */
#define FD_STYPE  _IOW('F', 63, struct fd_type)  /* set drive type */

#define FD_GOPTS  _IOR('F', 64, int) /* drive options, see below */
#define FD_SOPTS  _IOW('F', 65, int)

#define FDOPT_NORETRY 0x0001	/* no retries on failure (cleared on close) */

/*
 * The following definitions duplicate those in sys/i386/isa/fdreg.h
 * They are here since their values are to be used in the above
 * structure when formatting a floppy. For very obvious reasons, both
 * definitions must match ;-)
 */
#ifndef FDC_500KBPS
#define	FDC_500KBPS	0x00	/* 500KBPS MFM drive transfer rate */
#define	FDC_300KBPS	0x01	/* 300KBPS MFM drive transfer rate */
#define	FDC_250KBPS	0x02	/* 250KBPS MFM drive transfer rate */
#define	FDC_125KBPS	0x03	/* 125KBPS FM drive transfer rate */
				/* for some controllers 1MPBS instead */
#endif /* FDC_500KBPS */

#endif /* !_MACHINE_IOCTL_FD_H__ */


code:
/* $OpenBSD: kcore.h,v 1.4 2011/03/23 16:54:34 pirofti Exp $ */
/* $NetBSD: kcore.h,v 1.3 1998/02/14 00:17:57 cgd Exp $ */

/*
 * Copyright (c) 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#ifndef _MACHINE_KCORE_H_
#define _MACHINE_KCORE_H_

typedef struct cpu_kcore_hdr {
	u_int64_t	lev1map_pa;		/* PA of Lev1map */
	u_int64_t	page_size;		/* Page size */
	u_int64_t	nmemsegs;		/* Number of RAM segments */
#if 0
	phys_ram_seg_t  memsegs[];		/* RAM segments */
#endif
} cpu_kcore_hdr_t;

#endif /* _MACHINE_KCORE_H_ */


code:
/*	$OpenBSD: limits.h,v 1.14 2015/04/30 13:42:08 millert Exp $	*/
/*	$NetBSD: limits.h,v 1.2 1996/04/12 01:38:25 cgd Exp $	*/

/*
 * Copyright (c) 1988, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)limits.h	8.3 (Berkeley) 1/4/94
 */

#ifndef _MACHINE_LIMITS_H_
#define _MACHINE_LIMITS_H_

#include <sys/cdefs.h>

#if __POSIX_VISIBLE || __XPG_VISIBLE
#define	SSIZE_MAX	LONG_MAX	/* max value for a ssize_t */
#endif

#if __BSD_VISIBLE
#define	SIZE_T_MAX	ULONG_MAX	/* max value for a size_t (historic) */

/* Quads and longs are the same on the alpha */
#define	UQUAD_MAX	(ULONG_MAX)	/* max value for a uquad_t */
#define	QUAD_MAX	(LONG_MAX)	/* max value for a quad_t */
#define	QUAD_MIN	(LONG_MIN)	/* min value for a quad_t */

#endif /* __BSD_VISIBLE */

#endif /* _MACHINE_LIMITS_H_ */


code:
/*	$OpenBSD: loadfile_machdep.h,v 1.2 2015/07/17 20:44:38 miod Exp $	*/
/*	$NetBSD: loadfile_machdep.h,v 1.2 2001/10/31 17:20:49 thorpej Exp $	 */

/*-
 * Copyright (c) 1999 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Christos Zoulas.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#define BOOT_ELF
#define ELFSIZE	64

#define LOAD_KERNEL		LOAD_ALL
#define COUNT_KERNEL		COUNT_ALL

#define LOADADDR(a)		(((u_long)(a)) + offset)
#define READ(f, b, c)		read((f), (void *)LOADADDR(b), (c))
#define BCOPY(s, d, c)		bcopy((void *)s, (void *)LOADADDR(d), (c))
#define BZERO(d, c)		bzero((void *)LOADADDR(d), (c))
#define	WARN(a)			(void)(printf a, \
				    printf((errno ? ": %s\n" : "\n"), \
				    strerror(errno)))
#define PROGRESS(a)		(void) printf a
#define ALLOC(a)		alloc(a)
#define FREE(a, b)		free(a, b)

extern int check_phdr(void *);
#define	CHECK_PHDR(sz,phdr)	check_phdr(phdr)


code:
/* $OpenBSD: lock.h,v 1.9 2015/02/11 03:56:00 dlg Exp $	*/
/* $NetBSD: lock.h,v 1.16 2001/12/17 23:34:57 thorpej Exp $ */

/*-
 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
 * NASA Ames Research Center.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Machine-dependent spin lock operations.
 */

#ifndef _MACHINE_LOCK_H_
#define	_MACHINE_LOCK_H_

#if defined(MULTIPROCESSOR)
/*
 * On the Alpha, interprocessor interrupts come in at device priority
 * level.  This can cause some problems while waiting for r/w spinlocks
 * from a high'ish priority level: IPIs that come in will not be processed.
 * This can lead to deadlock.
 *
 * This hook allows IPIs to be processed while a spinlock's interlock
 * is released.
 */
#define	SPINLOCK_SPIN_HOOK						\
do {									\
	struct cpu_info *__ci = curcpu();				\
	int __s;							\
									\
	if (__ci->ci_ipis != 0) {					\
		__s = splipi();						\
		alpha_ipi_process_with_frame(__ci);			\
		splx(__s);						\
	}								\
} while (0)
#endif /* MULTIPROCESSOR */

#endif /* _MACHINE_LOCK_H_ */


code:
/* $OpenBSD: logout.h,v 1.3 2009/09/25 04:38:40 miod Exp $ */
/* $NetBSD: logout.h,v 1.6 2005/12/11 12:16:16 christos Exp $ */

/*
 * Copyright (c) 2009 Miodrag Vallat.
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */
/*
 * Copyright (c) 1998 by Matthew Jacob
 * NASA AMES Research Center.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice immediately at the beginning of the file, without modification,
 *    this list of conditions, and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

/*
 * Various Alpha OSF/1 PAL Logout error definitions.
 */

/*
 * Information gathered from: DEC documentation
 */

/*
 * Avanti (AlphaStation 200 and 400) Specific PALcode Exception Logout
 * Area Definitions
 */

/*
 * Avanti Specific common logout frame header.
 * *Almost* identical to the generic logout header listed in alpha_cpu.h.
 */

typedef struct {
	unsigned int	la_frame_size;		/* frame size */
	unsigned int	la_flags;		/* flags; see alpha_cpu.h */
	unsigned int	la_cpu_offset;		/* offset to CPU area */
	unsigned int	la_system_offset;	/* offset to system area */
	unsigned int	mcheck_code;		/* machine check code */
	unsigned int	:32;
} mc_hdr_avanti;

/* Machine Check Codes */

/* SCB 660 Fatal Machine Checks */
#define AVANTI_RETRY_TIMEOUT		0x201L
#define	AVANTI_DMA_DATA_PARITY		0x202L
#define AVANTI_IO_PARITY		0x203L
#define AVANTI_TARGET_ABORT		0x204L
#define AVANTI_NO_DEVICE		0x205L
#define AVANTI_CORRRECTABLE_MEMORY	0x206L	/* Should never occur */
#define AVANTI_UNCORRECTABLE_PCI_MEMORY	0x207L
#define AVANTI_INVALID_PT_LOOKUP	0x208L
#define AVANTI_MEMORY			0x209L
#define AVANTI_BCACHE_TAG_ADDR_PARITY	0x20AL
#define AVANTI_BCACHE_TAG_CTRL_PARITY	0x20BL
#define AVANTI_NONEXISTENT_MEMORY	0x20CL
#define AVANTI_IO_BUS			0x20DL
#define AVANTI_BCACHE_TAG_PARITY	 0x80L
#define AVANTI_BCACHE_TAG_CTRL_PARITY2   0x82L

/* SCB 670 Processor Fatal Machine Checks */
#define AVANTI_HARD_ERROR		 0x84L
#define AVANTI_CORRECTABLE_ECC		 0x86L
#define AVANTI_NONCORRECTABLE_ECC	 0x88L
#define AVANTI_UNKNOWN_ERROR		 0x8AL
#define AVANTI_SOFT_ERROR		 0x8CL
#define AVANTI_BUGCHECK		 	 0x8EL
#define AVANTI_OS_BUGCHECK		 0x90L
#define AVANTI_DCACHE_FILL_PARITY 	 0x92L
#define AVANTI_ICACHE_FILL_PARITY	 0x94L

typedef struct {
	/* Registers from the CPU */
	u_int64_t	paltemp[32];	/* PAL TEMP REGS.		*/
	u_int64_t	exc_addr;	/* Address of excepting ins.	*/
	u_int64_t	exc_sum;	/* Summary of arithmetic traps.	*/
	u_int64_t	exc_mask;	/* Exception mask.		*/
	u_int64_t	iccsr;
	u_int64_t	pal_base;	/* Base address for PALcode.	*/
	u_int64_t	hier;
	u_int64_t	hirr;
	u_int64_t	mm_csr;
	u_int64_t	dc_stat;
	u_int64_t	dc_addr;
	u_int64_t	abox_ctl;
	u_int64_t	biu_stat;	/* Bus Interface Unit Status.	*/
	u_int64_t	biu_addr;
	u_int64_t	biu_ctl;
	u_int64_t	fill_syndrome;
	u_int64_t	fill_addr;
	u_int64_t	va;
	u_int64_t	bc_tag;

	/* Registers from the cache and memory controller (21071-CA) */
	u_int64_t	coma_gcr;	/* Error and Diag. Status.	*/
	u_int64_t	coma_edsr;
	u_int64_t	coma_ter;
	u_int64_t	coma_elar;
	u_int64_t	coma_ehar;
	u_int64_t	coma_ldlr;
	u_int64_t	coma_ldhr;
	u_int64_t	coma_base0;
	u_int64_t	coma_base1;
	u_int64_t	coma_base2;
	u_int64_t	coma_cnfg0;
	u_int64_t	coma_cnfg1;
	u_int64_t	coma_cnfg2;

	/* Registers from the PCI bridge (21071-DA) */
	u_int64_t	epic_dcsr;	 /* Diag. Control and Status.	*/
	u_int64_t	epic_pear;
	u_int64_t	epic_sear;
	u_int64_t	epic_tbr1;
	u_int64_t	epic_tbr2;
	u_int64_t	epic_pbr1;
	u_int64_t	epic_pbr2;
	u_int64_t	epic_pmr1;
	u_int64_t	epic_pmr2;
	u_int64_t	epic_harx1;
	u_int64_t	epic_harx2;
	u_int64_t	epic_pmlt;
	u_int64_t	epic_tag0;
	u_int64_t	epic_tag1;
	u_int64_t	epic_tag2;
	u_int64_t	epic_tag3;
	u_int64_t	epic_tag4;
	u_int64_t	epic_tag5;
	u_int64_t	epic_tag6;
	u_int64_t	epic_tag7;
	u_int64_t	epic_data0;
	u_int64_t	epic_data1;
	u_int64_t	epic_data2;
	u_int64_t	epic_data3;
	u_int64_t	epic_data4;
	u_int64_t	epic_data5;
	u_int64_t	epic_data6;
	u_int64_t	epic_data7;
} mc_uc_avanti;

/*
 * Information gathered from: OSF/1 header files.
 */

/*
 * EV5 Specific OSF/1 Pal Code Exception Logout Area Definitions
 * (inspired from OSF/1 Header files).
 */

/*
 * EV5 Specific common logout frame header.
 * *Almost* identical to the generic logout header listed in alpha_cpu.h.
 */

typedef struct {
	unsigned int	la_frame_size;		/* frame size */
	unsigned int	la_flags;		/* flags; see alpha_cpu.h */
	unsigned int	la_cpu_offset;		/* offset to CPU area */
	unsigned int	la_system_offset;	/* offset to system area */
	unsigned long	mcheck_code;		/* machine check code */
} mc_hdr_ev5;

/* Machine Check Codes */
#define	EV5_CORRECTED		0x86L
#define	SYSTEM_CORRECTED	0x201L

/*
 * EV5 Specific Machine Check logout frame for uncorrectable errors.
 * This is used to log uncorrectable errors such as double bit ECC errors.
 *
 * This typically resides in the CPU offset area of the logout frame.
 */

typedef struct {
	u_int64_t	shadow[8];	/* Shadow reg. 8-14, 25		*/
	u_int64_t	paltemp[24];	/* PAL TEMP REGS.		*/
	u_int64_t	exc_addr;	/* Address of excepting ins.	*/
	u_int64_t	exc_sum;	/* Summary of arithmetic traps.	*/
	u_int64_t	exc_mask;	/* Exception mask.		*/
	u_int64_t	pal_base;	/* Base address for PALcode.	*/
	u_int64_t	isr;		/* Interrupt Status Reg.	*/
	u_int64_t	icsr;		/* CURRENT SETUP OF EV5 IBOX	*/
	u_int64_t	ic_perr_stat;	/*
					 * I-CACHE Reg:
					 *	<13> IBOX Timeout
					 *	<12> TAG parity
					 *	<11> Data parity
					 */
	u_int64_t	dc_perr_stat;	/* D-CACHE error Reg:
					 * Bits set to 1:
					 *  <2> Data error in bank 0
					 *  <3> Data error in bank 1
					 *  <4> Tag error in bank 0
					 *  <5> Tag error in bank 1
					 */
	u_int64_t	va;		/* Effective VA of fault or miss. */
	u_int64_t	mm_stat;	/*
					 * Holds the reason for D-stream
					 * fault or D-cache parity errors
					 */
	u_int64_t	sc_addr;	/*
					 * Address that was being accessed
					 * when EV5 detected Secondary cache
					 * failure.
					 */
	u_int64_t	sc_stat;	/*
					 * Helps determine if the error was
					 * TAG/Data parity(Secondary Cache)
					 */
	u_int64_t	bc_tag_addr;	/* Contents of EV5 BC_TAG_ADDR	  */
	u_int64_t	ei_addr;	/*
					 * Physical address of any transfer
					 * that is logged in the EV5 EI_STAT
					 */
	u_int64_t	fill_syndrome;	/* For correcting ECC errors.	  */
	u_int64_t	ei_stat;	/*
					 * Helps identify reason of any
					 * processor uncorrectable error
					 * at its external interface.
					 */
	u_int64_t	ld_lock;	/* Contents of EV5 LD_LOCK register*/
} mc_uc_ev5;
#define	EV5_IC_PERR_IBOXTMO	0x2000

/*
 * EV5 Specific Machine Check logout frame for correctable errors.
 *
 * This is used to log correctable errors such as Single bit ECC errors.
 */
typedef struct {
	u_int64_t	ei_addr;	/*
					 * Physical address of any transfer
					 * that is logged in the EV5 EI_STAT
					 */
	u_int64_t	fill_syndrome;	/* For correcting ECC errors.	  */
	u_int64_t	ei_stat;	/*
					 * Helps identify reason of any
					 * processor uncorrectable error
					 * at its external interface.
					 */
	u_int64_t	isr;		/* Interrupt Status Reg. 	  */
} mc_cc_ev5;

/*
 * Information gathered from: AlphaServer ES40 Service Guide
 */

/*
 * EV6 Specific OSF/1 Pal Code Exception Logout Area Definitions
 */

/*
 * EV6 Specific common logout frame header.
 * *Almost* identical to the generic logout header listed in alpha_cpu.h.
 */

typedef struct {
	unsigned int	la_frame_size;		/* frame size */
	unsigned int	la_flags;		/* flags; see alpha_cpu.h */
	unsigned int	la_cpu_offset;		/* offset to CPU area */
	unsigned int	la_system_offset;	/* offset to system area */
	unsigned int	mcheck_code;		/* machine check code */
	unsigned int	mcheck_rev;		/* frame revision */
#define	MC_EV6_FRAME_REVISION		1
} mc_hdr_ev6;

/*
 * EV6 Specific Machine Check processor area.
 */

typedef struct {
	uint64_t	i_stat;
	uint64_t	dc_stat;
	uint64_t	c_addr;
	uint64_t	c_syndrome_0;
	uint64_t	c_syndrome_1;
	uint64_t	c_stat;
	uint64_t	c_sts;
	uint64_t	mm_stat;
	/* the following fields only exist for uncorrectable errors */
	uint64_t	exc_addr;
	uint64_t	ier_cm;
	uint64_t	isum;
	uint64_t	reserved0;
	uint64_t	pal_base;
	uint64_t	i_ctl;
	uint64_t	pctx;
	uint64_t	reserved1;
	uint64_t	reserved2;
} mc_cpu_ev6;

/* C_STAT bits */
#define	EV6_C_STAT_MASK					0x1f
#define	EV6_C_STAT_NO_ERROR				0x00
#define	EV6_C_STAT_SNGL_BC_TAG_PERR			0x01
#define	EV6_C_STAT_SNGL_DC_DUPLICATE_TAG_PERR		0x02
#define	EV6_C_STAT_SNGL_DSTREAM_MEM_ECC_ERR		0x03
#define	EV6_C_STAT_SNGL_DSTREAM_BC_ECC_ERR		0x04
#define	EV6_C_STAT_SNGL_DSTREAM_DC_ECC_ERR		0x05
#define	EV6_C_STAT_SNGL_BC_PROBE_HIT_ERR		0x06
#define	EV6_C_STAT_SNGL_BC_PROBE_HIT_ERR2		0x07
#define	EV6_C_STAT_SNGL_ISTREAM_MEM_ECC_ERR		0x0b
#define	EV6_C_STAT_SNGL_ISTREAM_BC_ECC_ERR		0x0c
#define	EV6_C_STAT_DBL_DSTREAM_MEM_ECC_ERR		0x13
#define	EV6_C_STAT_DBL_DSTREAM_BC_ECC_ERR		0x14
#define	EV6_C_STAT_DBL_ISTREAM_MEM_ECC_ERR		0x1b
#define	EV6_C_STAT_DBL_ISTREAM_BC_ECC_ERR		0x1c

/* C_STS bits */
#define	EV6_C_STS_MASK					0x0f
#define	EV6_C_STS_PARITY				0x08
#define	EV6_C_STS_VALID					0x04
#define	EV6_C_STS_DIRTY					0x02
#define	EV6_C_STS_SHARED				0x01

/* DC_STAT */
#define	EV6_DC_STAT_MASK				0x1f
#define	EV6_DC_STAT_PIPELINE_0_ERROR			0x01
#define	EV6_DC_STAT_PIPELINE_1_ERROR			0x02
#define	EV6_DC_STAT_STORE_DATA_ECC_ERROR		0x04
#define	EV6_DC_STAT_LOAD_DATA_ECC_ERROR			0x08
#define	EV6_DC_STAT_STORE_DATA_ECC_ERROR_REPEATED	0x10

/* MM_STAT */
#define	EV6_MM_STAT_MASK				0x03ff
#define	EV6_MM_STAT_WRITE				0x0001
#define	EV6_MM_STAT_ACCESS_VIOLATION			0x0002
#define	EV6_MM_STAT_FOR_SET				0x0004
#define	EV6_MM_STAT_FOW_SET				0x0008
#define	EV6_MM_STAT_OPCODE_MASK				0x02f0
#define	EV6_MM_STAT_DCACHE_CORRECTABLE_ERROR		0x0300

/*
 * EV6 Specific Machine Check system area.
 */

typedef struct {
	uint64_t	flags;
	uint64_t	c_dir;
	uint64_t	c_misc;
	uint64_t	p0_perror;
	uint64_t	p1_perror;
} mc_sys_ev6;

/*
 * EV6 Environmental Error logout frame.
 */

typedef struct {
	uint64_t	flags;
	uint64_t	c_dir;
	uint64_t	smir;
	uint64_t	cpuir;
	uint64_t	psir;
	uint64_t	lm78_isr;
	uint64_t	doors;
	uint64_t	temp_warning;
	uint64_t	fan_control;
	uint64_t	fatal_power_down;
	uint64_t	reserved;
} mc_env_ev6;

/* SMIR */
#define	EV6_ENV_SMIR_RESET				0x80
#define	EV6_ENV_SMIR_PCI1_RESET				0x40
#define	EV6_ENV_SMIR_PCI0_RESET				0x20
#define	EV6_ENV_SMIR_OVERTEMP				0x10
#define	EV6_ENV_SMIR_DC_FAILURE				0x04
#define	EV6_ENV_SMIR_RMC_HALT				0x02
#define	EV6_ENV_SMIR_PSU_FAILURE			0x01

/* CPUIR */
#define	EV6_ENV_CPUIR_CPU_FAIL(cpuno)			((cpuno) << 4)
#define	EV6_ENV_CPUIR_CPU_ENABLE(cpuno)			((cpuno) << 0)

/* PSIR */
#define	EV6_ENV_PSIR_PSU_FAIL(psuno)			((psuno) << 4)
#define	EV6_ENV_PSIR_PSU_ENABLE(psuno)			((psuno) << 0)

/* LM78_ISR */
#define	EV6_ENV_LM78_PSU_AC_HIGH_LIMIT			0x0000800000000000
#define	EV6_ENV_LM78_PSU_AC_LOW_LIMIT			0x0000400000000000
#define	EV6_ENV_LM78_PSU_OVERTEMP			0x0000200000000000
#define	EV6_ENV_LM78_PSU_12V_OVERAMP			0x0000100000000000
#define	EV6_ENV_LM78_PSU_5V_OVERAMP			0x0000080000000000
#define	EV6_ENV_LM78_PSU_3_3V_OVERAMP			0x0000040000000000
#define	EV6_ENV_LM78_PSU_NUMBER_MASK			0x0000030000000000
#define	EV6_ENV_LM78_PSU_NUMBER_SHIFT			40
#define	EV6_ENV_LM78_FAN6_FAILURE			0x0000008000000000
#define	EV6_ENV_LM78_FAN3_FAILURE			0x0000004000000000
#define	EV6_ENV_LM78_ZONE2_OVERTEMP			0x0000001000000000
#define	EV6_ENV_LM78_CPU3_VIO_OOT			0x0000000800000000
#define	EV6_ENV_LM78_CPU3_VCORE_OOT			0x0000000400000000
#define	EV6_ENV_LM78_CPU2_VIO_OOT			0x0000000200000000
#define	EV6_ENV_LM78_CPU2_VCORE_OOT			0x0000000100000000
#define	EV6_ENV_LM78_FAN5_FAILURE			0x0000000000800000
#define	EV6_ENV_LM78_FAN4_FAILURE			0x0000000000400000
#define	EV6_ENV_LM78_ZONE1_OVERTEMP			0x0000000000100000
#define	EV6_ENV_LM78_CPU1_VIO_OOT			0x0000000000080000
#define	EV6_ENV_LM78_CPU1_VCORE_OOT			0x0000000000040000
#define	EV6_ENV_LM78_CPU0_VIO_OOT			0x0000000000020000
#define	EV6_ENV_LM78_CPU0_VCORE_OOT			0x0000000000010000
#define	EV6_ENV_LM78_PSU_MINUS12V_OOT			0x0000000000000400
#define	EV6_ENV_LM78_CTERM_OOT				0x0000000000000100
#define	EV6_ENV_LM78_FAN2_FAILURE			0x0000000000000080
#define	EV6_ENV_LM78_FAN1_FAILURE			0x0000000000000040
#define	EV6_ENV_LM78_CPU_OVERTEMP			0x0000000000000020
#define	EV6_ENV_LM78_ZONA0_OVERTEMP			0x0000000000000010
#define	EV6_ENV_LM78_VTERM_OOT				0x0000000000000008
#define	EV6_ENV_LM78_PSU_12V_OOT			0x0000000000000004
#define	EV6_ENV_LM78_PSU_5V_OOT				0x0000000000000002
#define	EV6_ENV_LM78_PSU_3_3V_OOT			0x0000000000000001

/* Doors */
#define	EV6_ENV_DOORS_PCI_CLOSED			0x80
#define	EV6_ENV_DOORS_FAN_CLOSED			0x40
#define	EV6_ENV_DOORS_CPU_CLOSED			0x20
#define	EV6_ENV_DOORS_PCI_OPEN				0x08
#define	EV6_ENV_DOORS_FAN_OPEN				0x04
#define	EV6_ENV_DOORS_CPU_OPEN				0x02

/* System Temperature Warning (sticky?) */
#define	EV6_ENV_STW_ZONE2				0x40
#define	EV6_ENV_STW_ZONE1				0x20
#define	EV6_ENV_STW_ZONE0				0x10
#define	EV6_ENV_STW_CPU3				0x08
#define	EV6_ENV_STW_CPU2				0x04
#define	EV6_ENV_STW_CPU1				0x02
#define	EV6_ENV_STW_CPU0				0x01

/* System Fan Control Fault */
#define	EV6_ENV_SFCF_FAN1234_LOW_SPEED			0x0800
#define	EV6_ENV_SFCF_FAN1234_HIGH_SPEED			0x0400
#define	EV6_ENV_SFCF_FAN56_LOW_SPEED			0x0200
#define	EV6_ENV_SFCF_FAN56_HIGH_SPEED			0x0100
#define	EV6_ENV_SFCF_FAN6_NONRESPONSIVE			0x0020
#define	EV6_ENV_SFCF_FAN5_NONRESPONSIVE			0x0010
#define	EV6_ENV_SFCF_FAN4_NONRESPONSIVE			0x0008
#define	EV6_ENV_SFCF_FAN3_NONRESPONSIVE			0x0004
#define	EV6_ENV_SFCF_FAN2_NONRESPONSIVE			0x0002
#define	EV6_ENV_SFCF_FAN1_NONRESPONSIVE			0x0001


code:
/*	$OpenBSD: mplock.h,v 1.1 2014/01/26 17:40:11 miod Exp $	*/

/*
 * Copyright (c) 2004 Niklas Hallqvist.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_MPLOCK_H_
#define _MACHINE_MPLOCK_H_

/*
 * Really simple spinlock implementation with recursive capabilities.
 * Correctness is paramount, no fancyness allowed.
 */

struct __mp_lock {
	volatile struct cpu_info *mpl_cpu;
	volatile long		mpl_count;
};

#ifndef _LOCORE

void __mp_lock_init(struct __mp_lock *);
void __mp_lock(struct __mp_lock *);
void __mp_unlock(struct __mp_lock *);
int __mp_release_all(struct __mp_lock *);
int __mp_release_all_but_one(struct __mp_lock *);
void __mp_acquire_count(struct __mp_lock *, int);
int __mp_lock_held(struct __mp_lock *);

#endif

#endif /* !_MACHINE_MPLOCK_H */


code:
/*	$OpenBSD: mutex.h,v 1.7 2015/04/17 12:38:54 dlg Exp $	*/

/*
 * Copyright (c) 2004 Artur Grabowski <art@openbsd.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
 * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL  DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_MUTEX_H_
#define _MACHINE_MUTEX_H_

struct mutex {
	void *mtx_owner;
	int mtx_wantipl;
	int mtx_oldipl;
};

/*
 * To prevent lock ordering problems with the kernel lock, we need to
 * make sure we block all interrupts that can grab the kernel lock.
 * The simplest way to achieve this is to make sure mutexes always
 * raise the interrupt priority level to the highest level that has
 * interrupts that grab the kernel lock.
 */
#ifdef MULTIPROCESSOR
#define __MUTEX_IPL(ipl) \
    (((ipl) > IPL_NONE && (ipl) < IPL_AUDIO) ? IPL_AUDIO : (ipl))
#else
#define __MUTEX_IPL(ipl) (ipl)
#endif

#define MUTEX_INITIALIZER(ipl) { NULL, __MUTEX_IPL((ipl)), IPL_NONE }

void __mtx_init(struct mutex *, int);
#define mtx_init(mtx, ipl) __mtx_init((mtx), __MUTEX_IPL((ipl)))

#ifdef DIAGNOSTIC
#define MUTEX_ASSERT_LOCKED(mtx) do {					\
	if ((mtx)->mtx_owner != curcpu())				\
		panic("mutex %p not held in %s", (mtx), __func__);	\
} while (0)

#define MUTEX_ASSERT_UNLOCKED(mtx) do {					\
	if ((mtx)->mtx_owner == curcpu())				\
		panic("mutex %p held in %s", (mtx), __func__);		\
} while (0)
#else
#define MUTEX_ASSERT_LOCKED(mtx) do { } while (0)
#define MUTEX_ASSERT_UNLOCKED(mtx) do { } while (0)
#endif

#define MUTEX_OLDIPL(mtx)	(mtx)->mtx_oldipl

#endif	/* _MACHINE_MUTEX_H_ */


code:
/* $OpenBSD: pal.h,v 1.2 2000/11/08 21:27:20 ericj Exp $ */
/* $NetBSD: pal.h,v 1.1 1997/09/06 01:23:53 thorpej Exp $ */

/*
 * Copyright (c) 1991,1990,1989,1994,1995,1996 Carnegie Mellon University
 * All Rights Reserved.
 *
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 */

/*
 * PAL "function" codes (used as arguments to call_pal instructions).
 *
 * Those marked with "P" are privileged, and those marked with "U"
 * are unprivileged.
 */

/* Common PAL function codes. */
#define	PAL_halt		0x0000			/* P */
#define	PAL_cflush		0x0001			/* P */
#define	PAL_draina		0x0002			/* P */
#define	PAL_cserve		0x0009			/* P */
#define	PAL_swppal		0x000a			/* P */
#define	PAL_ipir		0x000d			/* P */
#define	PAL_bpt			0x0080			/* U */
#define	PAL_bugchk		0x0081			/* U */
#define	PAL_imb			0x0086			/* U */
#define	PAL_rdunique		0x009e			/* U */
#define	PAL_wrunique		0x009f			/* U */
#define	PAL_gentrap		0x00aa			/* U */

/* VMS PAL function codes. */
#define	PAL_VMS_ldqp		0x0003			/* P */
#define	PAL_VMS_stqp		0x0004			/* P */
#define	PAL_VMS_mtpr_fen	0x000c			/* P */
#define	PAL_VMS_mtpr_ipir	0x000d			/* P */
#define	PAL_VMS_mfpr_ipl	0x000e			/* P */
#define	PAL_VMS_mtpr_ipl	0x000f			/* P */
#define	PAL_VMS_mfpr_mces	0x0010			/* P */
#define	PAL_VMS_mtpr_mces	0x0011			/* P */
#define	PAL_VMS_mfpr_prbr	0x0013			/* P */
#define	PAL_VMS_mtpr_prbr	0x0014			/* P */
#define	PAL_VMS_mfpr_ptbr	0x0015			/* P */
#define	PAL_VMS_mtpr_scbb	0x0017			/* P */
#define	PAL_VMS_mtpr_sirr	0x0018			/* P */
#define	PAL_VMS_mtpr_tbia	0x001b			/* P */
#define	PAL_VMS_mtpr_tbiap	0x001c			/* P */
#define	PAL_VMS_mtpr_tbis	0x001d			/* P */
#define	PAL_VMS_mfpr_usp	0x0022			/* P */
#define	PAL_VMS_mtpr_usp	0x0023			/* P */
#define	PAL_VMS_mfpr_vptb	0x0029			/* P */
#define	PAL_VMS_mfpr_whami	0x003f			/* P */
#define	PAL_VMS_rei		0x0092			/* U */

/* OSF/1 PAL function codes. */
#define	PAL_OSF1_rdmces		0x0010			/* P */
#define	PAL_OSF1_wrmces		0x0011			/* P */
#define	PAL_OSF1_wrfen		0x002b			/* P */
#define	PAL_OSF1_wrvptptr	0x002d			/* P */
#define	PAL_OSF1_swpctx		0x0030			/* P */
#define	PAL_OSF1_wrval		0x0031			/* P */
#define	PAL_OSF1_rdval		0x0032			/* P */
#define	PAL_OSF1_tbi		0x0033			/* P */
#define	PAL_OSF1_wrent		0x0034			/* P */
#define	PAL_OSF1_swpipl		0x0035			/* P */
#define	PAL_OSF1_rdps		0x0036			/* P */
#define	PAL_OSF1_wrkgp		0x0037			/* P */
#define	PAL_OSF1_wrusp		0x0038			/* P */
#define	PAL_OSF1_wrperfmon	0x0039			/* P */
#define	PAL_OSF1_rdusp		0x003a			/* P */
#define	PAL_OSF1_whami		0x003c			/* P */
#define	PAL_OSF1_retsys		0x003d			/* P */
#define	PAL_OSF1_rti		0x003f			/* P */
#define	PAL_OSF1_callsys	0x0083			/* U */
#define	PAL_OSF1_imb		0x0086			/* U */


code:
/* $OpenBSD: param.h,v 1.39 2013/03/26 05:04:08 deraadt Exp $ */

/*
 * Copyright (c) 1988 University of Utah.
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * the Systems Programming Group of the University of Utah Computer
 * Science Department and Ralph Campbell.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

#ifndef	_MACHINE_PARAM_H_
#define	_MACHINE_PARAM_H_

#define	_MACHINE	alpha
#define	MACHINE		"alpha"
#define	_MACHINE_ARCH	alpha
#define	MACHINE_ARCH	"alpha"
#define	MID_MACHINE	MID_ALPHA

#ifdef _KERNEL
#include <machine/cpu.h>
#endif

#define	PAGE_SHIFT	13
#define	PAGE_SIZE	(1 << PAGE_SHIFT)
#define	PAGE_MASK	(PAGE_SIZE - 1)

#define	KERNBASE	0xfffffc0000580000	/* start of kernel virtual */

#ifdef _KERNEL

#define	NBPG		PAGE_SIZE		/* bytes/page */
#define	PGSHIFT		PAGE_SHIFT		/* LOG2(PAGE_SIZE) */
#define	PGOFSET		PAGE_MASK		/* byte offset into page */

#define	UPAGES		2			/* pages of u-area */
#define	USPACE		(UPAGES * PAGE_SIZE)	/* total size of u-area */
#define	USPACE_ALIGN	0			/* u-area alignment 0-none */

#define	NMBCLUSTERS	4096			/* map size, max cluster allocation */

#ifndef	MSGBUFSIZE
#define	MSGBUFSIZE	(2 * PAGE_SIZE)		/* default message buffer size */
#endif

/*
 * Maximum size of the kernel malloc arena in PAGE_SIZE-sized
 * logical pages.
 */
#define	NKMEMPAGES_MAX_DEFAULT	((128 * 1024 * 1024) >> PAGE_SHIFT)

#ifndef _LOCORE

#include <machine/intr.h>

void	delay(unsigned long);
#define	DELAY(n)	delay(n)

/* XXX THE FOLLOWING PROTOTYPE BELONGS IN INTR.H */
int spl0(void);			/* drop ipl to zero */
/* XXX END INTR.H */

/* XXX THE FOLLOWING PROTOTYPE SHOULD BE A BUS.H INTERFACE */
paddr_t alpha_XXX_dmamap(vaddr_t);
/* XXX END BUS.H */

#endif
#endif /* !_KERNEL */

#endif /* _MACHINE_PARAM_H_ */


code:
/*	$OpenBSD: pcb.h,v 1.11 2015/05/05 02:13:46 guenther Exp $	*/
/*	$NetBSD: pcb.h,v 1.5 1996/11/13 22:21:00 cgd Exp $	*/

/*
 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#ifndef _MACHINE_PCB_H_
#define _MACHINE_PCB_H_

#include <machine/frame.h>
#include <machine/reg.h>

#include <machine/alpha_cpu.h>

/*
 * PCB: process control block
 *
 * In this case, the hardware structure that is the defining element
 * for a process, and the additional state that must be saved by software
 * on a context switch.  Fields marked [HW] are mandated by hardware; fields
 * marked [SW] are for the software.
 *
 * It's said in the VMS PALcode section of the AARM that the pcb address
 * passed to the swpctx PALcode call has to be a physical address.  Not
 * knowing this (and trying a virtual) address proved this correct.
 * So we cache the physical address of the pcb in the md_proc struct.
 */
struct pcb {
	struct alpha_pcb pcb_hw;		/* PALcode defined */
	unsigned long	pcb_context[9];		/* s[0-6], ra, ps	[SW] */
	struct fpreg	pcb_fp;			/* FP registers		[SW] */
	unsigned long	pcb_onfault;		/* for copy faults	[SW] */
	struct cpu_info *volatile pcb_fpcpu;	/* CPU with our FP state[SW] */
};

#ifdef _KERNEL
void savectx(struct pcb *);
#endif

#endif /* _MACHINE_PCB_H_ */


code:
/* $OpenBSD: pmap.h,v 1.36 2015/02/15 21:34:33 miod Exp $ */
/* $NetBSD: pmap.h,v 1.37 2000/11/19 03:16:35 thorpej Exp $ */

/*-
 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
 * NASA Ames Research Center and by Chris G. Demetriou.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 1987 Carnegie-Mellon University
 * Copyright (c) 1991, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * the Systems Programming Group of the University of Utah Computer
 * Science Department.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)pmap.h	8.1 (Berkeley) 6/10/93
 */

#ifndef	_PMAP_MACHINE_
#define	_PMAP_MACHINE_

#include <machine/pte.h>

#ifdef _KERNEL

#include <sys/queue.h>

/*
 * Machine-dependent virtual memory state.
 *
 * If we ever support processor numbers higher than 63, we'll have to
 * rethink the CPU mask.
 *
 * Note pm_asn and pm_asngen are arrays allocated in pmap_create().
 * Their size is based on the PCS count from the HWRPB, and indexed
 * by processor ID (from `whami').
 *
 * The kernel pmap is a special case; it gets statically-allocated
 * arrays which hold enough for ALPHA_MAXPROCS.
 */
struct pmap_asn_info {
	unsigned int		pma_asn;	/* address space number */
	unsigned long		pma_asngen;	/* ASN generation number */
};

struct pmap {
	TAILQ_ENTRY(pmap)	pm_list;	/* list of all pmaps */
	pt_entry_t		*pm_lev1map;	/* level 1 map */
	int			pm_count;	/* pmap reference count */
	struct pmap_statistics	pm_stats;	/* pmap statistics */
	unsigned long		pm_cpus;	/* mask of CPUs using pmap */
	unsigned long		pm_needisync;	/* mask of CPUs needing isync */
	struct pmap_asn_info	pm_asni[1];	/* ASN information */
			/*	variable length		*/
};
typedef struct pmap	*pmap_t;

/*
 * Compute the sizeof of a pmap structure.  Subtract one because one
 * ASN info structure is already included in the pmap structure itself.
 */
#define PMAP_SIZEOF(x)							\
	(ALIGN(sizeof(struct pmap) +					\
	       (sizeof(struct pmap_asn_info) * ((x) - 1))))

#define	PMAP_ASN_RESERVED	0	/* reserved for Lev1map users */

extern struct pmap	kernel_pmap_store[];

#define pmap_kernel()	kernel_pmap_store

/*
 * For each vm_page_t, there is a list of all currently valid virtual
 * mappings of that page.  An entry is a pv_entry_t, the list is pv_table.
 */
typedef struct pv_entry {
	struct pv_entry *pv_next;	/* next pv_entry on list */
	struct pmap	*pv_pmap;	/* pmap where mapping lies */
	vaddr_t		pv_va;		/* virtual address for mapping */
	pt_entry_t	*pv_pte;	/* PTE that maps the VA */
} *pv_entry_t;

/* pvh_attrs */
#define	PGA_MODIFIED		0x01		/* modified */
#define	PGA_REFERENCED		0x02		/* referenced */

/* pvh_usage */
#define	PGU_NORMAL		0		/* free or normal use */
#define	PGU_PVENT		1		/* PV entries */
#define	PGU_L1PT		2		/* level 1 page table */
#define	PGU_L2PT		3		/* level 2 page table */
#define	PGU_L3PT		4		/* level 3 page table */

#define	PGU_ISPTPAGE(pgu)	((pgu) >= PGU_L1PT)

#if defined(NEW_SCC_DRIVER)
#if defined(DEC_KN8AE)
#define	_PMAP_MAY_USE_PROM_CONSOLE
#endif
#else /* ! NEW_SCC_DRIVER */
#if defined(DEC_3000_300)		\
 || defined(DEC_3000_500)		\
 || defined(DEC_KN8AE) 				/* XXX */
#define _PMAP_MAY_USE_PROM_CONSOLE		/* XXX */
#endif						/* XXX */
#endif /* NEW_SCC_DRIVER */

#if defined(MULTIPROCESSOR)
void	pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, u_long *);
void	pmap_tlb_shootnow(u_long);
void	pmap_do_tlb_shootdown(struct cpu_info *, struct trapframe *);
#define	PMAP_TLB_SHOOTDOWN_CPUSET_DECL		u_long shootset = 0;
#define	PMAP_TLB_SHOOTDOWN(pm, va, pte)					\
	pmap_tlb_shootdown((pm), (va), (pte), &shootset)
#define	PMAP_TLB_SHOOTNOW()						\
	pmap_tlb_shootnow(shootset)
#else
#define	PMAP_TLB_SHOOTDOWN_CPUSET_DECL		/* nothing */
#define	PMAP_TLB_SHOOTDOWN(pm, va, pte)		/* nothing */
#define	PMAP_TLB_SHOOTNOW()			/* nothing */
#endif /* MULTIPROCESSOR */

#define	pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
#define	pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)

#define pmap_copy(dp, sp, da, l, sa)	/* nothing */
#define pmap_update(pmap)		/* nothing (yet) */

#define pmap_proc_iflush(p, va, len)	/* nothing */
#define pmap_unuse_final(p)		/* nothing */
#define	pmap_remove_holes(vm)		do { /* nothing */ } while (0)

extern	pt_entry_t *VPT;		/* Virtual Page Table */

#define	PMAP_STEAL_MEMORY		/* enable pmap_steal_memory() */
#define PMAP_GROWKERNEL			/* enable pmap_growkernel() */

/*
 * Alternate mapping hooks for pool pages.  Avoids thrashing the TLB.
 */
#define	pmap_map_direct(pg)	ALPHA_PHYS_TO_K0SEG(VM_PAGE_TO_PHYS(pg))
#define	pmap_unmap_direct(va)	PHYS_TO_VM_PAGE(ALPHA_K0SEG_TO_PHYS((va)))
#define	__HAVE_PMAP_DIRECT

paddr_t vtophys(vaddr_t);

/* Machine-specific functions. */
void	pmap_bootstrap(paddr_t ptaddr, u_int maxasn, u_long ncpuids);
int	pmap_emulate_reference(struct proc *p, vaddr_t v, int user, int type);
#ifdef _PMAP_MAY_USE_PROM_CONSOLE
int	pmap_uses_prom_console(void);
#endif

#define	pmap_pte_pa(pte)	(PG_PFNUM(*(pte)) << PAGE_SHIFT)
#define	pmap_pte_prot(pte)	(*(pte) & PG_PROT)
#define	pmap_pte_w(pte)		(*(pte) & PG_WIRED)
#define	pmap_pte_v(pte)		(*(pte) & PG_V)
#define	pmap_pte_pv(pte)	(*(pte) & PG_PVLIST)
#define	pmap_pte_asm(pte)	(*(pte) & PG_ASM)
#define	pmap_pte_exec(pte)	(*(pte) & PG_EXEC)

#define	pmap_pte_set_w(pte, v)						\
do {									\
	if (v)								\
		*(pte) |= PG_WIRED;					\
	else								\
		*(pte) &= ~PG_WIRED;					\
} while (0)

#define	pmap_pte_w_chg(pte, nw)	((nw) ^ pmap_pte_w(pte))

#define	pmap_pte_set_prot(pte, np)					\
do {									\
	*(pte) &= ~PG_PROT;						\
	*(pte) |= (np);							\
} while (0)

#define	pmap_pte_prot_chg(pte, np) ((np) ^ pmap_pte_prot(pte))

static __inline pt_entry_t *pmap_l2pte(pmap_t, vaddr_t, pt_entry_t *);
static __inline pt_entry_t *pmap_l3pte(pmap_t, vaddr_t, pt_entry_t *);

#define	pmap_l1pte(pmap, v)						\
	(&(pmap)->pm_lev1map[l1pte_index((vaddr_t)(v))])

static __inline pt_entry_t *
pmap_l2pte(pmap, v, l1pte)
	pmap_t pmap;
	vaddr_t v;
	pt_entry_t *l1pte;
{
	pt_entry_t *lev2map;

	if (l1pte == NULL) {
		l1pte = pmap_l1pte(pmap, v);
		if (pmap_pte_v(l1pte) == 0)
			return (NULL);
	}

	lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte));
	return (&lev2map[l2pte_index(v)]);
}

static __inline pt_entry_t *
pmap_l3pte(pmap, v, l2pte)
	pmap_t pmap;
	vaddr_t v;
	pt_entry_t *l2pte;
{
	pt_entry_t *l1pte, *lev2map, *lev3map;

	if (l2pte == NULL) {
		l1pte = pmap_l1pte(pmap, v);
		if (pmap_pte_v(l1pte) == 0)
			return (NULL);

		lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte));
		l2pte = &lev2map[l2pte_index(v)];
		if (pmap_pte_v(l2pte) == 0)
			return (NULL);
	}

	lev3map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l2pte));
	return (&lev3map[l3pte_index(v)]);
}

/*
 * Macro for processing deferred I-stream synchronization.
 *
 * The pmap module may defer syncing the user I-stream until the
 * return to userspace, since the IMB PALcode op can be quite
 * expensive.  Since user instructions won't be executed until the
 * return to userspace, this can be deferred until just before userret().
 */
#define	PMAP_USERRET(pmap)						\
do {									\
	u_long cpu_mask = (1UL << cpu_number());			\
									\
	if ((pmap)->pm_needisync & cpu_mask) {				\
		atomic_clearbits_ulong(&(pmap)->pm_needisync,		\
		    cpu_mask);						\
		alpha_pal_imb();					\
	}								\
} while (0)

#endif /* _KERNEL */

/*
 * pmap-specific data stored in the vm_page structure.
 */
struct vm_page_md {
	struct pv_entry *pvh_list;	/* pv entry list */
	int pvh_attrs;			/* page attributes */
};

#define	VM_MDPAGE_INIT(pg)						\
do {									\
	(pg)->mdpage.pvh_list = NULL;					\
	(pg)->mdpage.pvh_attrs = 0;					\
} while (0)

#endif /* _PMAP_MACHINE_ */


code:
/*	$OpenBSD: proc.h,v 1.11 2012/11/01 21:09:17 miod Exp $	*/
/*	$NetBSD: proc.h,v 1.2 1995/03/24 15:01:36 cgd Exp $	*/

/*
 * Copyright (c) 1994, 1995 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#include <machine/cpu.h>
/*
 * Machine-dependent part of the proc struct for the Alpha.
 */

struct mdbpt {
	vaddr_t	addr;
	u_int32_t contents;
};

struct mdproc {
	u_int md_flags;
	volatile u_int md_astpending;	/* AST pending for this process */
	struct trapframe *md_tf;	/* trap/syscall registers */
	struct pcb *md_pcbpaddr;	/* phys addr of the pcb */
	struct mdbpt md_sstep[2];	/* two breakpoints for sstep */
};

/*
 * md_flags usage
 * --------------
 * MDP_FPUSED
 *      A largely unused bit indicating the presence of FPU history.
 *      Cleared on exec. Set but not used by the fpu context switcher
 *      itself.
 *
 * MDP_FP_C
 *      The architected FP Control word. It should forever begin at bit 1,
 *      as the bits are AARM specified and this way it doesn't need to be
 *      shifted.
 *
 *      Until C99 there was never an IEEE 754 API, making most of the
 *      standard useless.  Because of overlapping AARM, OSF/1, NetBSD, and
 *      C99 API's, the use of the MDP_FP_C bits is defined variously in
 *      ieeefp.h and fpu.h.
 */
#define	MDP_FPUSED	0x00000001		/* Process used the FPU */
#ifndef NO_IEEE
#define	MDP_FP_C	0x007ffffe	/* Extended FP_C Quadword bits */
#endif
#define MDP_STEP1	0x00800000	/* Single step normal */
#define MDP_STEP2	0x01800000	/* Single step branch */


code:
/*	$OpenBSD: profile.h,v 1.5 1997/01/24 19:57:17 niklas Exp $	*/
/*	$NetBSD: profile.h,v 1.7 1996/11/13 22:21:01 cgd Exp $	*/

/*
 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#define	_MCOUNT_DECL	void mcount

#if 0
/*
 * XXX The definition of MCOUNT below is really the following code, run
 * XXX through cpp, since the inline assembly isn't preprocessed.
 */
#define	OFFSET_AT	0
#define OFFSET_V0	8
#define OFFSET_T0	16
#define OFFSET_T1	24
#define OFFSET_T2	32
#define OFFSET_T3	40
#define OFFSET_T4	48
#define OFFSET_T5	56
#define OFFSET_T6	64
#define OFFSET_T7	72
#define OFFSET_S6	80
#define OFFSET_A0	88
#define OFFSET_A1	96
#define OFFSET_A2	104
#define OFFSET_A3	112
#define OFFSET_A4	120
#define OFFSET_A5	128
#define OFFSET_T8	136
#define OFFSET_T9	144
#define OFFSET_T10	152
#define OFFSET_T11	160
#define OFFSET_RA	168
#define OFFSET_T12	176
#define OFFSET_GP	184
#define	FRAME_SIZE	192

LEAF(_mcount,0)			/* XXX */
	.set noat
	.set noreorder

	lda	sp, -FRAME_SIZE(sp)

	stq	at_reg, OFFSET_AT(sp)
	stq	v0, OFFSET_V0(sp)
	stq	t0, OFFSET_T0(sp)
	stq	t1, OFFSET_T1(sp)
	stq	t2, OFFSET_T2(sp)
	stq	t3, OFFSET_T3(sp)
	stq	t4, OFFSET_T4(sp)
	stq	t5, OFFSET_T5(sp)
	stq	t6, OFFSET_T6(sp)
	stq	t7, OFFSET_T7(sp)
	stq	s6, OFFSET_S6(sp)	/* XXX because run _after_ prologue. */
	stq	a0, OFFSET_A0(sp)
	stq	a1, OFFSET_A1(sp)
	stq	a2, OFFSET_A2(sp)
	stq	a3, OFFSET_A3(sp)
	stq	a4, OFFSET_A4(sp)
	stq	a5, OFFSET_A5(sp)
	stq	t8, OFFSET_T8(sp)
	stq	t9, OFFSET_T9(sp)
	stq	t10, OFFSET_T10(sp)
	stq	t11, OFFSET_T11(sp)
	stq	ra, OFFSET_RA(sp)
	stq	t12, OFFSET_T12(sp)
	stq	gp, OFFSET_GP(sp)

	br	pv, LX99
LX99:	SETGP(pv)
	mov	ra, a0
	mov	at_reg, a1
	CALL(mcount)

	ldq	v0, OFFSET_V0(sp)
	ldq	t0, OFFSET_T0(sp)
	ldq	t1, OFFSET_T1(sp)
	ldq	t2, OFFSET_T2(sp)
	ldq	t3, OFFSET_T3(sp)
	ldq	t4, OFFSET_T4(sp)
	ldq	t5, OFFSET_T5(sp)
	ldq	t6, OFFSET_T6(sp)
	ldq	t7, OFFSET_T7(sp)
	ldq	s6, OFFSET_S6(sp)	/* XXX because run _after_ prologue. */
	ldq	a0, OFFSET_A0(sp)
	ldq	a1, OFFSET_A1(sp)
	ldq	a2, OFFSET_A2(sp)
	ldq	a3, OFFSET_A3(sp)
	ldq	a4, OFFSET_A4(sp)
	ldq	a5, OFFSET_A5(sp)
	ldq	t8, OFFSET_T8(sp)
	ldq	t9, OFFSET_T9(sp)
	ldq	t10, OFFSET_T10(sp)
	ldq	t11, OFFSET_T11(sp)
	ldq	ra, OFFSET_RA(sp)
	stq	t12, OFFSET_T12(sp)
	ldq	gp, OFFSET_GP(sp)

	ldq	at_reg, OFFSET_AT(sp)

	lda	sp, FRAME_SIZE(sp)
	ret	zero, (at_reg), 1

	END(_mcount)
#endif /* 0 */

#define MCOUNT asm("		\
	.globl	_mcount;	\
	.ent	_mcount 0;	\
_mcount:;			\
	.frame	$30,0,$26;	\
	.set noat;		\
	.set noreorder;		\
				\
	lda	$30, -192($30);	\
				\
	stq	$28, 0($30);	\
	stq	$0, 8($30);	\
	stq	$1, 16($30);	\
	stq	$2, 24($30);	\
	stq	$3, 32($30);	\
	stq	$4, 40($30);	\
	stq	$5, 48($30);	\
	stq	$6, 56($30);	\
	stq	$7, 64($30);	\
	stq	$8, 72($30);	\
	stq	$15, 80($30);	\
	stq	$16, 88($30);	\
	stq	$17, 96($30);	\
	stq	$18, 104($30);	\
	stq	$19, 112($30);	\
	stq	$20, 120($30);	\
	stq	$21, 128($30);	\
	stq	$22, 136($30);	\
	stq	$23, 144($30);	\
	stq	$24, 152($30);	\
	stq	$25, 160($30);	\
	stq	$26, 168($30);	\
	stq	$27, 176($30);	\
	stq	$29, 184($30);	\
				\
	br	$27, LX98;	\
LX98:	ldgp	$29,0($27);	\
	mov	$26, $16;	\
	mov	$28, $17;	\
	jsr	$26,mcount;	\
	ldgp	$29,0($26);	\
				\
	ldq	$0, 8($30);	\
	ldq	$1, 16($30);	\
	ldq	$2, 24($30);	\
	ldq	$3, 32($30);	\
	ldq	$4, 40($30);	\
	ldq	$5, 48($30);	\
	ldq	$6, 56($30);	\
	ldq	$7, 64($30);	\
	ldq	$8, 72($30);	\
	ldq	$15, 80($30);	\
	ldq	$16, 88($30);	\
	ldq	$17, 96($30);	\
	ldq	$18, 104($30);	\
	ldq	$19, 112($30);	\
	ldq	$20, 120($30);	\
	ldq	$21, 128($30);	\
	ldq	$22, 136($30);	\
	ldq	$23, 144($30);	\
	ldq	$24, 152($30);	\
	ldq	$25, 160($30);	\
	ldq	$25, 160($30);	\
	ldq	$26, 168($30);	\
	ldq	$27, 176($30);	\
	ldq	$29, 184($30);	\
				\
	lda	$30, 192($30);	\
	ret	$31, ($28), 1;	\
				\
	.end	_mcount");

#ifdef _KERNEL
/*
 * The following two macros do splhigh and splx respectively.
 * _alpha_pal_swpipl is a special version of alpha_pal_swpipl which
 * doesn't include profiling support.
 *
 * XXX These macros should probably use inline assembly.
 */
#define MCOUNT_ENTER \
	s = _alpha_pal_swpipl(ALPHA_PSL_IPL_HIGH)
#define MCOUNT_EXIT \
	(void)_alpha_pal_swpipl(s);
#endif


code:
/* $OpenBSD: prom.h,v 1.10 2014/12/18 10:45:29 dlg Exp $ */
/* $NetBSD: prom.h,v 1.12 2000/06/08 03:10:06 thorpej Exp $ */

/*
 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Keith Bostic, Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#ifndef	ASSEMBLER
struct prom_vec {
	u_int64_t	routine;
	void		*routine_arg;
};

/* The return value from a prom call. */
typedef union {
	struct {
		u_int64_t
			retval	: 32,		/* return value. */
			unit	: 8,
			mbz	: 8,
			error	: 13,
			status	: 3;
	} u;
	u_int64_t bits;
} prom_return_t;

#ifdef _STANDALONE
int	getchar(void);
void	putchar(int);
#endif

void	prom_halt(int) __attribute__((__noreturn__));
int	prom_getenv(int, char *, int);

void	hwrpb_primary_init(void);
void	hwrpb_restart_setup(void);
#endif

/* Prom operation values. */
#define	PROM_R_CLOSE		0x11
#define	PROM_R_GETC		0x01
#define	PROM_R_GETENV		0x22
#define	PROM_R_OPEN		0x10
#define	PROM_R_PUTS		0x02
#define	PROM_R_READ		0x13
#define	PROM_R_WRITE		0x14
#define	PROM_R_IOCTL		0x12

/* Prom IOCTL operation subcodes */
#define	PROM_I_SKIP2IRG		1
#define	PROM_I_SKIP2MARK	2
#define	PROM_I_REWIND		3
#define	PROM_I_WRITEMARK	4

/* Environment variable values. */
#define	PROM_E_BOOTED_DEV	0x4
#define	PROM_E_BOOTED_FILE	0x6
#define	PROM_E_BOOTED_OSFLAGS	0x8
#define	PROM_E_TTY_DEV		0xf
#define	PROM_E_SCSIID		0x42
#define	PROM_E_SCSIFAST		0x43

#if defined(_STANDALONE) || defined(ENABLEPROM)
/*
 * These can't be called from the kernel without great care.
 *
 * There have to be stub routines to do the copying that ensures that the
 * PROM doesn't get called with an address larger than 32 bits.  Calls that
 * either don't need to copy anything, or don't need the copy because it's
 * already being done elsewhere, are defined here.
 */
#define	prom_open(dev, len)						\
	prom_dispatch(PROM_R_OPEN, (dev), (len), 0, 0)
#define	prom_close(chan)						\
	prom_dispatch(PROM_R_CLOSE, chan, 0, 0, 0)
#define	prom_read(chan, len, buf, blkno)				\
	prom_dispatch(PROM_R_READ, chan, len, (u_int64_t)buf, blkno)
#define	prom_write(chan, len, buf, blkno)				\
	prom_dispatch(PROM_R_WRITE, chan, len, (u_int64_t)buf, blkno)
#define	prom_ioctl(chan, op, count)					\
	prom_dispatch(PROM_R_IOCTL, chan, op, (int64_t)count, 0, 0)
#define	prom_putstr(chan, str, len)					\
	prom_dispatch(PROM_R_PUTS, chan, (u_int64_t)str, len, 0)
#define	prom_getc(chan)							\
	prom_dispatch(PROM_R_GETC, chan, 0, 0, 0)
#define prom_getenv_disp(id, buf, len)					\
	prom_dispatch(PROM_R_GETENV, id, (u_int64_t)buf, len, 0)
#endif

#ifndef ASSEMBLER
#ifdef _KERNEL
void	promcnputc(dev_t, int);
int	promcngetc(dev_t);
int	promcnlookc(dev_t, char *);

u_int64_t	prom_dispatch(u_int64_t, u_int64_t, u_int64_t, u_int64_t,
		    u_int64_t);
#endif /* _KERNEL */
#endif /* ASSEMBLER */


code:
/* $OpenBSD: pte.h,v 1.12 2014/01/26 17:40:11 miod Exp $ */
/* $NetBSD: pte.h,v 1.26 1999/04/09 00:38:11 thorpej Exp $ */

/*-
 * Copyright (c) 1998 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
 * NASA Ames Research Center.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#ifndef _MACHINE_PTE_H_
#define	_MACHINE_PTE_H_

/*
 * Alpha page table entry.
 * Things which are in the VMS PALcode but not in the OSF PALcode
 * are marked with "(VMS)".
 *
 * This information derived from pp. (II) 3-3 - (II) 3-6 and
 * (III) 3-3 - (III) 3-5 of the "Alpha Architecture Reference Manual" by
 * Richard L. Sites.
 */

/*
 * Alpha Page Table Entry
 */

#include <machine/alpha_cpu.h>

typedef	alpha_pt_entry_t	pt_entry_t;

#define	PT_ENTRY_NULL	((pt_entry_t *) 0)
#define	PTESHIFT	3			/* pte size == 1 << PTESHIFT */

#define	PG_V		ALPHA_PTE_VALID
#define	PG_NV		0
#define	PG_FOR		ALPHA_PTE_FAULT_ON_READ
#define	PG_FOW		ALPHA_PTE_FAULT_ON_WRITE
#define	PG_FOE		ALPHA_PTE_FAULT_ON_EXECUTE
#define	PG_ASM		ALPHA_PTE_ASM
#define	PG_GH		ALPHA_PTE_GRANULARITY
#define	PG_KRE		ALPHA_PTE_KR
#define	PG_URE		ALPHA_PTE_UR
#define	PG_KWE		ALPHA_PTE_KW
#define	PG_UWE		ALPHA_PTE_UW
#define	PG_PROT		(ALPHA_PTE_PROT | PG_EXEC | PG_FOE)
#define	PG_RSVD		0x000000000000cc80	/* Reserved for hardware */
#define	PG_WIRED	0x0000000000010000	/* Wired. [SOFTWARE] */
#define	PG_PVLIST	0x0000000000020000	/* on pv list [SOFTWARE] */
#define	PG_EXEC		0x0000000000040000	/* execute perms [SOFTWARE] */
#define	PG_FRAME	ALPHA_PTE_PFN
#define	PG_SHIFT	32
#define	PG_PFNUM(x)	ALPHA_PTE_TO_PFN(x)

/*
 * These are the PALcode PTE bits that we care about when checking to see
 * if a PTE has changed in such a way as to require a TBI.
 */
#define	PG_PALCODE(x)	((x) & ALPHA_PTE_PALCODE)

#if defined(_KERNEL) || defined(__KVM_ALPHA_PRIVATE)
#define	NPTEPG_SHIFT	(PAGE_SHIFT - PTESHIFT)
#define	NPTEPG		(1L << NPTEPG_SHIFT)

#define	PTEMASK		(NPTEPG - 1)

#define	l3pte_index(va)	\
	(((vaddr_t)(va) >> PAGE_SHIFT) & PTEMASK)

#define	l2pte_index(va)	\
	(((vaddr_t)(va) >> (PAGE_SHIFT + NPTEPG_SHIFT)) & PTEMASK)

#define	l1pte_index(va) \
	(((vaddr_t)(va) >> (PAGE_SHIFT + 2 * NPTEPG_SHIFT)) & PTEMASK)

#define	VPT_INDEX(va)	\
	(((vaddr_t)(va) >> PAGE_SHIFT) & ((1 << 3 * NPTEPG_SHIFT) - 1))

/* Space mapped by one level 1 PTE */
#define	ALPHA_L1SEG_SIZE	(1L << ((2 * NPTEPG_SHIFT) + PAGE_SHIFT))

/* Space mapped by one level 2 PTE */
#define	ALPHA_L2SEG_SIZE	(1L << (NPTEPG_SHIFT + PAGE_SHIFT))

#define	alpha_trunc_l1seg(x)	(((u_long)(x)) & ~(ALPHA_L1SEG_SIZE-1))
#define	alpha_trunc_l2seg(x)	(((u_long)(x)) & ~(ALPHA_L2SEG_SIZE-1))
#endif /* _KERNEL || __KVM_ALPHA_PRIVATE */

#ifdef _KERNEL
extern	pt_entry_t *kernel_lev1map;	/* kernel level 1 page table */
#endif /* _KERNEL */

#endif /* ! _MACHINE_PTE_H_ */


code:
/*	$OpenBSD: ptrace.h,v 1.5 2011/03/23 16:54:34 pirofti Exp $	*/
/*	$NetBSD: ptrace.h,v 1.1 1995/02/13 23:07:51 cgd Exp $	*/

/*
 * Copyright (c) 1994 Christopher G. Demetriou
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Christopher G. Demetriou.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_PTRACE_H_
#define _MACHINE_PTRACE_H_

/*
 * Alpha-dependent ptrace definitions.
 */
#define PT_GETREGS      (PT_FIRSTMACH + 0)
#define PT_SETREGS      (PT_FIRSTMACH + 1)
#define PT_GETFPREGS    (PT_FIRSTMACH + 2)
#define PT_SETFPREGS    (PT_FIRSTMACH + 3)
#define PT_STEP		(PT_FIRSTMACH + 4)

#define FIX_SSTEP(p)	process_sstep(p, 0)

#endif