code:
/*	$OpenBSD: armish_machdep.c,v 1.39 2015/05/10 15:56:28 jsg Exp $ */
/*	$NetBSD: lubbock_machdep.c,v 1.2 2003/07/15 00:25:06 lukem Exp $ */

/*
 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 1997,1998 Mark Brinicombe.
 * Copyright (c) 1997,1998 Causality Limited.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by Mark Brinicombe
 *	for the NetBSD Project.
 * 4. The name of the company nor the name of the author may be used to
 *    endorse or promote products derived from this software without specific
 *    prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * Machine dependant functions for kernel setup for Intel IQ80321 evaluation
 * boards using RedBoot firmware.
 */

/*
 * DIP switches:
 *
 * S19: no-dot: set RB_KDB.  enter kgdb session.
 * S20: no-dot: set RB_SINGLE. don't go multi user mode.
 */

#include <sys/param.h>
#include <sys/device.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/exec.h>
#include <sys/proc.h>
#include <sys/msgbuf.h>
#include <sys/reboot.h>
#include <sys/termios.h>
#include <sys/kcore.h>

#include <uvm/uvm_extern.h>

#include <sys/conf.h>
#include <sys/queue.h>
#include <dev/cons.h>
#include <sys/socket.h>

#include <machine/db_machdep.h>
#include <ddb/db_sym.h>
#include <ddb/db_extern.h>

#include <net/if.h>

#include <machine/bootconfig.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/frame.h>
#include <arm/kcore.h>
#include <arm/undefined.h>
#include <arm/machdep.h>

#include <arm/xscale/i80321reg.h>
#include <arm/xscale/i80321var.h>

#include <armish/dev/iq80321reg.h>
#include <armish/dev/iq80321var.h>
#include <armish/dev/obiovar.h>

/* Kernel text starts 2MB in from the bottom of the kernel address space. */
#define	KERNEL_TEXT_BASE	(KERNEL_BASE + 0x00200000)
#define	KERNEL_VM_BASE		(KERNEL_BASE + 0x10000000)
#define KERNEL_VM_SIZE		VM_KERNEL_SPACE_SIZE

/*
 * Address to call from cpu_reset() to reset the machine.
 * This is machine architecture dependant as it varies depending
 * on where the ROM appears when you turn the MMU off.
 */

u_int cpu_reset_address = 0;

/* Define various stack sizes in pages */
#define IRQ_STACK_SIZE	1
#define ABT_STACK_SIZE	1
#define UND_STACK_SIZE	1

BootConfig bootconfig;		/* Boot config storage */
char *boot_args = NULL;
char *boot_file = NULL;

paddr_t physical_start;
paddr_t physical_freestart;
paddr_t physical_freeend;
paddr_t physical_end;
u_int free_pages;
paddr_t pagetables_start;
int physmem = 0;

/*int debug_flags;*/
#ifndef PMAP_STATIC_L1S
int max_processes = 64;			/* Default number */
#endif	/* !PMAP_STATIC_L1S */

/* Physical and virtual addresses for some global pages */
pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
extern pv_addr_t kernelstack;
pv_addr_t minidataclean;

paddr_t msgbufphys;

extern u_int data_abort_handler_address;
extern u_int prefetch_abort_handler_address;
extern u_int undefined_handler_address;

#ifdef PMAP_DEBUG
extern int pmap_debug_level;
#endif

#define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */

#define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
#define	KERNEL_PT_KERNEL_NUM	32

					/* L2 table for mapping i80312 */
//#define	KERNEL_PT_IOPXS		(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)

					/* L2 tables for mapping kernel VM */
//#define KERNEL_PT_VMDATA	(KERNEL_PT_IOPXS + 1)
#define KERNEL_PT_VMDATA	(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
#define	KERNEL_PT_VMDATA_NUM	8	/* start with 16MB of KVM */
#define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)

pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];

extern struct user *proc0paddr;

/*
 * safepri is a safe priority for sleep to set for a spin-wait
 * during autoconfiguration or after a panic.
 */
int   safepri = 0;

/* Prototypes */

#define	BOOT_STRING_MAGIC 0x4f425344

char	bootargs[MAX_BOOT_STRING];
void	process_kernel_args(char *);

void	consinit(void);

#include "com.h"
#if NCOM > 0
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#endif

#ifndef CONSPEED
#define CONSPEED B115200	/* What RedBoot uses */
#endif
#ifndef CONMODE
#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8 | CLOCAL) /* 8N1 */
#endif

int comcnspeed = CONSPEED;
int comcnmode = CONMODE;

/*
 * void boot(int howto)
 *
 * Reboots the system
 *
 * Deal with any syncing, unmounting, dumping and shutdown hooks,
 * then reset the CPU.
 */
void	board_reset(void);
void	board_powerdown(void);
__dead void
boot(int howto)
{
	if (cold) {
		if ((howto & RB_USERREQ) == 0)
			howto |=  RB_HALT;
		goto haltsys;
	}

	/*
	 * If RB_NOSYNC was not specified sync the discs.
	 * Note: Unless cold is set to 1 here, syslogd will die during the
	 * unmount.  It looks like syslogd is getting woken up only to find
	 * that it cannot page part of the binary in as the filesystem has
	 * been unmounted.
	 */
	if ((howto & RB_NOSYNC) == 0)
		bootsync(howto);

	if_downall();

	uvm_shutdown();
	splhigh();
	cold = 1;

	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
		dumpsys();

haltsys:
	config_suspend_all(DVACT_POWERDOWN);

	/* Make sure IRQ's are disabled */
	IRQdisable;

	if ((howto & RB_HALT) != 0) {
		if ((howto & RB_POWERDOWN) != 0) {
			board_powerdown();
			printf("WARNING: powerdown failed!\n");
		}

		printf("The operating system has halted.\n");
		printf("Please press any key to reboot.\n\n");
		cnpollc(1);
		cngetc();
		cnpollc(0);
	}

	printf("rebooting...\n");

	board_reset();
	cpu_reset();
	printf("reboot failed; spinning\n");
	for (;;) ;
	/* NOTREACHED */
}

/*
 * Mapping table for core kernel memory. These areas are mapped in
 * init time at fixed virtual address with section mappings.
 */
const struct pmap_devmap iq80321_devmap[] = {
    /*
     * Map the on-board devices VA == PA so that we can access them
     * with the MMU on or off.
     */
    {
	IQ80321_OBIO_BASE,
	IQ80321_OBIO_BASE,
	0x00100000 /*	IQ80321_OBIO_SIZE, */,
	PROT_READ | PROT_WRITE,
	PTE_NOCACHE,
    },
    {0, 0, 0, 0, 0}
};

/*
 * u_int initarm(...)
 *
 * Initial entry point on startup. This gets called before main() is
 * entered.
 * It should be responsible for setting up everything that must be
 * in place when main is called.
 * This includes
 *   Taking a copy of the boot configuration structure.
 *   Initialising the physical console so characters can be printed.
 *   Setting up page tables for the kernel
 *   Relocating the kernel to the bottom of physical memory
 */
u_int
initarm(void *arg0, void *arg1, void *arg2)
{
	extern vaddr_t xscale_cache_clean_addr;
	extern cpu_kcore_hdr_t cpu_kcore_hdr;
	int loop;
	int loop1;
	u_int l1pagetable;
	pv_addr_t kernel_l1pt;
	paddr_t memstart;
	psize_t memsize;
	extern u_int32_t esym;	/* &_end if no symbols are loaded */

#ifdef DIAGNOSTIC
	extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */
#endif

	/* setup a serial console for very early boot */
	consinit();

	/*
	 * Heads up ... Setup the CPU / MMU / TLB functions
	 */
	if (set_cpufuncs())
		panic("cpu not recognized!");

	/*
	 * Examine the boot args string for options we need to know about
	 * now.
	 */
	/* XXX should really be done after setting up the console, but we
	 * XXX need to parse the console selection flags right now. */
	process_kernel_args((char *)0xa0200000 - MAX_BOOT_STRING - 1);

	/* Calibrate the delay loop. */
#if 1
	i80321_calibrate_delay();
#endif

	/* Talk to the user */
	printf("\nOpenBSD/armish booting ...\n");

	/*
	 * Reset the secondary PCI bus.  RedBoot doesn't stop devices
	 * on the PCI bus before handing us control, so we have to
	 * do this.
	 *
	 * XXX This is arguably a bug in RedBoot, and doing this reset
	 * XXX could be problematic in the future if we encounter an
	 * XXX application where the PPB in the i80312 is used as a
	 * XXX PPB.
	 */
//#define VERBOSE_INIT_ARM

	/*
	 * Fetch the SDRAM start/size from the i80312 SDRAM configuration
	 * registers.
	 */
	i80321_sdram_bounds(&obio_bs_tag, VERDE_PMMR_BASE + VERDE_MCU_BASE,
	    &memstart, &memsize);

#define DEBUG
#ifdef DEBUG
	printf("initarm: Configuring system ...\n");
#endif

	/* Fake bootconfig structure for the benefit of pmap.c */
	/* XXX must make the memory description h/w independant */
	bootconfig.dramblocks = 1;
	bootconfig.dram[0].address = memstart;
	bootconfig.dram[0].pages = memsize / PAGE_SIZE;

	/*
	 * Set up the variables that define the availablilty of
	 * physical memory.  For now, we're going to set
	 * physical_freestart to 0xa0200000 (where the kernel
	 * was loaded), and allocate the memory we need downwards.
	 * If we get too close to the page tables that RedBoot
	 * set up, we will panic.  We will update physical_freestart
	 * and physical_freeend later to reflect what pmap_bootstrap()
	 * wants to see.
	 *
	 * XXX pmap_bootstrap() needs an enema.
	 */
	physical_start = bootconfig.dram[0].address;
	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);

	physical_freestart = 0xa0009000UL;
	physical_freeend = 0xa0200000UL;

	physmem = (physical_end - physical_start) / PAGE_SIZE;

#ifdef DEBUG
	/* Tell the user about the memory */
	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
	    physical_start, physical_end - 1);
#endif

	/*
	 * Okay, the kernel starts 2MB in from the bottom of physical
	 * memory.  We are going to allocate our bootstrap pages downwards
	 * from there.
	 *
	 * We need to allocate some fixed page tables to get the kernel
	 * going.  We allocate one page directory and a number of page
	 * tables and store the physical addresses in the kernel_pt_table
	 * array.
	 *
	 * The kernel page directory must be on a 16K boundary.  The page
	 * tables must be on 4K boundaries.  What we do is allocate the
	 * page directory on the first 16K boundary that we encounter, and
	 * the page tables on 4K boundaries otherwise.  Since we allocate
	 * at least 3 L2 page tables, we are guaranteed to encounter at
	 * least one 16K aligned region.
	 */

#ifdef VERBOSE_INIT_ARM
	printf("Allocating page tables\n");
#endif

	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;

#ifdef VERBOSE_INIT_ARM
	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
	       physical_freestart, free_pages, free_pages);
#endif

	/* Define a macro to simplify memory allocation */
#define	valloc_pages(var, np)				\
	alloc_pages((var).pv_pa, (np));			\
	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;

#define alloc_pages(var, np)				\
	physical_freeend -= ((np) * PAGE_SIZE);		\
	if (physical_freeend < physical_freestart)	\
		panic("initarm: out of memory");	\
	(var) = physical_freeend;			\
	free_pages -= (np);				\
	memset((char *)(var), 0, ((np) * PAGE_SIZE));

	loop1 = 0;
	kernel_l1pt.pv_pa = 0;
	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
		/* Are we 16KB aligned for an L1 ? */
		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
		    && kernel_l1pt.pv_pa == 0) {
			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
		} else {
			valloc_pages(kernel_pt_table[loop1],
			    L2_TABLE_SIZE / PAGE_SIZE);
			++loop1;
		}
	}

	/* This should never be able to happen but better confirm that. */
	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
		panic("initarm: Failed to align the kernel page directory");

	/*
	 * Allocate a page for the system page mapped to V0x00000000
	 * This page will just contain the system vectors and can be
	 * shared by all processes.
	 */
	alloc_pages(systempage.pv_pa, 1);

	/* Allocate stacks for all modes */
	valloc_pages(irqstack, IRQ_STACK_SIZE);
	valloc_pages(abtstack, ABT_STACK_SIZE);
	valloc_pages(undstack, UND_STACK_SIZE);
	valloc_pages(kernelstack, UPAGES);

	/* Allocate enough pages for cleaning the Mini-Data cache. */
	KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
	valloc_pages(minidataclean, 1);

#ifdef VERBOSE_INIT_ARM
	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
	    irqstack.pv_va);
	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
	    abtstack.pv_va);
	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
	    undstack.pv_va);
	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
	    kernelstack.pv_va);
#endif

	/*
	 * XXX Defer this to later so that we can reclaim the memory
	 * XXX used by the RedBoot page tables.
	 */
	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);

	/*
	 * Ok we have allocated physical pages for the primary kernel
	 * page tables
	 */

#ifdef VERBOSE_INIT_ARM
	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
#endif

	/*
	 * Now we start construction of the L1 page table
	 * We start by mapping the L2 page tables into the L1.
	 * This means that we can replace L1 mappings later on if necessary
	 */
	l1pagetable = kernel_l1pt.pv_pa;

#ifdef HIGH_VECT
	/* Map the L2 pages tables in the L1 page table */
	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
	    &kernel_pt_table[KERNEL_PT_SYS]);
#else
	/* Map the L2 pages tables in the L1 page table */
	pmap_link_l2pt(l1pagetable, 0x00000000,
	    &kernel_pt_table[KERNEL_PT_SYS]);
#endif
	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
#if 0
	pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
	    &kernel_pt_table[KERNEL_PT_IOPXS]);
#endif

	/* update the top of the kernel VM */
	pmap_curmaxkvaddr =
	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);

#ifdef VERBOSE_INIT_ARM
	printf("Mapping kernel\n");
#endif

	/* Now we fill in the L2 pagetable for the kernel static code/data
	 * and the symbol table. */
	{
		extern char etext[];
#ifdef VERBOSE_INIT_ARM
		extern char _end[];
#endif
		size_t textsize = (u_int32_t) etext - KERNEL_TEXT_BASE;
		size_t totalsize = esym - KERNEL_TEXT_BASE;
		u_int logical;

#ifdef VERBOSE_INIT_ARM
		printf("kernelsize text %x total %x end %xesym %x\n",
		    textsize, totalsize, _end, esym);
#endif

		textsize = round_page(textsize);
		totalsize = round_page(totalsize);

		logical = 0x00200000;	/* offset of kernel in RAM */

		/* Update dump information */
		cpu_kcore_hdr.kernelbase = KERNEL_BASE;
		cpu_kcore_hdr.kerneloffs = logical;
		cpu_kcore_hdr.staticsize = totalsize;

		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
		    physical_start + logical, textsize,
		    PROT_READ | PROT_WRITE, PTE_CACHE);
		pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
		    physical_start + logical, totalsize - textsize,
		    PROT_READ | PROT_WRITE, PTE_CACHE);
	}

#ifdef VERBOSE_INIT_ARM
	printf("Constructing L2 page tables\n");
#endif

	/* Map the stack pages */
	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
	    IRQ_STACK_SIZE * PAGE_SIZE, PROT_READ | PROT_WRITE, PTE_CACHE);
	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
	    ABT_STACK_SIZE * PAGE_SIZE, PROT_READ | PROT_WRITE, PTE_CACHE);
	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
	    UND_STACK_SIZE * PAGE_SIZE, PROT_READ | PROT_WRITE, PTE_CACHE);
	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
	    UPAGES * PAGE_SIZE, PROT_READ | PROT_WRITE, PTE_CACHE);

	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
	    L1_TABLE_SIZE, PROT_READ | PROT_WRITE, PTE_PAGETABLE);

	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
		    PROT_READ | PROT_WRITE, PTE_PAGETABLE);
	}

	/* Map the Mini-Data cache clean area. */
	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
	    minidataclean.pv_pa);

	/* Map the vector page. */
#ifdef HIGH_VECT
	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
	    PROT_READ | PROT_WRITE, PTE_CACHE);
#else
        pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
	    PROT_READ | PROT_WRITE, PTE_CACHE);
#endif

	pmap_devmap_bootstrap(l1pagetable, iq80321_devmap);

	/*
	 * Give the XScale global cache clean code an appropriately
	 * sized chunk of unmapped VA space starting at 0xff000000
	 * (our device mappings end before this address).
	 */
	xscale_cache_clean_addr = 0xff000000U;

	/*
	 * Now we have the real page tables in place so we can switch to them.
	 * Once this is done we will be running with the REAL kernel page
	 * tables.
	 */

	/*
	 * Update the physical_freestart/physical_freeend/free_pages
	 * variables.
	 */
	{
		physical_freestart = physical_start - KERNEL_BASE +
		    round_page(esym);
		physical_freeend = physical_end;
		free_pages =
		    (physical_freeend - physical_freestart) / PAGE_SIZE;
	}
#ifdef VERBOSE_INIT_ARM
	printf("physical_freestart %x end %x\n", physical_freestart,
	    physical_freeend);
#endif

	/* be a client to all domains */
	cpu_domains(0x55555555);
	/* Switch tables */
#ifdef VERBOSE_INIT_ARM
	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
	       physical_freestart, free_pages, free_pages);
	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
#endif

	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
	setttb(kernel_l1pt.pv_pa);
	cpu_tlb_flushID();
	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));

	/*
	 * Moved from cpu_startup() as data_abort_handler() references
	 * this during uvm init
	 */
	proc0paddr = (struct user *)kernelstack.pv_va;
	proc0.p_addr = proc0paddr;

#ifdef VERBOSE_INIT_ARM
	printf("bootstrap done.\n");
#endif

#ifdef HIGH_VECT
	arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
#else
	arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
#endif

	/*
	 * Pages were allocated during the secondary bootstrap for the
	 * stacks for different CPU modes.
	 * We must now set the r13 registers in the different CPU modes to
	 * point to these stacks.
	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
	 * of the stack memory.
	 */
#ifdef VERBOSE_INIT_ARM
	printf("init subsystems: stacks ");
#endif

	set_stackptr(PSR_IRQ32_MODE,
	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
	set_stackptr(PSR_ABT32_MODE,
	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
	set_stackptr(PSR_UND32_MODE,
	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);

	/*
	 * Well we should set a data abort handler.
	 * Once things get going this will change as we will need a proper
	 * handler.
	 * Until then we will use a handler that just panics but tells us
	 * why.
	 * Initialisation of the vectors will just panic on a data abort.
	 * This just fills in a slightly better one.
	 */
#ifdef VERBOSE_INIT_ARM
	printf("vectors ");
#endif
	data_abort_handler_address = (u_int)data_abort_handler;
	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
	undefined_handler_address = (u_int)undefinedinstruction_bounce;

	/* Initialise the undefined instruction handlers */
#ifdef VERBOSE_INIT_ARM
	printf("undefined ");
#endif
	undefined_init();

	/* Load memory into UVM. */
#ifdef VERBOSE_INIT_ARM
	printf("page ");
#endif
	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
	    atop(physical_freestart), atop(physical_freeend), 0);

	/* Boot strap pmap telling it where the kernel page table is */
#ifdef VERBOSE_INIT_ARM
	printf("pmap ");
#endif
	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
	    KERNEL_VM_BASE + KERNEL_VM_SIZE);

	/* Update dump information */
	cpu_kcore_hdr.pmap_kernel_l1 = (u_int32_t)pmap_kernel()->pm_l1;
	cpu_kcore_hdr.pmap_kernel_l2 = (u_int32_t)&(pmap_kernel()->pm_l2);

	/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
	printf("irq ");
#endif
	i80321intc_intr_init();

#ifdef VERBOSE_INIT_ARM
	printf("done.\n");
#endif

#ifdef DDB
	db_machine_init();

	/* Firmware doesn't load symbols. */
	ddb_init();

	if (boothowto & RB_KDB)
		Debugger();
#endif

	/* We return the new stack pointer address */
	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
}

void
process_kernel_args(char *args)
{
	char *cp = args;

	if (cp == NULL || *(int *)cp != BOOT_STRING_MAGIC) {
		boothowto = RB_AUTOBOOT;
		return;
	}

	/* Eat the cookie */
	*(int *)cp = 0;
	cp += sizeof(int);

	boothowto = 0;

	/* Make a local copy of the bootargs */
	strncpy(bootargs, cp, MAX_BOOT_STRING - sizeof(int));

	cp = bootargs;
	boot_file = bootargs;

	/* Skip the kernel image filename */
	while (*cp != ' ' && *cp != 0)
		++cp;

	if (*cp != 0)
		*cp++ = 0;

	while (*cp == ' ')
		++cp;

	boot_args = cp;

#if 0
	printf("bootfile: %s\n", boot_file);
	printf("bootargs: %s\n", boot_args);
#endif

	/* Setup pointer to boot flags */
	while (*cp != '-')
		if (*cp++ == '\0')
			return;

	for (;*++cp;) {
		int fl;

		fl = 0;
		switch(*cp) {
		case 'a':
			fl |= RB_ASKNAME;
			break;
		case 'c':
			fl |= RB_CONFIG;
			break;
		case 'd':
			fl |= RB_KDB;
			break;
		case 's':
			fl |= RB_SINGLE;
			break;
		default:
			printf("unknown option `%c'\n", *cp);
			break;
		}
		boothowto |= fl;
	}
}

void
consinit(void)
{
	static const bus_addr_t comcnaddrs[] = {
		IQ80321_UART1          /* com0 */
	};
	static int consinit_called;

	if (consinit_called != 0)
		return;

	consinit_called = 1;

	/*
	 * Console devices are mapped VA==PA.  Our devmap reflects
	 * this, so register it now so drivers can map the console
	 * device.
	 */
	pmap_devmap_register(iq80321_devmap);

#if NCOM > 0
	if (comcnattach(&obio_bs_tag, comcnaddrs[0], comcnspeed,
	    COM_FREQ, comcnmode))
		panic("can't init serial console @%lx", comcnaddrs[0]);
	comdefaultrate = comcnspeed;
#else
	panic("serial console @%lx not configured", comcnaddrs[0]);
#endif
}

void
board_startup(void)
{
        if (boothowto & RB_CONFIG) {
#ifdef BOOT_CONFIG
		user_config();
#else
		printf("kernel does not support -c; continuing..\n");
#endif
	}
}


code:
/*	$OpenBSD: armish_start.S,v 1.2 2006/05/29 17:30:26 drahn Exp $	*/
/*	$NetBSD: iq80321_start.S,v 1.4 2002/10/14 22:32:54 bjh21 Exp $	*/

/*
 * Copyright (c) 2002 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <machine/asm.h>
#include <arm/armreg.h>
#include <arm/pte.h>

	.section .start,"ax",%progbits

	.global	_C_LABEL(iq80321_start)
_C_LABEL(iq80321_start):
	/*
	 * We will go ahead and disable the MMU here so that we don't
	 * have to worry about flushing caches, etc.
	 *
	 * Note that we may not currently be running VA==PA, which means
	 * we'll need to leap to the next insn after disabing the MMU.
	 */
	adr	r8, Lunmapped
	bic	r8, r8, #0xff000000	/* clear upper 8 bits */
	orr	r8, r8, #0xa0000000	/* OR in physical base address */

	mrc	p15, 0, r2, c1, c0, 0
	bic	r2, r2, #CPU_CONTROL_MMU_ENABLE
	mcr	p15, 0, r2, c1, c0, 0

	nop
	nop
	nop

	mov	pc, r8			/* Heave-ho! */

Lunmapped:
	/*
	 * We want to construct a memory map that maps us
	 * VA==PA (SDRAM at 0xa0000000) and also double-maps
	 * that space at 0xc0000000 (where the kernel address
	 * space starts).  We create these mappings uncached
	 * and unbuffered to be safe.
	 *
	 * We also want to map the various devices we want to
	 * talk to VA==PA during bootstrap.
	 *
	 * We just use section mappings for all of this to make it easy.
	 *
	 * We will put the L1 table to do all this at 0xa0004000, which
	 * is also where RedBoot puts it.
	 */

	/*
	 * Step 1: Map the entire address space VA==PA.
	 */
	adr	r0, Ltable
	ldr	r0, [r0]			/* r0 = &l1table */

	mov	r3, #(L1_S_AP(AP_KRW))
	orr	r3, r3, #(L1_TYPE_S)
	mov	r2, #0x100000			/* advance by 1MB */
	mov	r1, #0x1000			/* 4096MB */
1:
	str	r3, [r0], #0x04
	add	r3, r3, r2
	subs	r1, r1, #1
	bgt	1b

	/*
	 * Step 2: Map VA 0xc0000000->0xc3ffffff to PA 0xa0000000->0xa3ffffff.
	 */
	adr	r0, Ltable			/* r0 = &l1table */
	ldr	r0, [r0]

	mov	r3, #(L1_S_AP(AP_KRW))
	orr	r3, r3, #(L1_TYPE_S)
	orr	r3, r3, #0xa0000000
	add	r0, r0, #(0xc00 * 4)		/* offset to 0xc00xxxxx */
	mov	r1, #0x40			/* 64MB */
1:
	str	r3, [r0], #0x04
	add	r3, r3, r2
	subs	r1, r1, #1
	bgt	1b

	/* OK!  Page table is set up.  Give it to the CPU. */
	adr	r0, Ltable
	ldr	r0, [r0]
	mcr	p15, 0, r0, c2, c0, 0

	/* Flush the old TLBs, just in case. */
	mcr	p15, 0, r0, c8, c7, 0

	/* Set the Domain Access register.  Very important! */
	mov	r0, #1
	mcr	p15, 0, r0, c3, c0, 0

	/* Get ready to jump to the "real" kernel entry point... */
	ldr	r0, Lstart

	/* OK, let's enable the MMU. */
	mrc	p15, 0, r2, c1, c0, 0
	orr	r2, r2, #CPU_CONTROL_MMU_ENABLE
	mcr	p15, 0, r2, c1, c0, 0

	nop
	nop
	nop

	/* CPWAIT sequence to make sure the MMU is on... */
	mrc	p15, 0, r2, c2, c0, 0	/* arbitrary read of CP15 */
	mov	r2, r2			/* force it to complete */
	mov	pc, r0			/* leap to kernel entry point! */

Ltable:
	.word	0xa0004000

Lstart:
	.word	start

license: unknown


code:
/*	$OpenBSD: autoconf.c,v 1.12 2011/09/20 22:02:13 miod Exp $	*/
/*	$NetBSD: autoconf.c,v 1.2 2001/09/05 16:17:36 matt Exp $	*/

/*
 * Copyright (c) 1994-1998 Mark Brinicombe.
 * Copyright (c) 1994 Brini.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by Mark Brinicombe for
 *      the NetBSD project.
 * 4. The name of the company nor the name of the author may be used to
 *    endorse or promote products derived from this software without specific
 *    prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * RiscBSD kernel project
 *
 * autoconf.c
 *
 * Autoconfiguration functions
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/reboot.h>
#include <sys/disklabel.h>
#include <sys/device.h>
#include <sys/conf.h>
#include <sys/kernel.h>
#include <sys/malloc.h>

#include <uvm/uvm_extern.h>

#include <machine/bootconfig.h>
#include <machine/intr.h>
#include <dev/cons.h>

struct device *bootdv = NULL;

void dumpconf(void);

void
device_register(struct device *dev, void *aux)
{
}

/*
 * void cpu_configure()
 *
 * Configure all the root devices
 * The root devices are expected to configure their own children
 */
void
cpu_configure(void)
{
	softintr_init();

	/*
	 * Since various PCI interrupts could be routed via the ICU
	 * (for PCI devices in the bridge) we need to set up the ICU
	 * now so that these interrupts can be established correctly
	 * i.e. This is a hack.
	 */

	config_rootfound("mainbus", NULL);

	/*
	 * We can not know which is our root disk, defer
	 * until we can checksum blocks to figure it out.
	 */
	cold = 0;

	/* Time to start taking interrupts so lets open the flood gates .... */
	(void)spl0();

}

/*
 * Now that we are fully operational, we can checksum the
 * disks, and using some heuristics, hopefully are able to
 * always determine the correct root disk.
 */
void
diskconf(void)
{
	dev_t tmpdev;

#if 0
	/*
	 * Configure root, swap, and dump area.  This is
	 * currently done by running the same checksum
	 * algorithm over all known disks, as was done in
	 * /boot.  Then we basically fixup the *dev vars
	 * from the info we gleaned from this.
	 */
	dkcsumattach();
#endif

	/* Lookup boot device from boot if not set by configuration */
	if (bootdv == NULL) {
		int len;
		char *p;

		/* boot_file is of the form wd0a:/bsd, we want 'wd0a' */
		if ((p = strchr(boot_file, ':')) != NULL)
			len = p - boot_file;
		else
			len = strlen(boot_file);

		bootdv = parsedisk(boot_file, len, 0, &tmpdev);
	}
	if (bootdv == NULL)
		printf("boot device: lookup '%s' failed.\n", boot_file);
	else
		printf("boot device: %s\n", bootdv->dv_xname);
	setroot(bootdv, 0, RB_USERREQ);
	dumpconf();
}

struct nam2blk nam2blk[] = {
	{ "wd",		16 },
	{ "sd",		24 },
	{ "cd",		26 },
	{ "rd",		18 },
	{ "raid",	71 },
	{ "vnd",	19 },
	{ NULL,		-1 }
};


code: #	$OpenBSD: genassym.cf,v 1.1 2010/04/26 22:11:38 deraadt Exp $


code:
/.cvsignore/1.1/Mon May 29 17:13:19 2006//TOPENBSD_5_8_BASE
D

path: sys/arch/armish/compile/CVS/Entries


code: src/sys/arch/armish/compile

path: sys/arch/armish/compile/CVS/Repository


code: src/sys/arch/armish/conf

path: sys/arch/armish/conf/CVS/Repository


code:
# $OpenBSD: GENERIC,v 1.59 2015/04/16 09:09:49 mpi Exp $
#
# For further information on compiling OpenBSD kernels, see the config(8)
# man page.
#
# For further information on hardware support for this architecture, see
# the intro(4) man page.  For further information about kernel options
# for this architecture, see the options(4) man page.  For an explanation
# of each device driver in this file see the section 4 man page for the
# device.

machine		armish arm
include		"../../../conf/GENERIC"
maxusers	32			# estimated number of users

options		ARM32

makeoptions	KERNEL_BASE_PHYS="0x00200000"
makeoptions	KERNEL_BASE_VIRT="0xc0200000"

options	CPU_XSCALE_80321	# Support the XScale core
options	XSCALE_CACHE_READ_WRITE_ALLOCATE
#makeoptions	CPUFLAGS="-mcpu=xscale"

#options	PERFCTRS	# performance counters

option		PCIVERBOSE
option		USER_PCICONF		# user-space PCI configuration

config	bsd	swap generic

# The main bus device
mainbus0	at root
cpu0		at mainbus?
obio0		at mainbus?

# On-board 16550 UART
com0		at obio? addr 0xfe800000 xint 3

puc*	at pci?			# PCI "universal" communication device
com*	at puc?
lpt*	at puc?

# i80321 I/O Processor peripheral support
iopxs0	at mainbus?
#gpio*		at iopxs0

#iopaau*	at iopxs?		# Application Accelerator Unit
iopiic*		at iopxs?		# I2C Controller Unit(s)
iic0		at iopiic?
iic1		at iopiic?
ricohrtc0	at iic? addr 0x32	# Ricoh RTC
pcaled0		at iic? addr 0x60	# led controller
gpio*		at pcaled0
fintek0		at iic?	flags 0x0001	# temp/fan controller
spdmem*		at iic?			# SPD memory eeproms
sdtemp*		at iic?			# SO-DIMM (JC-42.4) temperature

#iopwdog*	at iopxs?	# Watchdog timer
pci0		at iopxs? bus ?	# PCI/PCI-X support

siop*		at pci? # NCR 538XX SCSI controllers(new)
em*		at pci?
re*		at pci?
ral*		at pci?
bwi*		at pci?
# IDE controllers
pciide* 	at pci? flags 0x0000
wd*		at pciide? flags 0x0000

scsibus*	at scsi?
sd*		at scsibus?	# SCSI disk drives
#st*		at scsibus?	# SCSI tape drives
cd*		at scsibus?	# SCSI CD-ROM drives
#ch*		at scsibus?	# SCSI autochangers
#uk*		at scsibus?	# unknown SCSI

# USB Controllers
ohci*		at pci?		# Open Host Controller
uhci*		at pci?		# Universal Host Controller
ehci*		at pci?		# Enhanced Host Controller

# USB bus support
usb*		at ohci?
usb*		at uhci?
usb*		at ehci?

# USB devices
uhub*	at usb?			# USB Hubs
uhub*	at uhub?		# USB Hubs
ualea*	at uhub?		# Araneus Alea II TRNG
umodem*	at uhub?		# USB Modems/Serial
ucom*	at umodem?
uvisor*	at uhub?		# Handspring Visor
ucom*	at uvisor?
uvscom*	at uhub?		# SUNTAC Slipper U VS-10U serial
ucom*	at uvscom?
ubsa*	at uhub?		# Belkin serial adapter
ucom*	at ubsa?
uftdi*	at uhub?		# FTDI FT8U100AX serial adapter
ucom*	at uftdi?
uplcom* at uhub?		# I/O DATA USB-RSAQ2 serial adapter
ucom*	at uplcom?
umct*	at uhub?		# MCT USB-RS232 serial adapter
ucom*	at umct?
uslcom*	at uhub?		# Silicon Laboratories CP210x serial
ucom*	at uslcom?
uark*	at uhub?		# Arkmicro ARK3116 serial
ucom*	at uark?
uipaq*	at uhub?		# iPAQ serial adapter
ucom*	at uipaq?
umsm*	at uhub?		# Qualcomm MSM EVDO
ucom*	at umsm?
uchcom*	at uhub?		# WinChipHead CH341/340 serial
ucom*	at uchcom?
uaudio* at uhub?		# USB Audio
audio*	at uaudio?
umidi*	at uhub?		# USB MIDI
midi*	at umidi?
ulpt*	at uhub?		# USB Printers
umass*	at uhub?		# USB Mass Storage devices
uhidev*	at uhub?		# Human Interface Devices
ums*	at uhidev?		# USB mouse
wsmouse* at ums? mux 0
ukbd*	at uhidev?		# USB keyboard
wskbd*	at ukbd? mux 1
udl*	 at uhub?		# USB DisplayLink video
wsdisplay* at udl?
ucycom*	at uhidev?		# Cypress serial
ucom*	at ucycom?
uslhcom* at uhidev?		# Silicon Labs CP2110 USB HID UART
ucom*	at uslhcom?
uhid*	at uhidev?		# USB generic HID support
upd*	at uhidev?		# USB Power Devices sensors
aue*	at uhub?		# ADMtek AN986 Pegasus Ethernet
atu*	at uhub?		# Atmel AT76c50x based 802.11b
axe*	at uhub?		# ASIX Electronics AX88172 USB Ethernet
axen*	at uhub?		# ASIX Electronics AX88179 USB Ethernet
cue*	at uhub?		# CATC USB-EL1201A based Ethernet
kue*	at uhub?		# Kawasaki KL5KUSB101B based Ethernet
smsc*	at uhub?		# SMSC LAN95xx Ethernet
cdce*	at uhub?		# CDC Ethernet
urndis*	at uhub?		# Remote NDIS Ethernet
upl*	at uhub?		# Prolific PL2301/PL2302 host-to-host `network'
ugl*	at uhub?		# Genesys Logic GL620USB-A host-to-host `network'
udav*	at uhub?		# Davicom DM9601 based Ethernet
url*	at uhub?		# Realtek RTL8150L based adapters
wi*	at uhub?		# WaveLAN IEEE 802.11DS
udsbr*	at uhub?		# D-Link DSB-R100 radio
radio*	at udsbr?		# USB radio
ugen*	at uhub?		# USB Generic driver
ural*	at uhub?		# Ralink RT2500USB
rum*	at uhub?		# Ralink RT2501USB/RT2601USB
run*	at uhub?		# Ralink RT2700U/RT2800U/RT3000U
rsu*	at uhub?		# Realtek RTL8188SU/RTL8191SU/RTL8192SU
urtwn*	at uhub?		# Realtek RTL8188CU/RTL8192CU
athn*	at uhub?		# Atheros AR9002U
#udcf*	at uhub?		# Gude Expert mouseCLOCK
uthum*	at uhidev?		# TEMPerHUM sensor
ugold*	at uhidev?		# gold TEMPer sensor
utwitch* at uhidev?		# YUREX BBU sensor
uow*	at uhub?		# Maxim/Dallas DS2490 1-Wire adapter
onewire* at uow?

amphy*		at mii?		# AMD 79C873 PHYs
dcphy*		at mii?		# Digital Clone PHYs
exphy*		at mii?		# 3Com internal PHYs
inphy*		at mii?		# Intel 82555 PHYs
iophy*		at mii?		# Intel 82553 PHYs
icsphy*		at mii?		# ICS1890 PHYs
lxtphy*		at mii?		# Level One LXT-970 PHYs
nsphy*		at mii?		# NS83840 PHYs
#nsphyter*	at mii?		# NS83843 PHYs
mtdphy*		at mii?		# Myson MTD972 PHYs
acphy*		at mii?		# Altima AC101 PHYs
qsphy*		at mii?		# Quality Semi QS6612 PHYs
luphy*		at mii?		# Lucent LU6612 PHY
sqphy*		at mii?		# Seeq 8022[013] PHYs
rlphy*		at mii?		# Realtek 8139 internal PHYs
#tlphy*		at mii?		# ThunderLAN PHYs
tqphy*		at mii?		# TDK Semiconductor PHYs
brgphy*		at mii?		# Broadcom 10/100/1000 PHYs
bmtphy*		at mii?		# Broadcom 10/100 PHYs
eephy*		at mii?		# Marvell 88E1000 Gigabit PHYs
urlphy*		at mii?		# Realtek RTL8150L internal PHY
rgephy*		at mii?		# Realtek 8169S/8110S PHY
rlphy*		at mii?		# Realtek 8139 internal PHYs
ciphy*		at mii?		# Cicada CS8201 10/100/1000 copper PHY
ukphy*		at mii?		# generic unknown PHYs

# 1-Wire devices
option ONEWIREVERBOSE
owid*	at onewire?		# ID
owsbm*	at onewire?		# Smart Battery Monitor
owtemp* at onewire?		# Temperature
owctr*	at onewire?		# Counter device

# mouse & keyboard multiplexor pseudo-devices
pseudo-device	wsmux		2
pseudo-device	hotplug		1	# devices hot plugging

path: sys/arch/armish/conf/GENERIC


code:
#	$OpenBSD: Makefile.armish,v 1.51 2015/01/13 01:12:49 deraadt Exp $

# For instructions on building kernels consult the config(8) and options(4)
# manual pages.
#
# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
#	IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
# DEBUG is set to -g by config if debugging is requested (config -g).
# PROF is set to -pg by config if profiling is requested (config -p).

.include <bsd.own.mk>

SIZE?=	size
STRIP?=	strip

# source tree is located via $S relative to the compilation directory
.ifndef S
S!=	cd ../../../..; pwd
.endif

_machdir?=	$S/arch/${_mach}
_archdir?=	$S/arch/${_arch}

INCLUDES=	-nostdinc -I$S -I. -I$S/arch
CPPFLAGS=	${INCLUDES} ${IDENT} ${PARAM} -D_KERNEL -D__${_mach}__ -MD -MP
CWARNFLAGS=	-Werror -Wall -Wimplicit-function-declaration \
		-Wno-main -Wno-uninitialized \
		-Wframe-larger-than=2047

CMACHFLAGS=	-ffreestanding -msoft-float # -march=armv4 -mtune=strongarm
CMACHFLAGS+=	-fno-builtin-printf -fno-builtin-snprintf \
		-fno-builtin-vsnprintf -fno-builtin-log \
		-fno-builtin-log2 -fno-builtin-malloc ${NOPIE_FLAGS}
.if ${IDENT:M-DNO_PROPOLICE}
CMACHFLAGS+=	-fno-stack-protector
.endif

COPTS?=		-O2
CFLAGS=		${DEBUG} ${CWARNFLAGS} ${CMACHFLAGS} ${COPTS} ${PIPE}
AFLAGS=		-D_LOCORE -x assembler-with-cpp ${CWARNFLAGS} ${CMACHFLAGS}
LINKFLAGS=	-T ldscript --warn-common -nopie

.if ${IDENT:M-DDDB_STRUCT}
DB_STRUCTINFO=	db_structinfo.h
.else
DB_STRUCTINFO=
.endif

HOSTCC?=	${CC}
HOSTED_CPPFLAGS=${CPPFLAGS:S/^-nostdinc$//}
HOSTED_CFLAGS=	${CFLAGS}
HOSTED_C=	${HOSTCC} ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} -c $<

NORMAL_C_NOP=	${CC} ${CFLAGS} ${CPPFLAGS} -c $<
NORMAL_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
NORMAL_S=	${CC} ${AFLAGS} ${CPPFLAGS} -c $<

%OBJS

%CFILES

%SFILES

# load lines for config "xxx" will be emitted as:
# xxx: ${SYSTEM_DEP} swapxxx.o
#	${SYSTEM_LD_HEAD}
#	${SYSTEM_LD} swapxxx.o
#	${SYSTEM_LD_TAIL}
SYSTEM_HEAD=	${_mach}_start.o locore.o param.o ioconf.o
SYSTEM_OBJ=	${SYSTEM_HEAD} ${OBJS}
SYSTEM_DEP=	Makefile ${SYSTEM_OBJ}
SYSTEM_LD_HEAD=	@rm -f $@
SYSTEM_LD_HEAD+=; \
		cat ${_archdir}/conf/ldscript.head ${_archdir}/conf/ldscript.tail | \
		    sed -e 's/@KERNEL_BASE_PHYS@/${KERNEL_BASE_PHYS}/' \
		    -e 's/@KERNEL_BASE_VIRT@/${KERNEL_BASE_VIRT}/' > ldscript

SYSTEM_LD=	@echo ${LD} ${LINKFLAGS} -o $@ '$${SYSTEM_HEAD} vers.o $${OBJS}'; \
		${LD} ${LINKFLAGS} -o $@ ${SYSTEM_HEAD} vers.o ${OBJS}
SYSTEM_LD_TAIL=	@${SIZE} $@; chmod 755 $@
SYSTEM_LD_TAIL+=; \
		dd if=/dev/zero of=bsd bs=1 count=1 seek=95 conv=notrunc 2>/dev/null; \
		dd if=/dev/zero of=bsd bs=1 count=1 seek=127 conv=notrunc 2>/dev/null; \
		dd if=/dev/zero of=bsd bs=1 count=1 seek=159 conv=notrunc 2>/dev/null

DEBUG?=
.if ${DEBUG} == "-g"
LINKFLAGS+=	-X
STRIPFLAGS=	-g -x
SYSTEM_LD_TAIL+=; \
		echo mv $@ $@.gdb; rm -f $@.gdb; mv $@ $@.gdb; \
		echo ${STRIP} ${STRIPFLAGS} -o $@ $@.gdb; \
		${STRIP} ${STRIPFLAGS} -o $@ $@.gdb
.else
LINKFLAGS+=	-x
.endif

%LOAD

# cc's -MD puts the source and output paths in the dependency file;
# since those are temp files here we need to fix it up.  It also
# puts the file in /tmp, so we use -MF to put it in the current
# directory as assym.P and then generate assym.d from it with a
# good target name
assym.h: $S/kern/genassym.sh Makefile \
	 ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf
	cat ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf | \
	    sh $S/kern/genassym.sh ${CC} ${CFLAGS} ${CPPFLAGS} -MF assym.P > assym.h.tmp
	sed '1s/.*/assym.h: \\/' assym.P > assym.d
	sort -u assym.h.tmp > assym.h

param.c: $S/conf/param.c
	rm -f param.c
	cp $S/conf/param.c .

param.o: param.c Makefile
	${NORMAL_C}

mcount.o: $S/lib/libkern/mcount.c Makefile
	${NORMAL_C_NOP}

ioconf.o: ioconf.c
	${NORMAL_C}

vers.o: ${SYSTEM_DEP} ${SYSTEM_SWAP_DEP}
	sh $S/conf/newvers.sh
	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c

clean::
	rm -f eddep *bsd *bsd.gdb tags *.[dio] [a-z]*.s \
	    [Ee]rrs linterrs assym.h ${DB_STRUCTINFO}

lint:
	@lint -hbxncez -Dvolatile= ${CPPFLAGS} -UKGDB \
	    ${CFILES} ioconf.c param.c | \
	    grep -v 'static function .* unused'

depend:
	@touch $@

tags:
	@echo "see $S/kern/Makefile for tags"

db_structinfo.h: $S/ddb/db_structinfo.c $S/ddb/parse_structinfo.pl
	${CC} ${CFLAGS} ${CPPFLAGS} -MT $@ -gstabs -c $S/ddb/db_structinfo.c
	objdump -g db_structinfo.o | perl $S/ddb/parse_structinfo.pl > $@
	rm -f db_structinfo.o

${_mach}_start.o: ${_machdir}/${_mach}/${_mach}_start.S
locore.o: ${_archdir}/${_arch}/locore.S assym.h
in_cksum_arm.o fiq_subr.o bcopyinout.o copystr.o sigcode.o: assym.h
vectors.o cpuswitch.o exception.o bcopy_page.o irq_dispatch.o: assym.h

# The install target can be redefined by putting a
# install-kernel-${MACHINE_NAME} target into /etc/mk.conf
MACHINE_NAME!=  uname -n
install: install-kernel-${MACHINE_NAME}
.if !target(install-kernel-${MACHINE_NAME}})
install-kernel-${MACHINE_NAME}:
	cmp -s bsd /bsd || ln -f /bsd /obsd
	cp bsd /nbsd
	mv /nbsd /bsd
.endif

# pull in the dependency information
.if !empty(DB_STRUCTINFO) && !exists(${DB_STRUCTINFO})
 ${SYSTEM_OBJ}: ${DB_STRUCTINFO}
.endif
.ifnmake clean
. for o in ${SYSTEM_OBJ} assym.h ${DB_STRUCTINFO}
.  if exists(${o:R}.d)
.   include "${o:R}.d"
.  elif exists($o)
    .PHONY: $o
.  endif
. endfor
.endif

%RULES


code:
#	$OpenBSD: RAMDISK,v 1.34 2015/07/17 22:52:28 tedu Exp $

machine		armish arm
maxusers	4

option		TIMEZONE=0
option		DST=0
option		SMALL_KERNEL
option		NO_PROPOLICE
option		BOOT_CONFIG

option		MINIROOTSIZE=5120
option		RAMDISK_HOOKS

option		PCIVERBOSE

option		FFS
option		FFS2
option		CD9660
option		MSDOSFS
option		EXT2FS
option		INET6
option		CRYPTO

config		bsd root on rd0a swap on rd0b

option		ARM32
#makeoptions	KERNEL_BASE_PHYS="0xa0200000"
makeoptions	KERNEL_BASE_PHYS="0x00200000"
makeoptions	KERNEL_BASE_VIRT="0xc0200000"
option		CPU_XSCALE_80321	# Support the XScale core
option		XSCALE_CACHE_READ_WRITE_ALLOCATE
#makeoptions	CPUFLAGS="-mcpu=xscale"

mainbus0	at root
cpu0		at mainbus?
obio0		at mainbus?

com0		at obio? addr 0xfe800000 xint 3

iopxs0		at mainbus?

iopiic*		at iopxs?		# I2C Controller Unit(s)
iic0		at iopiic?
iic1		at iopiic?
pcaled0		at iic? addr 0x60	# led controller
ricohrtc0	at iic? addr 0x32	# Ricoh RTC
fintek0		at iic?	flags 0x0001	# temp/fan controller

pci0		at iopxs? bus ?		# PCI/PCI-X support

siop*		at pci?			# NCR 538XX SCSI controllers(new)
em*		at pci?
re*		at pci?
ral*		at pci?
bwi*		at pci?

pciide*		at pci? flags 0x0000
wd*		at pciide? flags 0x0000

softraid0	at root

scsibus*	at scsi?
sd*		at scsibus?		# SCSI disk drives
cd*		at scsibus?		# SCSI CD-ROM drives

ohci*		at pci?
uhci*		at pci?
ehci*		at pci?
usb*		at ohci?
usb*		at uhci?
usb*		at ehci?

uhub*		at usb?
uhub*		at uhub?
umodem*		at uhub?		# USB Modems/Serial
ucom*		at umodem?
uvisor*		at uhub?		# Handspring Visor
ucom*		at uvisor?
uvscom*		at uhub?		# SUNTAC Slipper U VS-10U serial
ucom*		at uvscom?
ubsa*		at uhub?		# Belkin serial adapter
ucom*		at ubsa?
uftdi*		at uhub?		# FTDI FT8U100AX serial adapter
ucom*		at uftdi?
uplcom*		at uhub?		# I/O DATA USB-RSAQ2 serial adapter
ucom*		at uplcom?
umct*		at uhub?		# MCT USB-RS232 serial adapter
ucom*		at umct?
uipaq*		at uhub?		# iPAQ serial adapter
ucom*		at uipaq?
umsm*		at uhub?		# Qualcomm MSM EVDO
ucom*		at umsm?
umass*		at uhub?
uhidev*		at uhub?		# Human Interface Devices
ukbd*		at uhidev?		# USB keyboard
wskbd*		at ukbd? mux 1
uslhcom*	at uhidev?		# Silicon Labs CP2110 USB HID UART
ucom*		at uslhcom?
uhid*		at uhidev?		# USB generic HID support
aue*		at uhub?		# ADMtek AN986 Pegasus Ethernet
atu*		at uhub?		# Atmel AT76c50x based 802.11b
axe*		at uhub?		# ASIX Electronics AX88172 USB Ethernet
axen*		at uhub?		# ASIX Electronics AX88179 USB Ethernet
cue*		at uhub?		# CATC USB-EL1201A based Ethernet
kue*		at uhub?		# Kawasaki KL5KUSB101B based Ethernet
smsc*		at uhub?		# SMSC LAN95xx Ethernet
cdce*		at uhub?		# CDC Ethernet
upl*		at uhub?		# Prolific PL2301/PL2302 host-to-host
ugl*		at uhub?		# Genesys Logic GL620USB-A host-to-host
udav*		at uhub?		# Davicom DM9601 based Ethernet
url*		at uhub?		# Realtek RTL8150L based adapters
wi*		at uhub?		# WaveLAN IEEE 802.11DS
ugen*		at uhub?		# USB Generic driver
ural*		at uhub?		# Ralink RT2500

amphy*		at mii?			# AMD 79C873 PHYs
dcphy*		at mii?			# Digital Clone PHYs
exphy*		at mii?			# 3Com internal PHYs
inphy*		at mii?			# Intel 82555 PHYs
iophy*		at mii?			# Intel 82553 PHYs
icsphy*		at mii?			# ICS1890 PHYs
lxtphy*		at mii?			# Level One LXT-970 PHYs
nsphy*		at mii?			# NS83840 PHYs
mtdphy*		at mii?			# Myson MTD972 PHYs
acphy*		at mii?			# Altima AC101 PHYs
qsphy*		at mii?			# Quality Semi QS6612 PHYs
luphy*		at mii?			# Lucent LU6612 PHY
sqphy*		at mii?			# Seeq 8022[013] PHYs
rlphy*		at mii?			# Realtek 8139 internal PHYs
tqphy*		at mii?			# TDK Semiconductor PHYs
brgphy*		at mii?			# Broadcom 10/100/1000 PHYs
bmtphy*		at mii?			# Broadcom 10/100 PHYs
eephy*		at mii?			# Marvell 88E1000 Gigabit PHYs
urlphy*		at mii?			# Realtek RTL8150L internal PHY
rgephy*		at mii?			# Realtek 8169S/8110S PHY
rlphy*		at mii?			# Realtek 8139 internal PHYs
ciphy*		at mii?			# Cicada CS8201 10/100/1000 copper PHY
ukphy*		at mii?			# generic unknown PHYs

pseudo-device	wsmux 2
pseudo-device	bio 1
pseudo-device	loop 1
pseudo-device	bpfilter 1
pseudo-device	rd 1

path: sys/arch/armish/conf/RAMDISK


code:
#	$OpenBSD: files.armish,v 1.17 2014/07/11 21:54:37 tedu Exp $

maxpartitions   16
maxusers	2 8 64

major	{wd = 16}
major	{sd = 24}
major	{cd = 26}
major	{rd = 18}

file	arch/arm/arm/conf.c
file	arch/armish/armish/armish_machdep.c

file	arch/armish/armish/autoconf.c
file	arch/arm/arm/disksubr.c				disk

include "scsi/files.scsi"

# Use the generic ARM soft interrupt code.
file	arch/arm/arm/softintr.c
file	arch/arm/arm/irq_dispatch.S

#file	arch/armish/dev/iq80310_7seg.c
#file	arch/armish/dev/iq80310_intr.c
#file	arch/armish/dev/iq80310_timer.c

include "dev/i2c/files.i2c"

# ARM i80321 files
include "arch/arm/xscale/files.i80321"

attach  iopxs at mainbus with iopxs_mainbus
file	arch/armish/dev/i80321_mainbus.c		iopxs_mainbus
file	arch/armish/dev/pci_addr_fixup.c		iopxs
file	arch/armish/dev/iq80321_pci.c			iopxs

# IQ80310 on-board devices (including CPLD)
device	obio {addr, [size = -1], [width = -1], [xint = -1]}: bus_space_generic
attach	obio at mainbus
file	arch/armish/dev/obio.c				obio
file	arch/armish/dev/obio_space.c			obio

# on-board XR 16550 UARTs
attach	com at obio with com_obio
file	arch/armish/dev/com_obio.c			com_obio

#
# Machine-independent ATA drivers
#
include "dev/ata/files.ata"

# Include WSCONS stuff
include "dev/wscons/files.wscons"
include "dev/wsfont/files.wsfont"
include "dev/rasops/files.rasops"

# Include USB stuff
include "dev/usb/files.usb"

# Media Independent Interface (mii)
include "dev/mii/files.mii"

# PCI
include "dev/pci/files.pci"
file	arch/armish/dev/pciide_machdep.c	pciide

include "dev/atapiscsi/files.atapiscsi"

#
# Machine-independent GPIO drivers
#
include "dev/gpio/files.gpio"

#
# Machine-independent 1-Wire drivers
#
include "dev/onewire/files.onewire"


code: src/sys/arch/armish/dev

path: sys/arch/armish/dev/CVS/Repository


code:
/*	$OpenBSD: com_obio.c,v 1.5 2008/06/26 05:42:09 ray Exp $	*/
/*	$NetBSD: com_obio.c,v 1.9 2005/12/11 12:17:09 christos Exp $	*/

/*-
 * Copyright (c) 2001 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Matt Thomas <matt@3am-software.com>.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/termios.h>

#include <machine/bus.h>

#include <arm/xscale/i80321var.h>
#include <armish/dev/obiovar.h>

#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>

struct com_obio_softc {
	struct com_softc sc_com;

	void *sc_ih;
};

int	com_obio_match(struct device *, void *, void *);
void	com_obio_attach(struct device *, struct device *, void *);

struct cfattach com_obio_ca = {
	sizeof(struct com_obio_softc), com_obio_match, com_obio_attach
};

struct cfdriver com_obio_cd = {
	NULL, "com_obio", DV_DULL
};

int com_irq_override = -1;

int
com_obio_match(struct device *parent, void *cf, void *aux)
{
	struct obio_attach_args *oba = aux;

	/* if the irq does not match, do not attach */
	if (com_irq_override != -1)
		oba->oba_irq = com_irq_override;

	/* We take it on faith that the device is there. */
	return (1);
}

void
com_obio_attach(struct device *parent, struct device *self, void *aux)
{
	struct obio_attach_args *oba = aux;
	struct com_obio_softc *osc = (void *) self;
	struct com_softc *sc = &osc->sc_com;
	int error;

	sc->sc_iot = oba->oba_st;
	sc->sc_iobase = oba->oba_addr;
	sc->sc_frequency = COM_FREQ;
/* 	sc->sc_hwflags = COM_HW_NO_TXPRELOAD; */
	sc->sc_hwflags = 0;
	error = bus_space_map(sc->sc_iot, oba->oba_addr, 8, 0, &sc->sc_ioh);

	if (error) {
		printf(": failed to map registers: %d\n", error);
		return;
	}

	com_attach_subr(sc);
	osc->sc_ih = i80321_intr_establish(oba->oba_irq, IPL_TTY,
	    comintr, sc, sc->sc_dev.dv_xname);
	if (osc->sc_ih == NULL)
		printf("%s: unable to establish interrupt at CPLD irq %d\n",
		    sc->sc_dev.dv_xname, oba->oba_irq);
}


code:
/*	$OpenBSD: i80321_mainbus.c,v 1.10 2006/09/15 23:36:11 drahn Exp $ */
/*	$NetBSD: i80321_mainbus.c,v 1.16 2005/12/15 01:44:00 briggs Exp $ */

/*
 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * IQ80321 front-end for the i80321 I/O Processor.  We take care
 * of setting up the i80321 memory map, PCI interrupt routing, etc.,
 * which are all specific to the board the i80321 is wired up to.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/gpio.h>

#include <machine/bus.h>

#include <arm/mainbus/mainbus.h>
#include <armish/dev/iq80321reg.h>
#include <armish/dev/iq80321var.h>

#include <arm/xscale/i80321reg.h>
#include <arm/xscale/i80321var.h>

#include <dev/pci/pcireg.h>
#include <dev/pci/pcidevs.h>
#include <dev/gpio/gpiovar.h>

#include "gpio.h"

int	i80321_mainbus_match(struct device *, void *, void *);
void	i80321_mainbus_attach(struct device *, struct device *, void *);

void i80321_gpio_init (struct i80321_softc *sc);
int i80321_gpio_pin_read (void *, int);
void i80321_gpio_pin_write (void *, int, int);
void i80321_gpio_pin_ctl (void *, int, int);

/* XXX */
#define I80219_REG_GPOE	0x7C4
#define I80219_REG_GPID 0x7C8
#define I80219_REG_GPOD 0x7CC

struct cfattach iopxs_mainbus_ca = {
	sizeof(struct i80321_softc), i80321_mainbus_match,
	i80321_mainbus_attach
};

struct cfdriver iopxs_cd = {
	NULL, "iopxs", DV_DULL
};

/* There can be only one. */
int	i80321_mainbus_found;

int
i80321_mainbus_match(struct device *parent, void *match, void *aux)
{
	struct mainbus_attach_args *ma = aux;
	struct cfdata *cf = match;

	if (i80321_mainbus_found)
		return (0);

	if (strcmp(cf->cf_driver->cd_name, ma->ma_name) == 0)
		return (1);

	return (0);
}

/* XXX */
bus_space_handle_t sc_pld_sh;

void
i80321_mainbus_attach(struct device *parent, struct device *self, void *aux)
{
	struct i80321_softc *sc = (void *) self;
        struct gpiobus_attach_args gba;
	pcireg_t b0u, b0l, b1u, b1l;
	paddr_t memstart;
	psize_t memsize;
	pcireg_t atumembase;
	pcireg_t atuiobase;

	i80321_mainbus_found = 1;

	/*
	 * Fill in the space tag for the i80321's own devices,
	 * and hand-craft the space handle for it (the device
	 * was mapped during early bootstrap).
	 */
	i80321_bs_init(&i80321_bs_tag, sc);
	sc->sc_st = &i80321_bs_tag;
	if (bus_space_map(sc->sc_st, VERDE_PMMR_BASE, VERDE_PMMR_SIZE, 0,
	    &sc->sc_sh))
		panic("%s: unable to map VERDE registers", sc->sc_dev.dv_xname);

	/*
	 * Slice off a subregion for the Memory Controller -- we need it
	 * here in order read the memory size.
	 */
	if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_MCU_BASE,
	    VERDE_MCU_SIZE, &sc->sc_mcu_sh))
		panic("%s: unable to subregion MCU registers",
		    sc->sc_dev.dv_xname);

	if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_ATU_BASE,
	    VERDE_ATU_SIZE, &sc->sc_atu_sh))
		panic("%s: unable to subregion ATU registers",
		    sc->sc_dev.dv_xname);

	if(bus_space_map(sc->sc_st, VERDE_OUT_XLATE_IO_WIN0_BASE,
	    VERDE_OUT_XLATE_IO_WIN_SIZE, 0, &sc->sc_io_sh))
		panic("%s: unable to map IOW registers", sc->sc_dev.dv_xname);

//	printf ("PIRSR %x\n", bus_space_read_4(sc->sc_st, sc->sc_sh, ICU_PIRSR));

//	printf("mapping bus io to %x - %x\n", sc->sc_io_sh, sc->sc_io_sh+VERDE_OUT_XLATE_IO_WIN_SIZE);

	/*
	 * Initialize the interrupt part of our PCI chipset tag.
	 */
	iq80321_pci_init(&sc->sc_pci_chipset, sc);

	/* Initialize the PCI chipset tag. */
	i80321_pci_init(&sc->sc_pci_chipset, sc);

	iq80321_pci_init2(&sc->sc_pci_chipset, sc);

	atumembase = bus_space_read_4(sc->sc_st, sc->sc_atu_sh,
	    PCI_MAPREG_START + 0x08);
	atuiobase = bus_space_read_4(sc->sc_st, sc->sc_atu_sh,
	    ATU_OIOWTVR);

	sc->sc_membus_space.bus_base = PCI_MAPREG_MEM_ADDR(atumembase);
	sc->sc_membus_space.bus_size = 0x04000000;
	sc->sc_iobus_space.bus_base = PCI_MAPREG_IO_ADDR(atuiobase);
	sc->sc_iobus_space.bus_size = 0x00010000;
	pci_addr_fixup(sc, 2/*XXX*/);

	/*
	 * Check the configuration of the ATU to see if another BIOS
	 * has configured us.  If a PC BIOS didn't configure us, then:
	 *	IQ80321: BAR0 00000000.0000000c BAR1 is 00000000.8000000c.
	 *	IQ31244: BAR0 00000000.00000004 BAR1 is 00000000.0000000c.
	 * If a BIOS has configured us, at least one of those should be
	 * different.  This is pretty fragile, but it's not clear what
	 * would work better.
	 */
	b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
	b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
	b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
	b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
	b0l &= PCI_MAPREG_MEM_ADDR_MASK;
	b0u &= PCI_MAPREG_MEM_ADDR_MASK;
	b1l &= PCI_MAPREG_MEM_ADDR_MASK;
	b1u &= PCI_MAPREG_MEM_ADDR_MASK;

	printf(": i80321 I/O Processor\n");

	i80321_sdram_bounds(sc->sc_st, sc->sc_mcu_sh, &memstart, &memsize);

	/*
	 * We set up the Inbound Windows as follows:
	 *
	 *	0	Access to i80321 PMMRs
	 *
	 *	1	Reserve space for private devices
	 *
	 *	2	RAM access
	 *
	 *	3	Unused.
	 *
	 * This chunk needs to be customized for each IOP321 application.
	 */

	atumembase = bus_space_read_4(sc->sc_st, sc->sc_atu_sh,
	    PCI_MAPREG_START + 0x08);

	if (atumembase == 0x8000000c) {
		/* iodata: intel std config */

		/* map device registers */
		sc->sc_iwin[0].iwin_base_lo =	0x00000004;
		sc->sc_iwin[0].iwin_base_hi =	0x00000000;
		sc->sc_iwin[0].iwin_xlate = 	0xff000000;
		sc->sc_iwin[0].iwin_size = 	0x01000000;

		/* Map PCI:Local 1:1. */
		sc->sc_iwin[1].iwin_base_lo = VERDE_OUT_XLATE_MEM_WIN0_BASE |
		    PCI_MAPREG_MEM_PREFETCHABLE_MASK |
		    PCI_MAPREG_MEM_TYPE_64BIT;
		sc->sc_iwin[1].iwin_base_hi = 0;

		sc->sc_iwin[1].iwin_xlate = VERDE_OUT_XLATE_MEM_WIN0_BASE;
		sc->sc_iwin[1].iwin_size = VERDE_OUT_XLATE_MEM_WIN_SIZE;

		sc->sc_iwin[2].iwin_base_lo = memstart |
		    PCI_MAPREG_MEM_PREFETCHABLE_MASK |
		    PCI_MAPREG_MEM_TYPE_64BIT;
		sc->sc_iwin[2].iwin_base_hi = 0;

		sc->sc_iwin[2].iwin_xlate = memstart;
		sc->sc_iwin[2].iwin_size = memsize;

		sc->sc_iwin[3].iwin_base_lo = 0;
#if 0
		    PCI_MAPREG_MEM_PREFETCHABLE_MASK |
		    PCI_MAPREG_MEM_TYPE_64BIT;
#endif

		sc->sc_iwin[3].iwin_base_hi = 0;
		sc->sc_iwin[3].iwin_xlate = 0;
		sc->sc_iwin[3].iwin_size = 0;

		/*
		 * We set up the Outbound Windows as follows:
		 *
		 *	0	Access to private PCI space.
		 *
		 *	1	Unused.
		 */
		sc->sc_owin[0].owin_xlate_lo =
		    PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo);
		sc->sc_owin[0].owin_xlate_hi = sc->sc_iwin[1].iwin_base_hi;

		/*
		 * Set the Secondary Outbound I/O window to map
		 * to PCI address 0 for all 64K of the I/O space.
		 */
		sc->sc_ioout_xlate = 0x90000000;
		sc->sc_ioout_xlate_offset = 0x1000;
	} else if (atumembase == 0x40000004) {
		/* thecus */

		/* dont map device registers */
		sc->sc_iwin[0].iwin_base_lo = 0;
		sc->sc_iwin[0].iwin_base_hi = 0;
		sc->sc_iwin[0].iwin_xlate = 0;
		sc->sc_iwin[0].iwin_size = 0;

		/* Map PCI:Local 1:1. */
		sc->sc_iwin[1].iwin_base_lo = 0x40000000 |
	#if 0
		    PCI_MAPREG_MEM_PREFETCHABLE_MASK |
		    PCI_MAPREG_MEM_TYPE_64BIT;
	#else
		    0;
	#endif
		sc->sc_iwin[1].iwin_base_hi = 0;

		sc->sc_iwin[1].iwin_xlate = 0;
		sc->sc_iwin[1].iwin_size = 0x08000000;

		sc->sc_iwin[2].iwin_base_lo = 0 |
		    PCI_MAPREG_MEM_PREFETCHABLE_MASK |
		    PCI_MAPREG_MEM_TYPE_64BIT;
		sc->sc_iwin[2].iwin_base_hi = 0;

		sc->sc_iwin[2].iwin_xlate = memstart;
		sc->sc_iwin[2].iwin_size = memsize;

		sc->sc_iwin[3].iwin_base_lo = 0;
		sc->sc_iwin[3].iwin_base_hi = 0;
		sc->sc_iwin[3].iwin_xlate = 0;
		sc->sc_iwin[3].iwin_size = 0;

		/*
		 * We set up the Outbound Windows as follows:
		 *
		 *	0	Access to private PCI space.
		 *
		 *	1	Unused.
		 */
		sc->sc_owin[0].owin_xlate_lo =
		    PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo);
		sc->sc_owin[0].owin_xlate_hi = sc->sc_iwin[1].iwin_base_hi;

		/*
		 * Set the Secondary Outbound I/O window to map
		 * to PCI address 0 for all 64K of the I/O space.
		 */
		sc->sc_ioout_xlate = 0x90000000;
		sc->sc_ioout_xlate_offset = 0x1000;

	}

	i80321_attach(sc);

	i80321_gpio_init (sc);

	/* if 80219 */ {
		gba.gba_name = "gpio";
		gba.gba_gc = &sc->sc_gpio_gc;
		gba.gba_pins = sc->sc_gpio_pins;
		gba.gba_npins = I80219_GPIO_NPINS;
#if NGPIO > 0
		config_found(&sc->sc_dev, &gba, gpiobus_print);
#endif
	}
	{
#define I80321_PLD 0xfe8d0000UL
#define I80321_PLD_SIZE 0x1000

#define	PLD_LED		0
#define	PLD_PLED	1
#define	PLD_BTN		2
#define	PLD_INTEN	3
#define	PLD_PWRMNG	4

#if 0
	uint8_t val;
#endif

		if (bus_space_map(sc->sc_st, I80321_PLD, I80321_PLD_SIZE, 0,
		    /* &sc->sc_pld_sh */ &sc_pld_sh))
			panic("%s: unable to map PLD registers",
			    sc->sc_dev.dv_xname);

#if 0
		printf("dlectl %x\n", bus_space_read_1(sc->sc_st, sc_pld_sh,
		    PLD_LED));
		val = bus_space_read_1(sc->sc_st, sc_pld_sh, PLD_LED);
		val |= 0x3;
		bus_space_write_1(sc->sc_st, sc_pld_sh, PLD_LED, val);
		printf("dlectl %x\n", bus_space_read_1(sc->sc_st, sc_pld_sh,
		    PLD_PLED));
		printf("dlectl %x\n", bus_space_read_1(sc->sc_st, sc_pld_sh,
		    PLD_BTN));
#endif
	}
	{
		extern struct cfdriver pcaled_cd;
		void pcaled_gpio_pin_write(void *arg, int pin, int value);
		if (pcaled_cd.cd_ndevs > 0 && pcaled_cd.cd_devs[0] != NULL) {
			pcaled_gpio_pin_write(pcaled_cd.cd_devs[0], 13, 0);
			pcaled_gpio_pin_write(pcaled_cd.cd_devs[0], 14, 0);
		}
	}
}

void
i80321_gpio_init (struct i80321_softc *sc)
{
	int i;
	for (i = 0; i < I80219_GPIO_NPINS; i++) {
		sc->sc_gpio_pins[i].pin_num = i;
		sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;

		sc->sc_gpio_pins[i].pin_flags =
		    bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE) &
		    (1 << i) ? GPIO_PIN_INPUT :  GPIO_PIN_OUTPUT;
		sc->sc_gpio_pins[i].pin_state = i80321_gpio_pin_read(sc, i) ?
		    GPIO_PIN_HIGH : GPIO_PIN_LOW;
	}
	sc->sc_gpio_gc.gp_cookie = sc;
	sc->sc_gpio_gc.gp_pin_read = i80321_gpio_pin_read;
	sc->sc_gpio_gc.gp_pin_write = i80321_gpio_pin_write;
	sc->sc_gpio_gc.gp_pin_ctl = i80321_gpio_pin_ctl;
}

int
i80321_gpio_pin_read (void *arg, int pin)
{
	struct i80321_softc *sc = arg;
	u_int32_t regval;
	int reg;

	if (bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE)
	    & (1 << pin)) {
		reg = I80219_REG_GPID;
	} else {
		reg = I80219_REG_GPOD;
	}
	regval =  bus_space_read_4(sc->sc_st, sc->sc_sh, reg);
#if 0
	printf("read %x gpio %x\n", reg);
	printf("gpio state %x %x %x\n",
	    bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPID),
	    bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOD),
	    bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE));
#endif
	return ((regval >> pin) & 1);
}

void
i80321_gpio_pin_write (void *arg, int pin, int value)
{
	struct i80321_softc *sc = arg;
	u_int32_t regval;

	regval =  bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOD);
	regval = (regval & ~(1 << pin)) | ((value & 1) << pin);
#if 0
	printf("writing %x to gpioO %x\n", regval);
#endif
	bus_space_write_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOD, regval);
}
void
i80321_gpio_pin_ctl (void *arg, int pin, int flags)
{
	struct i80321_softc *sc = arg;
	u_int32_t regval;
	int value = (flags == GPIO_PIN_INPUT) ? 1 : 0;

	regval =  bus_space_read_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE);
	regval = (regval & ~(1 << pin)) | ((value & 1) << pin);
#if 0
	printf("writing %x to ctl %x\n", regval, value);
#endif
	bus_space_write_4(sc->sc_st, sc->sc_sh, I80219_REG_GPOE, regval);
}

void board_reset(void); /* XXX */
void
board_reset()
{
	struct i80321_softc *sc = i80321_softc;
	uint32_t val;

	printf("attempting reset\n");
	val = bus_space_read_4(sc->sc_st, sc->sc_sh, 0x7CC);
	val &=  ~0x10;
	bus_space_write_4(sc->sc_st, sc->sc_sh, 0x7CC, val);
	val = bus_space_read_4(sc->sc_st, sc->sc_sh, 0x7C4);
	val &=  ~0x10;
	bus_space_write_4(sc->sc_st, sc->sc_sh, 0x7C4, val);

	bus_space_write_1(sc->sc_st, sc_pld_sh, PLD_PWRMNG, 0x2);

}

void board_powerdown(void); /* XXX */
void
board_powerdown(void)
{
	void pcaled_gpio_pin_write(void *arg, int pin, int value);
	extern struct cfdriver pcaled_cd;

	if (pcaled_cd.cd_ndevs > 0 && pcaled_cd.cd_devs[0] != NULL) {
		pcaled_gpio_pin_write(pcaled_cd.cd_devs[0], 8, 1);
		delay(500000);
	}
}


code:
/*	$OpenBSD: iq80321_pci.c,v 1.11 2014/05/08 21:17:01 miod Exp $	*/
/*	$NetBSD: iq80321_pci.c,v 1.5 2005/12/11 12:17:09 christos Exp $	*/

/*
 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * IQ80321 PCI interrupt support.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>

#include <machine/bus.h>

#include <armish/dev/iq80321reg.h>
#include <armish/dev/iq80321var.h>

#include <arm/xscale/i80321reg.h>
#include <arm/xscale/i80321var.h>

#include <dev/pci/pcidevs.h>
#include <dev/pci/ppbreg.h>

int	iq80321_pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
const char *iq80321_pci_intr_string(void *, pci_intr_handle_t);
void	*iq80321_pci_intr_establish(void *, pci_intr_handle_t,
	    int, int (*func)(void *), void *, const char *);
void	iq80321_pci_intr_disestablish(void *, void *);

struct irq_map {
	uint8_t	dev;
	uint8_t	intrpin;
	uint8_t	irq;
};

struct pci_id_list {
	uint8_t bus;
	uint8_t dev;
	pci_vendor_id_t	vend;
	pci_product_id_t prod;
};

struct board_id {
	char *name;
	struct irq_map *irq_map;
	struct pci_id_list list[];
};

struct irq_map *iq80321_irq_map;

struct irq_map iq80321_thecus_irq_map[] = {
	{ 1, 1, ICU_INT_XINT(0) }, /* thecus re0 27 */
	{ 2, 1, ICU_INT_XINT(3) }, /* thecus re1 30 */
	{ 3, 1, ICU_INT_XINT(2) }, /* thecus sata 29 */
	{ 4, 1, ICU_INT_XINT(0) }, /* thecus uhci0 27 ??? */
	{ 4, 2, ICU_INT_XINT(0) }, /* thecus uhci1 27 */
	{ 4, 3, ICU_INT_XINT(2) }, /* thecus ehci0 29 */
	{ 5, 1, ICU_INT_XINT(3) }, /* thecus minipci slot */
	{ 0, 0, 255}
};

struct irq_map iq80321_hdlg_irq_map[] = {
	{ 1, 1, ICU_INT_XINT(0) }, /* em0 27 */
	{ 2, 1, ICU_INT_XINT(1) }, /* wdc0 28 */
	{ 3, 1, ICU_INT_XINT(2) }, /* ochi0 29 */
	{ 3, 2, ICU_INT_XINT(2) }, /* ochi0 29 */
	{ 3, 3, ICU_INT_XINT(2) }, /* echi0 29 */
	{ 0, 0, 255}
};
struct irq_map certance_irq_map[] = {
	{ 0, 1, ICU_INT_XINT(0) }, /* em0 27 */
	{ 0, 2, ICU_INT_XINT(0) }, /* em0 27 */
	{ 1, 1, ICU_INT_XINT(1) }, /* sata 28 */
#if 0
	{ 2, 1, ICU_INT_XINT(0) }, /* scsi 29 */
#endif
	{ 2, 2, ICU_INT_XINT(3) }, /* scsi 30 */
	{ 0, 0, 255}
};
struct board_id thecus = {
	"Thecus Nx100",
	iq80321_thecus_irq_map,
	{
	{ 0, 	1,	PCI_VENDOR_REALTEK,	PCI_PRODUCT_REALTEK_RT8169 },
	/* fill in the rest of the devices */
	{ 0, 	0,	0,	0 }
	}
};
struct board_id iodata = {
	"I/O Data HDL-G",
	iq80321_hdlg_irq_map,
	{
	{ 0, 	1,	PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82541GI },
	/* fill in the rest of the devices */
	{ 0, 	0,	0,	0 }
	}
};
struct board_id certance = {
	"Certance CP3100",
	certance_irq_map,
	{
	{ 0, 	0,	PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_COPPER },
	{ 0, 	1,	PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_31244 },
	{ 0, 	2,	PCI_VENDOR_SYMBIOS,	PCI_PRODUCT_SYMBIOS_1010_2 },
	/* fill in the rest of the devices */
	{ 0, 	0,	0,	0 }
	}
};

struct board_id *systems[] = {
	&thecus,
	&iodata,
	&certance,
	NULL
};

void
iq80321_pci_init(pci_chipset_tag_t pc, void *cookie)
{
	pc->pc_intr_v = cookie;		/* the i80321 softc */
	pc->pc_intr_map = iq80321_pci_intr_map;
	pc->pc_intr_string = iq80321_pci_intr_string;
	pc->pc_intr_establish = iq80321_pci_intr_establish;
	pc->pc_intr_disestablish = iq80321_pci_intr_disestablish;

}
void
iq80321_pci_init2(pci_chipset_tag_t pc, void *cookie)
{
	pcitag_t tag;
	int i, j;
	struct board_id *sys;
	u_int32_t reg;

	for (i = 0; systems[i] != NULL; i++) {
		sys = systems[i];
		for (j = 0; sys->list[j].vend != 0; j++) {
			tag = pci_make_tag(pc, sys->list[j].bus,
			    sys->list[j].dev, 0);
			reg = pci_conf_read(pc, tag, 0 /* ID */);
#ifdef PROBE_NEW_BOARD
			printf("read %x expected %x\n", reg,
			    (sys->list[j].vend | sys->list[j].prod << 16));
#endif
			if ((sys->list[j].vend | sys->list[j].prod << 16)  !=
			     reg){
				sys = NULL;
				break;
			}
		}
		if (sys != NULL)
			break;
	}
	if (sys == NULL) {
		printf("board id failed\n");
#ifdef PROBE_NEW_BOARD
		for (i = 0; i < 16; i++) {
			tag = pci_make_tag(pc, 0, i, 0);
			printf("bus 0, dev %d: %x\n", i,
			    pci_conf_read(pc, tag, 0 /* ID */));
		}
#endif
	} else
		printf(": %s", sys->name);
	iq80321_irq_map = sys->irq_map;

	/* XXX */
	if (sys == &thecus) {
		/*
		 * thecus com irq appears to not be attached, override
		 * it's irq here, it is tied to the tick timer, irq9
		 * - yes this is a hack.
		 */
		 extern int com_irq_override;
		 com_irq_override = 28;
	}
}

int
iq80321_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
{
	struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
	pci_chipset_tag_t pc = pa->pa_pc;
	pcitag_t tag = pa->pa_intrtag;
	int i;

	int b, d, f;
	uint32_t busno;
	uint32_t intr;

	busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
	busno = PCIXSR_BUSNO(busno);
	if (busno == 0xff)
		busno = 0;

	pci_decompose_tag(pc, tag, &b, &d, &f);

	/* No mappings for devices not on our bus. */
	if (b != busno)
		goto no_mapping;

	for (i = 0; iq80321_irq_map[i].irq != 255; i++) {
		if (d == iq80321_irq_map[i].dev &&
		    pa->pa_intrpin == iq80321_irq_map[i].intrpin) {
			*ihp = iq80321_irq_map[i].irq;
			intr = pci_conf_read(pa->pa_pc, pa->pa_intrtag,
			    PCI_INTERRUPT_REG);
			intr = (intr & ~0xff) | iq80321_irq_map[i].irq;
			pci_conf_write(pa->pa_pc, pa->pa_intrtag,
			    PCI_INTERRUPT_REG, intr);
			return (0);
		}
	}

 no_mapping:
	intr = pci_conf_read(pa->pa_pc, pa->pa_intrtag,
	    PCI_INTERRUPT_REG);

	printf("iq80321_pci_intr_map: no mapping for %d/%d/%d (%d, %d, %d)\n",
	    pa->pa_bus, pa->pa_device, pa->pa_function, d, pa->pa_intrpin, intr);
	return (1);
}

const char *
iq80321_pci_intr_string(void *v, pci_intr_handle_t ih)
{
	static char irqname[32];

	snprintf(irqname, sizeof irqname, "irq %ld", ih);
	return (irqname);
}

void *
iq80321_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
    int (*func)(void *), void *arg, const char *name)
{

	return (i80321_intr_establish(ih, ipl, func, arg, name));
}

void
iq80321_pci_intr_disestablish(void *v, void *cookie)
{

	i80321_intr_disestablish(cookie);
}


code:
/*	$OpenBSD: iq80321reg.h,v 1.2 2006/05/29 17:30:26 drahn Exp $	*/
/*	$NetBSD: iq80321reg.h,v 1.4 2003/05/14 19:46:39 thorpej Exp $	*/

/*
 * Copyright (c) 2002 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _IQ80321REG_H_
#define	_IQ80321REG_H_

/*
 * Memory map and register definitions for the Intel IQ80321
 * Evaluation Board.
 */

/*
 * The memory map of the IQ80321 looks like so:
 *
 *           ------------------------------
 *		Intel 80321 IOP Reserved
 * FFFF E900 ------------------------------
 *		Peripheral Memory Mapped
 *		    Registers
 * FFFF E000 ------------------------------
 *		On-board devices
 * FE80 0000 ------------------------------
 *		SDRAM
 * A000 0000 ------------------------------
 *		Reserved
 * 9100 0000 ------------------------------
 * 		Flash
 * 9080 0000 ------------------------------
 *		Reserved
 * 9002 0000 ------------------------------
 *		ATU Outbound Transaction
 *		    Windows
 * 8000 0000 ------------------------------
 *		ATU Outbound Direct
 *		    Addressing Windows
 * 0000 1000 ------------------------------
 *		Initialization Boot Code
 *		    from Flash
 * 0000 0000 ------------------------------
 */

/*
 * We allocate a page table for VA 0xfe400000 (4MB) and map the
 * PCI I/O space (64K) and i80321 memory-mapped registers (4K) there.
 */
#if 0
#define	IQ80321_IOPXS_VBASE	0xfe400000UL
#define	IQ80321_IOW_VBASE	IQ80321_IOPXS_VBASE
#define	IQ80321_80321_VBASE	(IQ80321_IOW_VBASE +			\
				 VERDE_OUT_XLATE_IO_WIN_SIZE)
#endif

/*
 * The IQ80321 on-board devices are mapped VA==PA during bootstrap.
 * Conveniently, the size of the on-board register space is 1 section
 * mapping.
 */
#define	IQ80321_OBIO_BASE	0xfe800000UL
#define	IQ80321_OBIO_SIZE	0x00100000UL	/* 1MB */

#define	IQ80321_UART1		0xfe800000UL	/* TI 16550 */

#define	IQ80321_7SEG_MSB	0xfe840000UL
#define	IQ80321_7SEG_LSB	0xfe850000UL

#define	IQ80321_ROT_SWITCH	0xfe8d0000UL

#define	IQ80321_BATTERY_STAT	0xfe8f0000UL
#define	BATTERY_STAT_PRES	(1U << 0)
#define	BATTERY_STAT_CHRG	(1U << 1)
#define	BATTERY_STAT_DISCHRG	(1U << 2)

#endif /* _IQ80321REG_H_ */


code:
/*	$OpenBSD: iq80321var.h,v 1.3 2006/05/31 05:49:54 drahn Exp $	*/
/*	$NetBSD: iq80321var.h,v 1.1 2002/03/27 21:51:30 thorpej Exp $	*/

/*
 * Copyright (c) 2002 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _IQ80321_IQ80321VAR_H_
#define	_IQ80321_IQ80321VAR_H_

#include <dev/pci/pcivar.h>

void	iq80321_7seg(char, char);
void	iq80321_7seg_snake(void);

void	iq80321_pci_init(pci_chipset_tag_t, void *);
void	iq80321_pci_init2(pci_chipset_tag_t, void *);
void	save_ref(void);
void	check_ref(void);

void	 pci_addr_fixup(void *, int maxbus);

#endif /* _IQ80321_IQ80321VAR_H_ */


code:
/*	$OpenBSD: obio.c,v 1.3 2006/06/01 17:06:16 drahn Exp $	*/
/*	$NetBSD: obio.c,v 1.14 2005/12/11 12:17:09 christos Exp $	*/

/*
 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * On-board device autoconfiguration support for Intel IQ80321
 * evaluation boards.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>

#include <machine/bus.h>

#include <arm/mainbus/mainbus.h>
#include <arm/xscale/i80321reg.h>
#include <armish/dev/iq80321reg.h>
#include <armish/dev/iq80321var.h>
#include <armish/dev/obiovar.h>

int	obio_match(struct device *, void *, void *);
void	obio_attach(struct device *, struct device *, void *);

struct cfattach obio_ca = {
	sizeof(struct device), obio_match, obio_attach
};

struct cfdriver obio_cd = {
	NULL, "obio", DV_DULL
};

int	obio_print(void *, const char *);
int	obio_search(struct device *, void *, void *);

/* there can be only one */
int	obio_found;

int
obio_match(struct device *parent, void *match, void *aux)
{
	struct mainbus_attach_args *ma = aux;
	struct cfdata *cf = match;

	if (obio_found)
		return (0);

	if (strcmp(cf->cf_driver->cd_name, ma->ma_name) == 0)
		return (1);

	return (0);
}

void
obio_attach(struct device *parent, struct device *self, void *aux)
{
        struct device *sc = self;

	obio_found = 1;

	printf("\n");

	/*
	 * Attach all the on-board devices as described in the kernel
	 * configuration file.
	 */
	config_search(obio_search, self, sc);
}

int
obio_print(void *aux, const char *pnp)
{
	struct obio_attach_args *oba = aux;

	printf(" addr 0x%08lx", oba->oba_addr);

        if (oba->oba_irq != -1)
                printf(" intr %d", oba->oba_irq);

	return (UNCONF);
}

int
obio_search(struct device *parent, void *v, void *aux)
{
	struct obio_attach_args oba;
	struct cfdata   *cf = v;

	oba.oba_st = &obio_bs_tag;
	oba.oba_addr = cf->cf_loc[0];
	oba.oba_size = cf->cf_loc[1];
	oba.oba_width = cf->cf_loc[2];
	if (cf->cf_loc[3] != -1)
		oba.oba_irq = ICU_INT_XINT(cf->cf_loc[3]);
	else
		oba.oba_irq = -1;

	config_found(parent, &oba, obio_print);

	return (0);
}


code:
/*	$OpenBSD: obio_space.c,v 1.3 2014/11/16 12:30:56 deraadt Exp $	*/
/*	$NetBSD: obio_space.c,v 1.9 2005/11/24 13:08:33 yamt Exp $	*/

/*
 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * bus_space functions for IQ80321 on-board devices
 */

#include <sys/param.h>
#include <sys/systm.h>

#include <uvm/uvm_extern.h>

#include <machine/bus.h>

/* Prototypes for all the bus_space structure functions */
bs_protos(obio);
bs_protos(generic);
bs_protos(generic_armv4);
bs_protos(bs_notimpl);

/*
 * The obio bus space tag.  This is constant for all instances, so
 * we never have to explicitly "create" it.
 */
struct bus_space obio_bs_tag = {
	/* cookie */
	(void *) 0,

	/* mapping/unmapping */
	obio_bs_map,
	obio_bs_unmap,
	obio_bs_subregion,

	/* allocation/deallocation */
	obio_bs_alloc,
	obio_bs_free,

	/* get kernel virtual address */
	obio_bs_vaddr,

	/* mmap */
	bs_notimpl_bs_mmap,

	/* barrier */
	obio_bs_barrier,

	/* read (single) */
	generic_bs_r_1,
	generic_armv4_bs_r_2,
	generic_bs_r_4,
	bs_notimpl_bs_r_8,

	/* read multiple */
	generic_bs_rm_1,
	generic_armv4_bs_rm_2,
	bs_notimpl_bs_rm_4,
	bs_notimpl_bs_rm_8,

	/* read region */
	generic_bs_rr_1,
	bs_notimpl_bs_rr_2,
	bs_notimpl_bs_rr_4,
	bs_notimpl_bs_rr_8,

	/* write (single) */
	generic_bs_w_1,
	generic_armv4_bs_w_2,
	generic_bs_w_4,
	bs_notimpl_bs_w_8,

	/* write multiple */
	generic_bs_wm_1,
	generic_armv4_bs_wm_2,
	bs_notimpl_bs_wm_4,
	bs_notimpl_bs_wm_8,

	/* write region */
	bs_notimpl_bs_wr_1,
	bs_notimpl_bs_wr_2,
	bs_notimpl_bs_wr_4,
	bs_notimpl_bs_wr_8,

	/* set multiple */
	bs_notimpl_bs_sm_1,
	bs_notimpl_bs_sm_2,
	bs_notimpl_bs_sm_4,
	bs_notimpl_bs_sm_8,

	/* set region */
	bs_notimpl_bs_sr_1,
	bs_notimpl_bs_sr_2,
	bs_notimpl_bs_sr_4,
	bs_notimpl_bs_sr_8,

	/* copy */
	bs_notimpl_bs_c_1,
	bs_notimpl_bs_c_2,
	bs_notimpl_bs_c_4,
	bs_notimpl_bs_c_8,
};

int
obio_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
    bus_space_handle_t *bshp)
{
	const struct pmap_devmap *pd;
	paddr_t startpa, endpa, pa;
	vaddr_t va;
	pt_entry_t *pte;

	if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
		/* Device was statically mapped. */
		*bshp = pd->pd_va + (bpa - pd->pd_pa);
		return (0);
	}

	endpa = round_page(bpa + size);
	startpa = trunc_page(bpa);

	va = uvm_km_valloc(kernel_map, endpa - startpa);
	if (va == 0)
		return(ENOMEM);

	*bshp = (bus_space_handle_t)(va + (bpa - startpa));

	for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
		pmap_kenter_pa(va, pa, PROT_READ | PROT_WRITE);
		if ((flag & BUS_SPACE_MAP_CACHEABLE) == 0) {
			pte = vtopte(va);
			*pte &= ~L2_S_CACHE_MASK;
			PTE_SYNC(pte);
		}
	}
	pmap_update(pmap_kernel());

	return (0);
}

int
obio_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
    bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap,
    bus_space_handle_t *bshp)
{

	panic("obio_bs_alloc(): not implemented");
}

void
obio_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
{
	vaddr_t va, endva;

	if (pmap_devmap_find_va(bsh, size) != NULL) {
		/* Device was statically mapped; nothing to do. */
		return;
	}

	endva = round_page(bsh + size);
	va = trunc_page(bsh);

	pmap_kremove(va, endva - va);
	uvm_km_free(kernel_map, va, endva - va);
}

void
obio_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
{

	panic("obio_bs_free(): not implemented");
}

int
obio_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
    bus_size_t size, bus_space_handle_t *nbshp)
{

	*nbshp = bsh + offset;
	return (0);
}

void *
obio_bs_vaddr(void *t, bus_space_handle_t bsh)
{

	return ((void *)bsh);
}

void
obio_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
    bus_size_t len, int flags)
{

	/* Nothing to do. */
}


code:
/*	$OpenBSD: obiovar.h,v 1.2 2006/05/29 17:30:26 drahn Exp $	*/
/*	$NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $	*/

/*
 * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _IQ80321_OBIOVAR_H_
#define	_IQ80321_OBIOVAR_H_

struct obio_attach_args {
	bus_space_tag_t oba_st;		/* bus space tag */
	bus_addr_t oba_addr;		/* address of device */
	bus_size_t oba_size;		/* size of device */
	int oba_width;			/* bus width */
	int oba_irq;			/* XINT interrupt bit # */
};

extern struct bus_space obio_bs_tag;

#endif /* _IQ80321_OBIOVAR_H_ */