code:
/*	$OpenBSD: pte.h,v 1.10 2013/03/25 20:19:03 deraadt Exp $	*/
/*	$NetBSD: pte.h,v 1.19 1997/08/05 11:00:10 pk Exp $ */

/*
 * Copyright (c) 1996
 * 	The President and Fellows of Harvard College. All rights reserved.
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgements:
 * 	This product includes software developed by Harvard University.
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgements:
 *	This product includes software developed by Harvard University.
 *	This product includes software developed by the University of
 *	California, Berkeley and its contributors.
 * 4. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)pte.h	8.1 (Berkeley) 6/11/93
 */

/*
 * Sun-4 (sort of), 4c (SparcStation), and 4m Page Table Entries
 * (Sun calls them `Page Map Entries').
 */

#ifndef _LOCORE
/*
 * Segment maps contain `pmeg' (Page Map Entry Group) numbers.
 * A PMEG is simply an index that names a group of 32 (sun4) or
 * 64 (sun4c) PTEs.
 * Depending on the CPU model, we need 7 (sun4c) to 10 (sun4/400) bits
 * to hold the hardware MMU resource number.
 */
typedef u_short pmeg_t;		/* 10 bits needed per Sun-4 segmap entry */
/*
 * Region maps contain `smeg' (Segment Entry Group) numbers.
 * An SMEG is simply an index that names a group of 64 PMEGs.
 */
typedef u_char smeg_t;		/* 8 bits needed per Sun-4 regmap entry */
#endif

/*
 * Address translation works as follows:
 *
 * (for sun4c and 2-level sun4)
 *	1. test va<31:29> -- these must be 000 or 111 (or you get a fault)
 *	2. concatenate context_reg<2:0> and va<29:18> to get a 15 bit number;
 *	   use this to index the segment maps, yielding a 7 or 9 bit value.
 * (for 3-level sun4)
 *	1. concatenate context_reg<3:0> and va<31:24> to get a 8 bit number;
 *	   use this to index the region maps, yielding a 10 bit value.
 *	2. take the value from (1) above and concatenate va<17:12> to
 *	   get a `segment map entry' index.  This gives a 9 bit value.
 * (for sun4c)
 *	3. take the value from (2) above and concatenate va<17:12> to
 *	   get a `page map entry' index.  This gives a 32-bit PTE.
 * (for sun4)
 *	3. take the value from (2 or 3) above and concatenate va<17:13> to
 *	   get a `page map entry' index.  This gives a 32-bit PTE.
 **
 * For sun4m:
 *	1. Use context_reg<3:0> to index the context table (located at
 *	   (context_reg << 2) | ((ctx_tbl_ptr_reg >> 2) << 6) ). This
 *	   gives a 32-bit page-table-descriptor (PTP).
 *	2. Use va<31:24> to index the region table located by the PTP from (1):
 *	   PTP<31:6> << 10. This gives another PTP for the segment tables
 *	3. Use va<23:18> to index the segment table located by the PTP from (2)
 *	   as follows: PTP<31:4> << 8. This gives another PTP for the page tbl.
 * 	4. Use va<17:12> to index the page table given by (3)'s PTP:
 * 	   PTP<31:4> << 8. This gives a 32-bit PTE.
 *
 * In other words:
 *
 *	struct sun4_3_levelmmu_virtual_addr {
 *		u_int	va_reg:8,	(virtual region)
 *			va_seg:6,	(virtual segment)
 *			va_pg:5,	(virtual page within segment)
 *			va_off:13;	(offset within page)
 *	};
 *	struct sun4_virtual_addr {
 *		u_int	:2,		(required to be the same as bit 29)
 *			va_seg:12,	(virtual segment)
 *			va_pg:5,	(virtual page within segment)
 *			va_off:13;	(offset within page)
 *	};
 *	struct sun4c_virtual_addr {
 *		u_int	:2,		(required to be the same as bit 29)
 *			va_seg:12,	(virtual segment)
 *			va_pg:6,	(virtual page within segment)
 *			va_off:12;	(offset within page)
 *	};
 *
 *	struct sun4m_virtual_addr {
 *		u_int	va_reg:8,	(virtual region)
 *			va_seg:6,	(virtual segment within region)
 *			va_pg:6,	(virtual page within segment)
 *			va_off:12;	(offset within page)
 *	};
 *
 * Then, given any `va':
 *
 *	extern smeg_t regmap[16][1<<8];		(3-level MMU only)
 *	extern pmeg_t segmap[8][1<<12];		([16][1<<12] for sun4)
 *	extern int ptetable[128][1<<6];		([512][1<<5] for sun4)
 *
 *	extern u_int  s4m_ctxmap[16];		(sun4m SRMMU only)
 *	extern u_int  s4m_regmap[16][1<<8];	(sun4m SRMMU only)
 * 	extern u_int  s4m_segmap[1<<8][1<<6];	(sun4m SRMMU only)
 * 	extern u_int  s4m_pagmap[1<<14][1<<6];	(sun4m SRMMU only)
 *
 * (the above being in the hardware, accessed as Alternate Address Spaces on
 *  all machines but the Sun4m SRMMU, in which case the tables are in physical
 *  kernel memory. In the 4m architecture, the tables are not layed out as
 *  2-dim arrays, but are sparsely allocated as needed, and point to each
 *  other.)
 *
 *	if (cputyp==CPU_SUN4M) 		// SPARC Reference MMU
 *		regptp = s4m_ctxmap[curr_ctx];
 *		if (!(regptp & SRMMU_TEPTD)) TRAP();
 *		segptp = *(u_int *)(((regptp & ~0x3) << 4) | va.va_reg);
 *		if (!(segptp & SRMMU_TEPTD)) TRAP();
 *		pagptp = *(u_int *)(((segptp & ~0x3) << 4) | va.va_seg);
 *		if (!(pagptp & SRMMU_TEPTD)) TRAP();
 *		pte = *(u_int *)(((pagptp & ~0x3) << 4) | va.va_pg);
 *		if (!(pte & SRMMU_TEPTE)) TRAP();       // like PG_V
 * 		if (usermode && PTE_PROT_LEVEL(pte) > 0x5) TRAP();
 *		if (writing && !PTE_PROT_LEVEL_ALLOWS_WRITING(pte)) TRAP();
 *		if (!(pte & SRMMU_PG_C)) DO_NOT_USE_CACHE_FOR_THIS_ACCESS();
 *		pte |= SRMMU_PG_R;
 * 		if (writing) pte |= SRMMU_PG_M;
 * 		physaddr = ((pte & SRMMU_PG_PFNUM) << SRMMU_PGSHIFT)|va.va_off;
 *		return;
 *	if (mmu_3l)
 *		physreg = regmap[curr_ctx][va.va_reg];
 *		physseg = segmap[physreg][va.va_seg];
 *	else
 *		physseg = segmap[curr_ctx][va.va_seg];
 *	pte = ptetable[physseg][va.va_pg];
 *	if (!(pte & PG_V)) TRAP();
 *	if (writing && !pte.pg_w) TRAP();
 *	if (usermode && pte.pg_s) TRAP();
 *	if (pte & PG_NC) DO_NOT_USE_CACHE_FOR_THIS_ACCESS();
 *	pte |= PG_U;					(mark used/accessed)
 *	if (writing) pte |= PG_M;			(mark modified)
 *	ptetable[physseg][va.va_pg] = pte;
 *	physadr = ((pte & PG_PFNUM) << PAGE_SHIFT) | va.va_off;
 */

#if defined(SUN4_MMU3L) && !defined(SUN4)
#error "configuration error"
#endif

#define	NBPRG	(1 << 24)	/* bytes per region */
#define	RGSHIFT	24		/* log2(NBPRG) */
#define	RGOFSET	(NBPRG - 1)	/* mask for region offset */
#define NSEGRG	(NBPRG / NBPSG)	/* segments per region */

#define	NBPSG	(1 << 18)	/* bytes per segment */
#define	SGSHIFT	18		/* log2(NBPSG) */
#define	SGOFSET	(NBPSG - 1)	/* mask for segment offset */

/* number of PTEs that map one segment (not number that fit in one segment!) */
#if (defined(SUN4) || defined(SUN4E)) && (defined(SUN4C) || defined(SUN4D) || defined(SUN4M))
extern int nptesg;
#define	NPTESG	nptesg		/* (which someone will have to initialize) */
#else
#define	NPTESG	(NBPSG / PAGE_SIZE)
#endif

/* virtual address to virtual region number */
#define	VA_VREG(va)	(((unsigned int)(va) >> RGSHIFT) & 255)

/* virtual address to virtual segment number */
#define	VA_VSEG(va)	(((unsigned int)(va) >> SGSHIFT) & 63)

/* virtual address to virtual page number, for Sun-4 and Sun-4c */
#define	VA_SUN4_VPG(va)		(((int)(va) >> 13) & 31)
#define	VA_SUN4C_VPG(va)	(((int)(va) >> 12) & 63)
#define VA_SUN4M_VPG(va)	(((int)(va) >> 12) & 63)

/* virtual address to offset within page */
#define VA_SUN4_OFF(va)       	(((int)(va)) & 0x1FFF)
#define VA_SUN4C_OFF(va)     	(((int)(va)) & 0xFFF)
#define VA_SUN4M_OFF(va)	(((int)(va)) & 0xFFF)

/* truncate virtual address to region base */
#define	VA_ROUNDDOWNTOREG(va)	((int)(va) & ~RGOFSET)

/* truncate virtual address to segment base */
#define	VA_ROUNDDOWNTOSEG(va)	((int)(va) & ~SGOFSET)

/* virtual segment to virtual address (must sign extend on holy MMUs!) */
#define	VRTOVA(vr)	((CPU_ISSUN4M || HASSUN4_MMU3L)	\
	? ((int)(vr) << RGSHIFT)			\
	: (((int)(vr) << (RGSHIFT+2)) >> 2))
#define	VSTOVA(vr,vs)	((CPU_ISSUN4M || HASSUN4_MMU3L)	\
	? (((int)(vr) << RGSHIFT) + ((int)(vs) << SGSHIFT))	\
	: ((((int)(vr) << (RGSHIFT+2)) >> 2) + ((int)(vs) << SGSHIFT)))

extern int mmu_has_hole;
#define VA_INHOLE(va)	(mmu_has_hole \
	? ( (unsigned int)(((int)(va) >> PG_VSHIFT) + 1) > 1) \
	: 0)

/* Define the virtual address space hole */
#define MMU_HOLE_START	0x20000000
#define MMU_HOLE_END	0xe0000000

#if defined(SUN4D) || defined(SUN4M) /* Optimization: sun4c/d/m have same */
#if defined(SUN4) || defined(SUN4E)  /* page size, so they're used interchangeably */
#define VA_VPG(va)	(CPU_ISSUN4OR4E ? VA_SUN4_VPG(va) : VA_SUN4C_VPG(va))
#define VA_OFF(va)	(CPU_ISSUN4OR4E ? VA_SUN4_OFF(va) : VA_SUN4C_OFF(va))
#else
#define VA_VPG(va)	VA_SUN4M_VPG(va)
#define VA_OFF(va)	VA_SUN4M_OFF(va)
#endif /* defined SUN4 || defined SUN4E */
#else /* 4d,4m not defined */
#if (defined(SUN4) || defined(SUN4E)) && defined(SUN4C)
#define VA_VPG(va)	(CPU_ISSUN4C ? VA_SUN4C_VPG(va) : VA_SUN4_VPG(va))
#define VA_OFF(va)	(CPU_ISSUN4C ? VA_SUN4C_OFF(va) : VA_SUN4_OFF(va))
#endif
#if defined(SUN4C) && !(defined(SUN4) || defined(SUN4E))
#define VA_VPG(va)	VA_SUN4C_VPG(va)
#define VA_OFF(va)	VA_SUN4C_OFF(va)
#endif
#if !defined(SUN4C) && (defined(SUN4) || defined(SUN4E))
#define	VA_VPG(va)	VA_SUN4_VPG(va)
#define VA_OFF(va)	VA_SUN4_OFF(va)
#endif
#endif /* defined 4d,4m */

/* there is no `struct pte'; we just use `int'; this is for non-4M only */
#define	PG_V		0x80000000
#define	PG_PROT		0x60000000	/* both protection bits */
#define	PG_W		0x40000000	/* allowed to write */
#define	PG_S		0x20000000	/* supervisor only */
#define	PG_NC		0x10000000	/* non-cacheable */
#define	PG_TYPE		0x0c000000	/* both type bits */

#define	PG_OBMEM	0x00000000	/* on board memory */
#define	PG_OBIO		0x04000000	/* on board I/O (incl. SBus on 4c) */
#define	PG_VME16	0x08000000	/* 16-bit-data VME space */
#define	PG_VME32	0x0c000000	/* 32-bit-data VME space */
#if defined(SUN4D) || defined(SUN4M)
#define PG_SUN4M_OBMEM	0x0	       	/* No type bits=>obmem on 4m */
#define PG_SUN4M_OBIO	0xf		/* obio maps to 0xf on 4M */
#define SRMMU_PGTYPE	0xf0000000	/* Top 4 bits of pte PPN give type */
#endif

#define	PG_U		0x02000000
#define	PG_M		0x01000000
#define PG_IOC		0x00800000
#define	PG_MBZ		0x00780000	/* unused; must be zero (oh really?) */
#define	PG_PFNUM	0x0007ffff	/* n.b.: only 16 bits on sun4c */

#define	PG_TNC_SHIFT	26		/* shift to get PG_TYPE + PG_NC */
#define	PG_M_SHIFT	24		/* shift to get PG_M, PG_U */
#define PG_M_SHIFT4M	5		/* shift to get SRMMU_PG_M,R on 4m */
/*efine	PG_NOACC	0		** XXX */
#define	PG_KR		0x20000000
#define	PG_KW		0x60000000
#define	PG_URKR		0
#define	PG_UW		0x40000000

#ifdef KGDB
/* but we will define one for gdb anyway */
struct pte {
	u_int	pg_v:1,
		pg_w:1,
		pg_s:1,
		pg_nc:1;
	enum pgtype { pg_obmem, pg_obio, pg_vme16, pg_vme32 } pg_type:2;
	u_int	pg_u:1,
		pg_m:1,
		pg_mbz:5,
		pg_pfnum:19;
};
#if defined(SUN4M)
struct srmmu_pte {
	u_int	pg_pfnum:20,
		pg_c:1,
		pg_m:1,
		pg_u:1;
	enum pgprot { pprot_r_r, pprot_rw_rw, pprot_rx_rx, pprot_rwx_rwx,
		      pprot_x_x, pprot_r_rw, pprot_n_rx, pprot_n_rwx }
		pg_prot:3;	/* prot. bits: pprot_<user>_<supervisor> */
	u_int	pg_must_be_2:2;
};
#endif
#endif

/*
 * These are needed in the register window code
 * to check the validity of (ostensible) user stack PTEs.
 */
#define	PG_VSHIFT	29		/* (va>>vshift)==0 or -1 => valid */
	/* XXX fix this name, it is a va shift not a pte bit shift! */

#define	PG_PROTSHIFT	29
#define	PG_PROTUWRITE	6		/* PG_V,PG_W,!PG_S */
#define	PG_PROTUREAD	4		/* PG_V,!PG_W,!PG_S */

/* %%%: Fix above and below for 4m? */

/* static __inline int PG_VALID(void *va) {
	register int t = va; t >>= PG_VSHIFT; return (t == 0 || t == -1);
} */

/*
 * Here are the bit definitions for 4M/SRMMU pte's
 */
		/* MMU TABLE ENTRIES */
#define SRMMU_TEINVALID	0x0		/* invalid (serves as !valid bit) */
#define	SRMMU_TEPTD	0x1		/* Page Table Descriptor */
#define SRMMU_TEPTE	0x2		/* Page Table Entry */
#define SRMMU_TERES	0x3		/* reserved */
#define SRMMU_TETYPE	0x3		/* mask for table entry type */
		/* PTE FIELDS */
#define SRMMU_PPNMASK	0xFFFFFF00
#define SRMMU_PPNSHIFT	0x8
#define SRMMU_PPNPASHIFT 0x4 		/* shift to put ppn into PAddr */
#define SRMMU_L1PPNSHFT	0x14
#define SRMMU_L1PPNMASK	0xFFF00000
#define SRMMU_L2PPNSHFT 0xE
#define SRMMU_L2PPNMASK	0xFC000
#define SRMMU_L3PPNSHFT	0x8
#define SRMMU_L3PPNMASK 0x3F00
		/* PTE BITS */
#define SRMMU_PG_C	0x80		/* cacheable */
#define SRMMU_PG_M	0x40		/* modified (dirty) */
#define SRMMU_PG_R	0x20		/* referenced */
#define SRMMU_PGBITSMSK	0xE0
		/* PTE PROTECTION */
#define SRMMU_PROT_MASK	0x1C		/* Mask protection bits out of pte */
#define SRMMU_PROT_SHFT	0x2
#define PPROT_R_R	0x0		/* These are in the form:	*/
#define PPROT_RW_RW	0x4		/* 	PPROT_<u>_<s>		*/
#define PPROT_RX_RX	0x8		/* where <u> is the user-mode	*/
#define PPROT_RWX_RWX	0xC		/* permission, and <s> is the 	*/
#define PPROT_X_X	0x10		/* supervisor mode permission.	*/
#define PPROT_R_RW	0x14		/* R=read, W=write, X=execute	*/
#define PPROT_N_RX	0x18		/* N=none.			*/
#define PPROT_N_RWX	0x1C
#define PPROT_WRITE	0x4		/* set iff write priv. allowed  */
#define PPROT_S		0x18		/* effective S bit */
#define PPROT_U2S_OMASK 0x18		/* OR with prot. to revoke user priv */
		/* TABLE SIZES */
#define SRMMU_L1SIZE	0x100
#define SRMMU_L2SIZE 	0x40
#define SRMMU_L3SIZE	0x40


code:
/*	$OpenBSD: ptrace.h,v 1.5 2004/02/08 00:04:20 deraadt Exp $	*/
/*	$NetBSD: ptrace.h,v 1.4 1994/11/20 20:53:27 deraadt Exp $ */

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)ptrace.h	8.1 (Berkeley) 6/11/93
 */

/*
 * SPARC-dependent ptrace definitions.
 */
#define	PT_GETREGS	(PT_FIRSTMACH + 0)
#define	PT_SETREGS	(PT_FIRSTMACH + 1)
#define	PT_GETFPREGS	(PT_FIRSTMACH + 2)
#define	PT_SETFPREGS	(PT_FIRSTMACH + 3)
#define	PT_WCOOKIE	(PT_FIRSTMACH + 4)

#ifdef _KERNEL
register_t process_get_wcookie(struct proc *p);
#endif

license: unknown


code:
/*	$OpenBSD: reg.h,v 1.3 2003/06/02 23:27:54 millert Exp $	*/
/*	$NetBSD: reg.h,v 1.4 1994/11/20 20:53:28 deraadt Exp $ */

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)reg.h	8.1 (Berkeley) 6/11/93
 */

#ifndef _MACHINE_REG_H_
#define	_MACHINE_REG_H_

/*
 * Registers passed to trap/syscall/etc.
 * This structure is known to occupy exactly 80 bytes (see locore.s).
 * Note, tf_global[0] is not actually written (since g0 is always 0).
 * (The slot tf_global[0] is used to send a copy of %wim to kernel gdb.
 * This is known as `cheating'.)
 */
struct trapframe {
	int	tf_psr;		/* psr */
	int	tf_pc;		/* return pc */
	int	tf_npc;		/* return npc */
	int	tf_y;		/* %y register */
	int	tf_global[8];	/* global registers in trap's caller */
	int	tf_out[8];	/* output registers in trap's caller */
};

/*
 * Register windows.  Each stack pointer (%o6 aka %sp) in each window
 * must ALWAYS point to some place at which it is safe to scribble on
 * 64 bytes.  (If not, your process gets mangled.)  Furthermore, each
 * stack pointer should be aligned on an 8-byte boundary (the kernel
 * as currently coded allows arbitrary alignment, but with a hefty
 * performance penalty).
 */
struct rwindow {
	int	rw_local[8];		/* %l0..%l7 */
	int	rw_in[8];		/* %i0..%i7 */
};

/*
 * Clone trapframe for now; this seems to be the more useful
 * than the old struct reg above.
 */
struct reg {
	int	r_psr;		/* psr */
	int	r_pc;		/* return pc */
	int	r_npc;		/* return npc */
	int	r_y;		/* %y register */
	int	r_global[8];	/* global registers in trap's caller */
	int	r_out[8];	/* output registers in trap's caller */
};

#include <machine/fsr.h>

/*
 * FP coprocessor registers.
 *
 * FP_QSIZE is the maximum coprocessor instruction queue depth
 * of any implementation on which the kernel will run.  David Hough:
 * ``I'd suggest allowing 16 ... allowing an indeterminate variable
 * size would be even better''.  Of course, we cannot do that; we
 * need to malloc these.
 */
#define	FP_QSIZE	16

struct fp_qentry {
	int	*fq_addr;		/* the instruction's address */
	int	fq_instr;		/* the instruction itself */
};
struct fpstate {
	u_int	fs_regs[32];		/* our view is 32 32-bit registers */
	int	fs_fsr;			/* %fsr */
	int	fs_qsize;		/* actual queue depth */
	struct	fp_qentry fs_queue[FP_QSIZE];	/* queue contents */
};

/*
 * Clone fpstate into an fpreg structure to satisfy <kern/sys_process.c>
 */
struct fpreg {
	u_int	fr_regs[32];		/* our view is 32 32-bit registers */
	int	fr_fsr;			/* %fsr */
	int	fr_qsize;		/* actual queue depth */
	struct	fp_qentry fr_queue[FP_QSIZE];	/* queue contents */
};

#endif /* _MACHINE_REG_H_ */


code:
/*	$OpenBSD: reloc.h,v 1.5 2011/03/23 16:54:37 pirofti Exp $	*/
/*
 * Copyright (c) 2001 Artur Grabowski <art@openbsd.org>
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef	_MACHINE_RELOC_H_
#define	_MACHINE_RELOC_H_

#define RELOC_NONE	0

#define RELOC_COPY	19
#define RELOC_GLOB_DAT	20
#define RELOC_JMP_SLOT	21
#define RELOC_RELATIVE	22

#endif	/* _MACHINE_RELOC_H_ */


code:
/*	$OpenBSD: scfio.h,v 1.3 2009/11/02 22:31:50 sobrado Exp $	*/

/*
 * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
 * All rights reserved.
 *
 * This software was developed by Jason L. Wright under contract with
 * RTMX Incorporated (http://www.rtmx.com).
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * ioctls and flags for sysconfig registers on Force CPU-5V boards.
 */

/* led1/led2 */
#define	SCF_LED_COLOR_MASK	0x03	/* color bits */
#define	SCF_LED_COLOR_OFF	0x00	/* led off */
#define	SCF_LED_COLOR_GREEN	0x01	/* green led */
#define	SCF_LED_COLOR_RED	0x02	/* red led */
#define	SCF_LED_COLOR_YELLOW	0x03	/* yellow led */
#define	SCF_LED_BLINK_MASK	0x0c	/* blink bits */
#define	SCF_LED_BLINK_NONE	0x00	/* steady led */
#define	SCF_LED_BLINK_HALF	0x04	/* blink 1/2 Hz */
#define	SCF_LED_BLINK_ONE	0x08	/* blink 1 Hz */
#define	SCF_LED_BLINK_TWO	0x0c	/* blink 2 Hz */

/* 7 segment led */
#define	SCF_7LED_A		0x01	/* Layout:	*/
#define	SCF_7LED_B		0x02	/*	AAA	*/
#define	SCF_7LED_C		0x04	/*     FF BB	*/
#define	SCF_7LED_D		0x08	/*	GGG	*/
#define	SCF_7LED_E		0x10	/*     EE CC	*/
#define	SCF_7LED_F		0x20	/*      DDD  P	*/
#define	SCF_7LED_G		0x40
#define	SCF_7LED_P		0x80

/* flash memory control */
#define	SCF_FMCTRL_SELROM	0x01	/* select boot/user flash */
#define	SCF_FMCTRL_SELBOOT	0x02	/* select 1st/2nd flash */
#define	SCF_FMCTRL_WRITEV	0x04	/* turn on write voltage */
#define	SCF_FMCTRL_SELADDR	0x38	/* address 21:19 bits */

#define	SCFIOCSLED1	_IOW('S', 0x01, u_int8_t)	/* set led1 */
#define	SCFIOCGLED1	_IOR('S', 0x02, u_int8_t)	/* get led1 */
#define	SCFIOCSLED2	_IOW('S', 0x03, u_int8_t)	/* set led2 */
#define	SCFIOCGLED2	_IOR('S', 0x04, u_int8_t)	/* get led2 */
#define	SCFIOCSLED7	_IOW('S', 0x05, u_int8_t)	/* set 7-segment led */
#define	SCFIOCGLED7	_IOW('S', 0x06, u_int8_t)	/* get 7-segment led */
#define	SCFIOCGROT	_IOR('S', 0x07, u_int8_t)	/* get rotary sw */
#define	SCFIOCSFMCTRL	_IOW('S', 0x08, u_int8_t)	/* set flash ctrl */
#define	SCFIOCGFMCTRL	_IOR('S', 0x09, u_int8_t)	/* get flash ctrl */


code:
/*	$OpenBSD: setjmp.h,v 1.2 1997/08/08 08:26:47 downsj Exp $	*/
/*	$NetBSD: setjmp.h,v 1.1 1994/12/20 10:37:10 cgd Exp $	*/

/*
 * machine/setjmp.h: machine dependent setjmp-related information.
 */

#define	_JBLEN	10		/* size, in longs, of a jmp_buf */


code:
/*	$OpenBSD: signal.h,v 1.11 2013/04/01 17:18:20 deraadt Exp $	*/
/*	$NetBSD: signal.h,v 1.4 1996/02/01 22:32:35 mycroft Exp $ */

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)signal.h	8.1 (Berkeley) 6/11/93
 */

#ifndef	_MACHINE_SIGNAL_H_
#define _MACHINE_SIGNAL_H_

#ifndef _LOCORE
#include <sys/cdefs.h>

typedef int sig_atomic_t;

#if __BSD_VISIBLE || __XPG_VISIBLE >= 420
/*
 * Information pushed on stack when a signal is delivered.
 * This is used by the kernel to restore state following
 * execution of the signal handler.  It is also made available
 * to the handler to allow it to restore state properly if
 * a non-standard exit is performed.
 */
struct sigcontext {
	int	__sc_unused;
	int	sc_mask;		/* signal mask to restore */
	/* begin machine dependent portion */
	int	sc_sp;			/* %sp to restore */
	int	sc_pc;			/* pc to restore */
	int	sc_npc;			/* npc to restore */
	int	sc_psr;			/* psr to restore */
	int	sc_g1;			/* %g1 to restore */
	int	sc_o0;			/* %o0 to restore */
};
#endif /* __BSD_VISIBLE || __XPG_VISIBLE >= 420 */
#else /* _LOCORE */
#define	SC_SP_OFFSET	8
#define	SC_PC_OFFSET	12
#define	SC_NPC_OFFSET	16
#define	SC_PSR_OFFSET	20
#define	SC_G1_OFFSET	24
#define	SC_O0_OFFSET	28
#endif /* _LOCORE */

#if defined(_LOCORE) || defined(_KERNEL)
/*
 * `Code' arguments to signal handlers.  The names, and the funny numbering.
 * are defined so as to match up with what SunOS uses; I have no idea why
 * they did the numbers that way, except maybe to match up with the 68881.
 */
#define	FPE_INTOVF_TRAP		0x01	/* integer overflow */
#define	FPE_INTDIV_TRAP		0x14	/* integer divide by zero */
#define	FPE_FLTINEX_TRAP	0xc4	/* inexact */
#define	FPE_FLTDIV_TRAP		0xc8	/* divide by zero */
#define	FPE_FLTUND_TRAP		0xcc	/* underflow */
#define	FPE_FLTOPERR_TRAP	0xd0	/* operand error */
#define	FPE_FLTOVF_TRAP		0xd4	/* overflow */
#endif /* _LOCORE || __BSD_VISIBLE */
#endif	/* !_MACHINE_SIGNAL_H_ */


code:
/*	$OpenBSD: spinlock.h,v 1.3 2013/06/01 20:47:40 tedu Exp $	*/

#ifndef _MACHINE_SPINLOCK_H_
#define _MACHINE_SPINLOCK_H_

#define _ATOMIC_LOCK_UNLOCKED	(0x00)
#define _ATOMIC_LOCK_LOCKED	(0xFF)
typedef unsigned char _atomic_lock_t;

#ifndef _KERNEL
int _atomic_lock(volatile _atomic_lock_t *);
#endif

#endif


code:
/*	$OpenBSD: stdarg.h,v 1.16 2014/03/11 19:45:27 guenther Exp $	*/
/*	$NetBSD: stdarg.h,v 1.10 1996/12/27 20:55:28 pk Exp $ */

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	from: @(#)stdarg.h	8.2 (Berkeley) 9/27/93
 */

#ifndef _MACHINE_STDARG_H_
#define	_MACHINE_STDARG_H_

#include <sys/cdefs.h>
#include <machine/_types.h>

typedef __va_list	va_list;

#define	__va_size(type) \
	(((sizeof(type) + sizeof(long) - 1) / sizeof(long)) * sizeof(long))

#define	va_start(ap, last) \
	(__builtin_next_arg(last), (ap) = (va_list)__builtin_saveregs())

/*
 * va_arg picks up the next argument of type `type'.  Appending an
 * asterisk to `type' must produce a pointer to `type' (i.e., `type'
 * may not be, e.g., `int (*)()').
 *
 * Gcc-2.x tries to use ldd/std for double and quad_t values, but Sun's
 * brain-damaged calling convention does not quad-align these.  Thus, for
 * 8-byte arguments, we have to pick up the actual value four bytes at a
 * time, and use type punning (i.e., a union) to produce the result.
 * (We could also do this with a libc function, actually, by returning
 * 8 byte integers in %o0+%o1 and the same 8 bytes as a double in %f0+%f1.)
 *
 * Note: We don't declare __d with type `type', since in C++ the type might
 * have a constructor.
 */
#define	__va_8byte(ap, type) \
	__statement({							\
		union { char __d[sizeof(type)]; int __i[2]; } __va_u;	\
		__va_u.__i[0] = ((int *)(void *)(ap))[0];		\
		__va_u.__i[1] = ((int *)(void *)(ap))[1];		\
		(ap) += 8; *(type *)(va_list)__va_u.__d;		\
	})

#define	__va_arg(ap, type) \
	(*(type *)((ap) += __va_size(type),			\
		   (ap) - (sizeof(type) < sizeof(long) &&	\
			   sizeof(type) != __va_size(type) ?	\
			   sizeof(type) : __va_size(type))))

#define	__RECORD_TYPE_CLASS	12
#define va_arg(ap, type) \
	(__builtin_classify_type(*(type *)0) >= __RECORD_TYPE_CLASS ?	\
	 *__va_arg(ap, type *) : __va_size(type) == 8 ?			\
	 __va_8byte(ap, type) : __va_arg(ap, type))

#if __ISO_C_VISIBLE >= 1999
#define __va_copy(dest, src) \
	((dest) = (src))
#endif

#define va_end(ap)

#endif /* !_MACHINE_STDARG_H_ */


code:
/*	$OpenBSD: tcb.h,v 1.4 2014/03/29 18:09:30 guenther Exp $	*/

/*
 * Copyright (c) 2011 Philip Guenther <guenther@openbsd.org>
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef _MACHINE_TCB_H_
#define _MACHINE_TCB_H_

#ifdef _KERNEL

#include <machine/reg.h>

/*
 * In userspace, register %g7 contains the address of the thread's TCB
 */
#define TCB_GET(p)		\
	((void *)(p)->p_md.md_tf->tf_global[7])
#define TCB_SET(p, addr)	\
	((p)->p_md.md_tf->tf_global[7] = (int)(addr))

#else /* _KERNEL */

/* ELF TLS ABI calls for big TCB, with static TLS data at negative offsets */
#define TLS_VARIANT	2

#if 0	/* XXX perhaps use the gcc global register extension? */
struct thread_control_block;
__register__ struct thread_control_block *__tcb __asm__ ("%g7");
#define TCB_GET()		(__tcb)
#define TCB_GET_MEMBER(member)	((void *)(__tcb->member))
#define TCB_SET(tcb)		((__tcb) = (tcb))

#else

#include <stddef.h>		/* for offsetof */

/* Get a pointer to the TCB itself */
static inline void *
__sparc_get_tcb(void)
{
	void *val;
	__asm__ ("mov %%g7, %0" : "=r" (val));
	return val;
}
#define TCB_GET()		__sparc_get_tcb()

/* Get the value of a specific member in the TCB */
static inline void *
__sparc_read_tcb(int offset)
{
	void	*val;
	__asm__ ("ld [%%g7 + %1], %0" : "=r" (val) : "r" (offset));
	return val;
}
#define TCB_GET_MEMBER(member)	\
	__sparc_read_tcb(offsetof(struct thread_control_block, member))

#define TCB_SET(tcb)	__asm volatile("mov %0, %%g7" : : "r" (tcb))

#endif /* 0 */

#endif /* _KERNEL */

#endif /* _MACHINE_TCB_H_ */


code:
/*	$OpenBSD: trap.h,v 1.6 2013/06/03 18:46:02 kettenis Exp $	*/
/*	$NetBSD: trap.h,v 1.9 1996/05/16 15:57:04 abrown Exp $ */

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)trap.h	8.1 (Berkeley) 6/11/93
 */
/*
 * Sun4m support by Aaron Brown, Harvard University.
 * Changes Copyright (c) 1995 The President and Fellows of Harvard College.
 * All rights reserved.
 */

#ifndef	_MACHINE_TRAP_H
#define	_MACHINE_TRAP_H

/*
 * vectors 0x00..0x1f are common to all sparc implementations, while
 * vectors 0x20..0x2f are selectively implemented by some v8 cpu's
 * either to support new instructions or simplify fault decoding.
 * For sanity, these defines should match the layout of the trap
 * table, but some cases may be treated in common.  The priorities
 * listed are correct, but the v8 traps been inserted "between levels".
 */

/*	trap		vec	  (pri) description	*/
#define	T_RESET		0x00	/* (1) not actually vectored; jumps to 0 */
#define	T_TEXTFAULT	0x01	/* (2) address fault during instr fetch */
#define	T_ILLINST	0x02	/* (3) illegal instruction */
#define	T_PRIVINST	0x03	/* (4) privileged instruction */
#define	T_FPDISABLED	0x04	/* (5) fp instr while fp disabled */
#define	T_WINOF		0x05	/* (6) register window overflow */
#define	T_WINUF		0x06	/* (7) register window underflow */
#define	T_ALIGN		0x07	/* (8) address not properly aligned */
#define	T_FPE		0x08	/* (9) floating point exception */
#define	T_DATAFAULT	0x09	/* (10) address fault during data fetch */
#define	T_TAGOF		0x0a	/* (11) tag overflow */
/*			0x0b	   unused */
/*			0x0c	   unused */
/*			0x0d	   unused */
/*			0x0e	   unused */
/*			0x0f	   unused */
/*			0x10	   unused */
#define	T_L1INT		0x11	/* (27) level 1 interrupt */
#define	T_L2INT		0x12	/* (26) level 2 interrupt */
#define	T_L3INT		0x13	/* (25) level 3 interrupt */
#define	T_L4INT		0x14	/* (24) level 4 interrupt */
#define	T_L5INT		0x15	/* (23) level 5 interrupt */
#define	T_L6INT		0x16	/* (22) level 6 interrupt */
#define	T_L7INT		0x17	/* (21) level 7 interrupt */
#define	T_L8INT		0x18	/* (20) level 8 interrupt */
#define	T_L9INT		0x19	/* (19) level 9 interrupt */
#define	T_L10INT	0x1a	/* (18) level 10 interrupt */
#define	T_L11INT	0x1b	/* (17) level 11 interrupt */
#define	T_L12INT	0x1c	/* (16) level 12 interrupt */
#define	T_L13INT	0x1d	/* (15) level 13 interrupt */
#define	T_L14INT	0x1e	/* (14) level 14 interrupt */
#define	T_L15INT	0x1f	/* (13) level 15 interrupt */
#define T_RREGERROR	0x20	/* (?) r-register access error (v8?) */
#define T_TEXTERROR	0x21	/* (<2) error during instruction access (v8) */
/*			0x22	   unused */
/*	through		0x23	   unused */
#define	T_CPDISABLED	0x24	/* (5) coprocessor instr while disabled */
/*			0x25	   unused */
/*	through		0x27	   unused */
#define	T_CPEXCEPTION	0x28	/* (9) coprocessor exception */
#define T_DATAERROR	0x29	/* (<9) error during data access (v8) */
#define T_IDIV0		0x2a	/* (<11) integer divide by zero (v8) */
#define T_STOREBUFFAULT	0x2b	/* SuperSPARC: Store buffer copy-back fault */
/*			0x2c	   unused */
/*	through		0x7f	   unused */

/* beginning of `user' vectors (from trap instructions) - all priority 12 */
#define	T_SUN_SYSCALL	0x80	/* system call */
#define	T_BREAKPOINT	0x81	/* breakpoint `instruction' */
#define	T_DIV0		0x82	/* division routine was handed 0 */
#define	T_FLUSHWIN	0x83	/* flush windows */
#define	T_CLEANWIN	0x84	/* provide clean windows */
#define	T_RANGECHECK	0x85	/* ? */
#define	T_FIXALIGN	0x86	/* fix up unaligned accesses */
#define	T_INTOF		0x87	/* integer overflow ? */
#define	T_SVR4_SYSCALL	0x88	/* SVR4 system call */
#define	T_BSD_SYSCALL	0x89	/* BSD system call */
#define	T_KGDB_EXEC	0x8a	/* for kernel gdb */

/* 0x8b..0xff are currently unallocated, except the following */
#define T_SVR4_GETCC		0xa0
#define T_SVR4_SETCC		0xa1
#define T_SVR4_GETPSR		0xa2
#define T_SVR4_SETPSR		0xa3
#define T_SVR4_GETHRTIME	0xa4
#define T_SVR4_GETHRVTIME	0xa5
#define T_SVR4_GETHRESTIME	0xa7

#ifdef _KERNEL			/* pseudo traps for locore.s */
#define	T_RWRET		-1	/* need first user window for trap return */
#define	T_AST		-2	/* no-op, just needed reschedule or profile */
#endif

/* flags to system call (flags in %g1 along with syscall number) */
#define	SYSCALL_G2RFLAG	0x400	/* on success, return to %g2 rather than npc */

/*
 * `software trap' macros to keep people happy (sparc v8 manual says not
 * to set the upper bits).
 */
#define	ST_BREAKPOINT	(T_BREAKPOINT & 0x7f)
#define	ST_DIV0		(T_DIV0 & 0x7f)
#define	ST_FLUSHWIN	(T_FLUSHWIN & 0x7f)
#define	ST_SYSCALL	(T_SUN_SYSCALL & 0x7f)

#endif /* _MACHINE_TRAP_H_ */


code:
/*	$OpenBSD: varargs.h,v 1.7 2011/03/23 16:54:37 pirofti Exp $	*/
/*	$NetBSD: varargs.h,v 1.10 1995/12/29 18:53:02 mycroft Exp $ */

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 * (c) UNIX System Laboratories, Inc.
 * All or some portions of this file are derived from material licensed
 * to the University of California by American Telephone and Telegraph
 * Co. or Unix System Laboratories, Inc. and are reproduced herein with
 * the permission of UNIX System Laboratories, Inc.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	from: @(#)varargs.h	8.3 (Berkeley) 3/22/94
 */

#ifndef _MACHINE_VARARGS_H_
#define	_MACHINE_VARARGS_H_

#include <machine/stdarg.h>

#if __GNUC__ == 1
#define	__va_ellipsis
#else
#define	__va_ellipsis	...
#endif

#define	va_alist	__builtin_va_alist
#define	va_dcl		long __builtin_va_alist; __va_ellipsis

#undef va_start
#define	va_start(ap) \
	((ap) = (va_list)__builtin_saveregs())

#endif /* !_MACHINE_VARARGS_H_ */


code:
/*	$OpenBSD: vmparam.h,v 1.46 2015/06/02 04:31:53 miod Exp $	*/
/*	$NetBSD: vmparam.h,v 1.13 1997/07/12 16:20:03 perry Exp $	*/

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)vmparam.h	8.1 (Berkeley) 6/11/93
 */

#ifndef _MACHINE_VMPARAM_H_
#define _MACHINE_VMPARAM_H_

/*
 * Machine dependent constants for SPARC
 */

/*
 * Virtual memory related constants, all in bytes
 */
#ifndef MAXTSIZ
#define	MAXTSIZ		(32*1024*1024)		/* max text size */
#endif
#ifndef DFLDSIZ
#define	DFLDSIZ		(64*1024*1024)		/* initial data size limit */
#endif
#ifndef MAXDSIZ
#define	MAXDSIZ		(256*1024*1024)		/* max data size */
#endif
#ifndef BRKSIZ
#define	BRKSIZ		MAXDSIZ			/* heap gap size */
#endif
#ifndef	DFLSSIZ
#define	DFLSSIZ		(2*1024*1024)		/* initial stack size limit */
#endif
#ifndef	MAXSSIZ
#define	MAXSSIZ		(32*1024*1024)		/* max stack size */
#endif

#define STACKGAP_RANDOM	64*1024
#define STACKGAP_RANDOM_SUN4M 256*1024

/*
 * Size of shared memory map
 */
#ifndef SHMMAXPGS
#define SHMMAXPGS	1024
#endif

/*
 * User/kernel map constants.  Note that sparc/vaddrs.h defines the
 * IO space virtual base, which must be the same as VM_MAX_KERNEL_ADDRESS:
 * tread with care.
 */

#define	VM_MIN_KERNEL_ADDRESS_OLD	((vaddr_t)KERNBASE)
#define	VM_MIN_KERNEL_ADDRESS_SUN4	((vaddr_t)0xf0000000)
#define	VM_MIN_KERNEL_ADDRESS_SRMMU	((vaddr_t)0xc0000000)

#if defined(SMALL_KERNEL)
/* limit to small KVA regardless of the cpu type */
#define	VM_MIN_KERNEL_ADDRESS	VM_MIN_KERNEL_ADDRESS_OLD
#define VM_MAXUSER_ADDRESS	VM_MIN_KERNEL_ADDRESS
#define VM_MAX_ADDRESS		VM_MIN_KERNEL_ADDRESS
#define	USRSTACK		VM_MIN_KERNEL_ADDRESS
#elif (defined(SUN4) || defined(SUN4C) || defined(SUN4E)) && \
      (defined(SUN4D) || defined(SUN4M))
/* user/kernel bound will de determined at run time */
extern vsize_t vm_kernel_space_size;
#define	VM_KERNEL_SPACE_SIZE	vm_kernel_space_size
#define VM_MAXUSER_ADDRESS	vm_min_kernel_address
#define VM_MAX_ADDRESS		vm_min_kernel_address
#define	USRSTACK		vm_min_kernel_address
#elif (defined(SUN4) || defined(SUN4C) || defined(SUN4E))
/* old Sun MMU with address hole */
#define	VM_MIN_KERNEL_ADDRESS	VM_MIN_KERNEL_ADDRESS_SUN4
#define VM_MAXUSER_ADDRESS	VM_MIN_KERNEL_ADDRESS
#define VM_MAX_ADDRESS		VM_MIN_KERNEL_ADDRESS
#define	USRSTACK		VM_MIN_KERNEL_ADDRESS
#else
/* SRMMU without address hole */
#define	VM_MIN_KERNEL_ADDRESS	VM_MIN_KERNEL_ADDRESS_SRMMU
#define VM_MAXUSER_ADDRESS	VM_MIN_KERNEL_ADDRESS
#define VM_MAX_ADDRESS		VM_MIN_KERNEL_ADDRESS
#define	USRSTACK		VM_MIN_KERNEL_ADDRESS
#endif

#define VM_MIN_ADDRESS		((vaddr_t)0x2000)
#define VM_MAX_KERNEL_ADDRESS	((vaddr_t)0xfe000000)

extern vaddr_t vm_pie_max_addr;
#define	VM_PIE_MAX_ADDR vm_pie_max_addr

#define	IOSPACE_BASE		VM_MAX_KERNEL_ADDRESS
#define	IOSPACE_LEN		0x01000000		/* 16 MB of iospace */

#define VM_PHYSSEG_MAX		32	/* we only have one "hole" */
#define VM_PHYSSEG_STRAT	VM_PSTRAT_BSEARCH
#define VM_PHYSSEG_NOADD		/* can't add RAM after vm_mem_init */

#if defined (_KERNEL)
void		dvma_mapout(vaddr_t, vaddr_t, int);
#endif

#endif /* _MACHINE_VMPARAM_H_ */


code:
/*	$OpenBSD: z8530var.h,v 1.5 2013/04/21 14:44:16 sebastia Exp $	*/
/*	$NetBSD: z8530var.h,v 1.1 1997/10/18 00:01:30 gwr Exp $	*/

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)zsvar.h	8.1 (Berkeley) 6/11/93
 */

#include <dev/ic/z8530sc.h>

/*
 * sparc64 and sgi use the same structure, but with more members
 * use it here too, just for more consistency.
 */
struct zs_channel {
	struct zs_chanstate	cs_zscs;	/* Required: soft state */
};

struct zsc_softc {
	struct	device 		zsc_dev;	/* required first: base device */
	void			*zsc_softih;	/* softintr cookie */
	struct	zs_chanstate 	*zsc_cs[2];	/* channel A and B soft state */
	struct  zs_channel	zsc_cs_store[2];
};

/*
 * Functions to read and write individual registers in a channel.
 * The ZS chip requires a 1.6 uSec. recovery time between accesses.
 * On the SparcStation the recovery time is handled in hardware.
 * On the older Sun4 machine it isn't, and software must do it.
 *
 * However, it *is* a problem on some Sun4m's (i.e. the SS20) (XXX: why?).
 * Thus we leave in the delay (done in the functions below).
 * XXX: (ABB) Think about this more.
 *
 * The functions below could be macros instead if we are concerned
 * about the function call overhead where ZS_DELAY does nothing.
 */

u_char zs_read_reg(struct zs_chanstate *cs, u_char reg);
u_char zs_read_csr(struct zs_chanstate *cs);
u_char zs_read_data(struct zs_chanstate *cs);

void  zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val);
void  zs_write_csr(struct zs_chanstate *cs, u_char val);
void  zs_write_data(struct zs_chanstate *cs, u_char val);

/* The sparc has splzs() in psl.h */

/* We want to call it "zs" instead of "zsc" (sigh). */
#ifndef ZSCCF_CHANNEL
#define ZSCCF_CHANNEL 0
#define ZSCCF_CHANNEL_DEFAULT -1
#endif


code: src/sys/arch/sparc/sparc

path: sys/arch/sparc/sparc/CVS/Repository


code:
/*	$OpenBSD: amd7930intr.s,v 1.12 2011/09/03 20:04:04 miod Exp $	*/
/*	$NetBSD: amd7930intr.s,v 1.10 1997/03/11 01:03:07 pk Exp $	*/
/*
 * Copyright (c) 1995 Rolf Grossmann.
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)bsd_audiointr.s	8.1 (Berkeley) 6/11/93
 */

#ifndef AUDIO_C_HANDLER
#include "assym.h"
#include <machine/param.h>
#include <sparc/sparc/intreg.h>
#include <machine/psl.h>
#include <machine/asm.h>

#include <dev/ic/am7930reg.h>

/*
 * Note the following code hardcodes soft interrupt level 4, instead of
 * picking the actual bits from the softintr cookie. We don't have enough
 * free registers to be able to pick it easily, anyway; it's just not
 * worth doing.
 */

#define AUDIO_SET_SWINTR_4C				\
	sethi	%hi(INTRREG_VA), %l5;			\
	ldub	[%l5 + %lo(INTRREG_VA)], %l6;		\
	or	%l6, IE_L4, %l6;			\
	stb	%l6, [%l5 + %lo(INTRREG_VA)]

! raise(0,IPL_AUSOFT)	! NOTE: CPU#0 and IPL_AUSOFT=4
#define AUDIO_SET_SWINTR_4M				\
	sethi	%hi(1 << (16 + 4)), %l5;		\
	set	ICR_PI_SET, %l6;			\
	st	%l5, [%l6]

/* set software interrupt */
#if (defined(SUN4) || defined(SUN4C)) && !defined(SUN4M)
#define AUDIO_SET_SWINTR	AUDIO_SET_SWINTR_4C
#elif !(defined(SUN4) || defined(SUN4C)) && defined(SUN4M)
#define AUDIO_SET_SWINTR	AUDIO_SET_SWINTR_4M
#else
#define AUDIO_SET_SWINTR				\
	sethi	%hi(_C_LABEL(cputyp)), %l5;		\
	ld	[%l5 + %lo(_C_LABEL(cputyp))], %l5;	\
	cmp	%l5, CPU_SUN4M;				\
	be	8f;					\
	AUDIO_SET_SWINTR_4C;				\
	ba,a	9f;					\
8:							\
	AUDIO_SET_SWINTR_4M;				\
9:
#endif

#define R_amd	%l2
#define R_data	%l3
#define R_end	%l4

	.seg	"data"
	.align	8
savepc:
	.word	0

	.seg	"text"
	.align	4
	.global _C_LABEL(amd7930_trap)
	.global	_C_LABEL(auiop)

_C_LABEL(amd7930_trap):
	sethi	%hi(savepc), %l7
	st	%l2, [%l7 + %lo(savepc)]

	! tally interrupt
	sethi	%hi(_C_LABEL(uvmexp)+V_INTR), %l7
	ld	[%l7 + %lo(_C_LABEL(uvmexp)+V_INTR)], %l6
	inc	%l6
	st	%l6, [%l7 + %lo(_C_LABEL(uvmexp)+V_INTR)]
	sethi	%hi(_C_LABEL(auiop)), %l7
	ld	[%l7 + %lo(_C_LABEL(auiop))], %l7

	ldd	[%l7 + AU_COUNT], %l2
	inccc	%l3
	addx	%l2, 0, %l2
	std	%l2, [%l7 + AU_COUNT]

	ld	[%l7 + AU_AMD], R_amd
	ldub    [R_amd + AM7930_DREG_IR], %g0	! clear interrupt

	! receive incoming data
	ld	[%l7 + AU_RDATA], R_data
	ld	[%l7 + AU_REND], R_end

	cmp	R_data, 0			! if (d && d <= e)
	be	1f
	cmp	R_data, R_end
	bgu	1f
	 nop

	ldub	[R_amd + AM7930_DREG_BBRB], %l6	! *d = amd->bbrb
	stb	%l6, [ R_data ]
	cmp	R_data, R_end
	inc	R_data				! au->au_rdata++
	bne	1f				! if (d == e)
	 st	R_data, [%l7 + AU_RDATA]

	ld	[%l7 + AU_SWIH], %l5
	mov	1, %l6
	st	%l6, [%l5 + SIH_PENDING]
	AUDIO_SET_SWINTR

1:
	! write outgoing data
	ld	[%l7 + AU_PDATA], R_data
	ld	[%l7 + AU_PEND], R_end

	cmp	R_data, 0			! if (d && d <= e)
	be	2f
	cmp	R_data, R_end
	bgu	2f
	 nop

	ldub	[ R_data ], %l6			! amd->bbtb = *d
	stb	%l6, [ R_amd + AM7930_DREG_BBTB ]

	cmp	R_data, R_end
	inc	R_data				! au->au_pdata++
	bne	2f				! if (d == e)
	 st	R_data, [%l7 + AU_PDATA]

	ld	[%l7 + AU_SWIH], %l5
	mov	1, %l6
	st	%l6, [%l5 + SIH_PENDING]
	AUDIO_SET_SWINTR

2:
	/*
	 * Restore psr -- note: psr delay honored by pc restore loads.
	 */
	mov	%l0, %psr
	sethi	%hi(savepc), %l7
	ld	[%l7 + %lo(savepc)], %l2
	jmp	%l1
	rett	%l2
#endif /* !AUDIO_C_HANDLER */


code:
/*	$OpenBSD: asm.h,v 1.6 2014/03/29 18:09:30 guenther Exp $	*/
/*	$NetBSD: asm.h,v 1.4 1996/07/01 18:01:26 abrown Exp $ */

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)asm.h	8.1 (Berkeley) 6/11/93
 */

/*
 * GCC __asm constructs for doing assembly stuff.
 */

/*
 * ``Routines'' to load and store from/to alternate address space.
 * The location can be a variable, the asi value (address space indicator)
 * must be a constant.
 *
 * N.B.: You can put as many special functions here as you like, since
 * they cost no kernel space or time if they are not used.
 *
 * These were static inline functions, but gcc screws up the constraints
 * on the address space identifiers (the "n"umeric value part) because
 * it inlines too late, so we have to use the funny valued-macro syntax.
 */

/* load byte from alternate address space */
#define	lduba(loc, asi) ({ \
	register int _lduba_v; \
	__asm volatile("lduba [%1]%2,%0" : "=r" (_lduba_v) : \
	    "r" ((int)(loc)), "n" (asi)); \
	_lduba_v; \
})

/* load half-word from alternate address space */
#define	lduha(loc, asi) ({ \
	register int _lduha_v; \
	__asm volatile("lduha [%1]%2,%0" : "=r" (_lduha_v) : \
	    "r" ((int)(loc)), "n" (asi)); \
	_lduha_v; \
})

/* load int from alternate address space */
#define	lda(loc, asi) ({ \
	register int _lda_v; \
	__asm volatile("lda [%1]%2,%0" : "=r" (_lda_v) : \
	    "r" ((int)(loc)), "n" (asi)); \
	_lda_v; \
})

/* store byte to alternate address space */
#define	stba(loc, asi, value) ({ \
	__asm volatile("stba %0,[%1]%2" : : \
	    "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
})

/* store half-word to alternate address space */
#define	stha(loc, asi, value) ({ \
	__asm volatile("stha %0,[%1]%2" : : \
	    "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
})

/* store int to alternate address space */
#define	sta(loc, asi, value) ({ \
	__asm volatile("sta %0,[%1]%2" : : \
	    "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
})

/* load 64-bit int from alternate address space */
#define	ldda(loc, asi) ({ \
	register long long _lda_v; \
	__asm volatile("ldda [%1]%2,%0" : "=r" (_lda_v) : \
	    "r" ((int)(loc)), "n" (asi)); \
	_lda_v; \
})

/* store 64-bit int to alternate address space */
#define	stda(loc, asi, value) ({ \
	__asm volatile("stda %0,[%1]%2" : : \
	    "r" ((long long)(value)), "r" ((int)(loc)), "n" (asi)); \
})

/* atomic swap of a word between a register and memory */
#define swap(loc, val) ({ \
        __asm volatile("swap [%2],%0" : "=&r" (val) : "0" (val), "r" (loc)); \
})

#define wrasr(value, asr) _wrasr(value, asr)
#define _wrasr(value, asr) ({ \
	__asm volatile("wr %0, 0, %%asr"#asr : : "r" ((int)(value))); \
})