code:
/*	$OpenBSD: mplock.h,v 1.1 2010/03/25 14:26:21 jsing Exp $	*/

/*
 * Copyright (c) 2004 Niklas Hallqvist.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_MPLOCK_H_
#define _MACHINE_MPLOCK_H_

/*
 * Really simple spinlock implementation with recursive capabilities.
 * Correctness is paramount, no fancyness allowed.
 */

#define	MPL_LOCKED	0
#define	MPL_UNLOCKED	1

struct __mp_lock {
	volatile int mpl_lock[4];
	volatile struct cpu_info *mpl_cpu;
	volatile long mpl_count;
};

#ifndef _LOCORE

void __mp_lock_init(struct __mp_lock *);
void __mp_lock(struct __mp_lock *);
void __mp_unlock(struct __mp_lock *);
int __mp_release_all(struct __mp_lock *);
int __mp_release_all_but_one(struct __mp_lock *);
void __mp_acquire_count(struct __mp_lock *, int);
int __mp_lock_held(struct __mp_lock *);

#endif

#endif /* !_MACHINE_MPLOCK_H */


code:
/*	$OpenBSD: mutex.h,v 1.6 2015/05/02 10:59:47 dlg Exp $	*/

/*
 * Copyright (c) 2004 Artur Grabowski <art@openbsd.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
 * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL  DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_MUTEX_H_
#define _MACHINE_MUTEX_H_

#define	MUTEX_UNLOCKED	{ 1, 1, 1, 1 }

/* Note: mtx_lock must be 16-byte aligned. */
struct mutex {
#ifdef MULTIPROCESSOR
	volatile int mtx_lock[4];
#endif
	int mtx_wantipl;
	int mtx_oldipl;
	void *mtx_owner;
};

/*
 * To prevent lock ordering problems with the kernel lock, we need to
 * make sure we block all interrupts that can grab the kernel lock.
 * The simplest way to achieve this is to make sure mutexes always
 * raise the interrupt priority level to the highest level that has
 * interrupts that grab the kernel lock.
 */
#ifdef MULTIPROCESSOR
#define __MUTEX_IPL(ipl) \
    (((ipl) > IPL_NONE && (ipl) < IPL_AUDIO) ? IPL_AUDIO : (ipl))
#define MUTEX_INITIALIZER(ipl) { MUTEX_UNLOCKED, __MUTEX_IPL((ipl)), 0, NULL }
#else
#define __MUTEX_IPL(ipl) (ipl)
#define MUTEX_INITIALIZER(ipl) { __MUTEX_IPL((ipl)), 0, NULL }
#endif

void __mtx_init(struct mutex *, int);
#define mtx_init(mtx, ipl) __mtx_init((mtx), __MUTEX_IPL((ipl)))

#ifdef DIAGNOSTIC
#define MUTEX_ASSERT_LOCKED(mtx) do {					\
	if ((mtx)->mtx_owner != curcpu())				\
		panic("mutex %p not held in %s", (mtx), __func__);	\
} while (0)

#define MUTEX_ASSERT_UNLOCKED(mtx) do {					\
	if ((mtx)->mtx_owner == curcpu())				\
		panic("mutex %p held in %s", (mtx), __func__);		\
} while (0)
#else
#define MUTEX_ASSERT_LOCKED(mtx) do { } while (0)
#define MUTEX_ASSERT_UNLOCKED(mtx) do { } while (0)
#endif

#define MUTEX_OLDIPL(mtx)	(mtx)->mtx_oldipl

#endif

license: unknown


code:
/*	$OpenBSD: nvm.h,v 1.2 1998/11/23 03:28:22 mickey Exp $	*/

/*
 * Copyright (c) 1990, 1994 The University of Utah and
 * the Computer Systems Laboratory at the University of Utah (CSL).
 * All rights reserved.
 *
 * Permission to use, copy, modify and distribute this software is hereby
 * granted provided that (1) source code retains these copyright, permission,
 * and disclaimer notices, and (2) redistributions including binaries
 * reproduce the notices in supporting documentation, and (3) all advertising
 * materials mentioning features or use of this software display the following
 * acknowledgement: ``This product includes software developed by the
 * Computer Systems Laboratory at the University of Utah.''
 *
 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
 * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
 * improvements that they make and grant CSL redistribution rights.
 *
 * 	Utah $Hdr: nvm.h 1.4 94/12/14$
 *	Author: Jeff Forys, University of Utah CSL
 */

#ifndef _MACHINE_NVM_H_
#define	_MACHINE_NVM_H_

/*
 * The PDC provides access to Non-Volatile Memory (NVM).  If this
 * is implemented (it's HVERSION dependent), the first 256 bytes
 * are formatted as follows:
 *
 *	0x000	+----------------------------+
 *		| Implementation information |
 *	0x024	+----------------------------+
 *		|                            |
 *		|      IPL information       |
 *		|                            |
 *	0x080	+----------------------------+
 *		|                            |
 *		|                            |
 *		|    OS Panic information    |
 *		|                            |
 *		|                            |
 *	0x100	+----------------------------+
 *
 * It appears that there are at least 256 bytes of NVM, and only
 * the "OS Panic information" is not architected.  This means that
 * we can use locations 0x80 - 0xFF for saving information across
 * boots (e.g. boot flags and boot device).  I think we should use
 * the higher portions of this space first, to avoid conflicting
 * with possible future HP-PA plans for the NVM.
 *
 * The PDC requires that NVM be read/written to in word multiples.
 */

/*
 * Boot flags and boot device (0xF4 - 0xFF).
 */

#define	NVM_BOOTDATA	0xF4		/* location of bootdata in NVM */
#define	NVM_BOOTMAGIC	0xACCEDE	/* magic used for bootdata cksum */
#define	NVM_BOOTCKSUM(bd) \
	((unsigned int) NVM_BOOTMAGIC + (bd).flags + (bd).device)

struct bootdata {
	unsigned int cksum;		/* NVM_BOOTMAGIC + flags + device */
	unsigned int flags;		/* boot flags */
	unsigned int device;		/* boot device */
};

#endif	/* _MACHINE_NVM_H_ */


code:
/*	$OpenBSD: param.h,v 1.45 2013/03/26 05:04:10 deraadt Exp $	*/

/*
 * Copyright (c) 1988-1994, The University of Utah and
 * the Computer Systems Laboratory at the University of Utah (CSL).
 * All rights reserved.
 *
 * Permission to use, copy, modify and distribute this software is hereby
 * granted provided that (1) source code retains these copyright, permission,
 * and disclaimer notices, and (2) redistributions including binaries
 * reproduce the notices in supporting documentation, and (3) all advertising
 * materials mentioning features or use of this software display the following
 * acknowledgement: ``This product includes software developed by the
 * Computer Systems Laboratory at the University of Utah.''
 *
 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
 * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
 * improvements that they make and grant CSL redistribution rights.
 */

#ifndef	_MACHINE_PARAM_H_
#define	_MACHINE_PARAM_H_

#ifdef _KERNEL
#include <machine/cpu.h>
#include <machine/intr.h>
#endif

#define	_MACHINE	hppa
#define	MACHINE		"hppa"
#define	_MACHINE_ARCH	hppa
#define	MACHINE_ARCH	"hppa"
#define	MID_MACHINE	MID_HPUX800

#define	PAGE_SHIFT	12
#define	PAGE_SIZE	(1 << PAGE_SHIFT)
#define	PAGE_MASK	(PAGE_SIZE - 1)

#define	KERNBASE	0x00000000		/* start of kernel virtual */

#ifdef _KERNEL

#define	NBPG		PAGE_SIZE		/* bytes/page */
#define	PGSHIFT		PAGE_SHIFT		/* LOG2(PAGE_SIZE) */
#define	PGOFSET		PAGE_MASK		/* byte offset into page */

#define	UPAGES		4			/* pages of u-area */
#define	USPACE		(UPAGES * PAGE_SIZE)	/* total size of u-area */
#define	USPACE_ALIGN	0			/* u-area alignment 0-none */

#define	NMBCLUSTERS	4096			/* map size, max cluster allocation */

#ifndef	MSGBUFSIZE
#define	MSGBUFSIZE	(2 * PAGE_SIZE)		/* default message buffer size */
#endif

/*
 * Maximum size of the kernel malloc arena in PAGE_SIZE-sized
 * logical pages.
 */
#define	NKMEMPAGES_MAX_DEFAULT	((128 * 1024 * 1024) >> PAGE_SHIFT)

#endif /* _KERNEL */

#define	MACHINE_STACK_GROWS_UP	1		/* stack grows to higher addresses */
#define	__SWAP_BROKEN

#endif /* _MACHINE_PARAM_H_ */


code:
/*	$OpenBSD: pcb.h,v 1.16 2015/05/05 02:13:46 guenther Exp $	*/

/*
 * Copyright (c) 1999-2004 Michael Shalayeff
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_PCB_H_
#define _MACHINE_PCB_H_

#include <machine/fpu.h>
#include <machine/reg.h>

struct pcb {
	struct hppa_fpstate *pcb_fpstate;	/* not in the trapframe */

	u_int32_t	pcb_ksp;		/* kernel sp for ctxsw */
	u_int32_t	pcb_onfault;		/* SW copy fault handler */
	pa_space_t	pcb_space;		/* copy pmap_space, for asm's sake */
};

#endif /* _MACHINE_PCB_H_ */


code:
/*	$OpenBSD: pci_machdep.h,v 1.11 2013/11/05 10:12:35 mpi Exp $	*/

/*
 * Copyright (c) 2003 Michael Shalayeff
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef	_MACHINE_PCI_MACHDEP_H_
#define	_MACHINE_PCI_MACHDEP_H_

/*
 * Types provided to machine-independent PCI code
 */
typedef struct hppa_pci_chipset_tag *pci_chipset_tag_t;
typedef u_long pcitag_t;
typedef u_long pci_intr_handle_t;

struct pci_attach_args;

struct hppa_pci_chipset_tag {
	void		*_cookie;
	void		(*pc_attach_hook)(struct device *,
			    struct device *, struct pcibus_attach_args *);
	int		(*pc_bus_maxdevs)(void *, int);
	pcitag_t	(*pc_make_tag)(void *, int, int, int);
	void		(*pc_decompose_tag)(void *, pcitag_t, int *,
			    int *, int *);
	int		(*pc_conf_size)(void *, pcitag_t);
	pcireg_t	(*pc_conf_read)(void *, pcitag_t, int);
	void		(*pc_conf_write)(void *, pcitag_t, int, pcireg_t);

	int		(*pc_intr_map)(struct pci_attach_args *,
			    pci_intr_handle_t *);
	const char	*(*pc_intr_string)(void *, pci_intr_handle_t);
	void		*(*pc_intr_establish)(void *, pci_intr_handle_t,
			    int, int (*)(void *), void *, const char *);
	void		(*pc_intr_disestablish)(void *, void *);

	void		*(*pc_alloc_parent)(struct device *,
			    struct pci_attach_args *, int);
};

/*
 * Functions provided to machine-independent PCI code.
 */
#define	pci_attach_hook(p, s, pba)					\
    (*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba))
#define	pci_bus_maxdevs(c, b)						\
    (*(c)->pc_bus_maxdevs)((c)->_cookie, (b))
#define	pci_make_tag(c, b, d, f)					\
    (*(c)->pc_make_tag)((c)->_cookie, (b), (d), (f))
#define	pci_decompose_tag(c, t, bp, dp, fp)				\
    (*(c)->pc_decompose_tag)((c)->_cookie, (t), (bp), (dp), (fp))
#define	pci_conf_size(c, t)						\
    (*(c)->pc_conf_size)((c)->_cookie, (t))
#define	pci_conf_read(c, t, r)						\
    (*(c)->pc_conf_read)((c)->_cookie, (t), (r))
#define	pci_conf_write(c, t, r, v)					\
    (*(c)->pc_conf_write)((c)->_cookie, (t), (r), (v))
#define	pci_intr_map(p, ihp)						\
    (*(p)->pa_pc->pc_intr_map)((p), (ihp))
#define	pci_intr_map_msi(p, ihp)	(-1)
#define	pci_intr_line(c, ih)	(ih)
#define	pci_intr_string(c, ih)						\
    (*(c)->pc_intr_string)((c)->_cookie, (ih))
#define	pci_intr_establish(c, ih, l, h, a, nm)				\
    (*(c)->pc_intr_establish)((c)->_cookie, (ih), (l), (h), (a), (nm))
#define	pci_intr_disestablish(c, iv)					\
    (*(c)->pc_intr_disestablish)((c)->_cookie, (iv))
#define	pci_probe_device_hook(c, a)	(0)

#define	pci_min_powerstate(c, t)	(PCI_PMCSR_STATE_D3)
#define	pci_set_powerstate_md(c, t, s, p)

#define	pciide_machdep_compat_intr_establish(a, b, c, d, e)	(NULL)
#define	pciide_machdep_compat_intr_disestablish(a, b)	((void)(a), (void)(b))

#define	pci_dev_postattach(a, b)

#endif /* _MACHINE_PCI_MACHDEP_H_ */


code:
/*	$OpenBSD: pdc.h,v 1.36 2013/03/23 16:12:22 deraadt Exp $	*/

/*
 * Copyright (c) 1990 mt Xinu, Inc.  All rights reserved.
 * Copyright (c) 1990,1991,1992,1994 University of Utah.  All rights reserved.
 *
 * Permission to use, copy, modify and distribute this software is hereby
 * granted provided that (1) source code retains these copyright, permission,
 * and disclaimer notices, and (2) redistributions including binaries
 * reproduce the notices in supporting documentation, and (3) all advertising
 * materials mentioning features or use of this software display the following
 * acknowledgement: ``This product includes software developed by the
 * Computer Systems Laboratory at the University of Utah.''
 *
 * Copyright (c) 1990 mt Xinu, Inc.
 * This file may be freely distributed in any form as long as
 * this copyright notice is included.
 * MTXINU, THE UNIVERSITY OF UTAH, AND CSL PROVIDE THIS SOFTWARE ``AS
 * IS'' AND WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
 * WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND
 * FITNESS FOR A PARTICULAR PURPOSE.
 *
 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
 * improvements that they make and grant CSL redistribution rights.
 *
 *	Utah $Hdr: pdc.h 1.12 94/12/14$
 *	Author: Jeff Forys (CSS), Dave Slattengren (mtXinu)
 */

#ifndef	_MACHINE_PDC_H_
#define _MACHINE_PDC_H_

/*
 * Definitions for interaction with "Processor Dependent Code",
 * which is a set of ROM routines used to provide information to the OS.
 * Also includes definitions for the layout of "Page Zero" memory when
 * boot code is invoked.
 *
 * Glossary:
 *	PDC:	Processor Dependent Code (ROM or copy of ROM).
 *	IODC:	I/O Dependent Code (module-type dependent code).
 *	IPL:	Boot program (loaded into memory from boot device).
 *	HPA:	Hard Physical Address (hardwired address).
 *	SPA:	Soft Physical Address (reconfigurable address).
 *
 *
 *
 *
 * Definitions for talking to IODC (I/O Dependent Code).
 *
 * The PDC is used to load I/O Dependent Code from a particular module.
 * I/O Dependent Code is module-type dependent software which provides
 * a uniform way to identify, initialize, and access a module (and in
 * some cases, their devices).
 */

/*
 * Our Initial Memory Module is laid out as follows.
 *
 *	0x000		+--------------------+
 *			| Page Zero (iomod.h)|
 *	0x800		+--------------------+
 *			|                    |
 *			|                    |
 *			|        PDC         |
 *			|                    |
 *			|                    |
 *	MEM_FREE	+--------------------+
 *			|                    |
 *			|    Console IODC    |
 *			|                    |
 *	MEM_FREE+64k	+--------------------+
 *			|                    |
 *			|  Boot Device IODC  |
 *			|                    |
 *	IPL_START	+--------------------+
 *			|                    |
 *			| IPL Code or Kernel |
 *			|                    |
 *			+--------------------+
 *
 * Restrictions:
 *	MEM_FREE (pagezero.mem_free) can be no greater than 32K.
 *	The PDC may use up to MEM_FREE + 32K (for Console & Boot IODC).
 *	IPL_START must be less than or equal to 64K.
 *
 * The IPL (boot) Code is immediately relocated to RELOC (check
 * "../stand/Makefile") to make way for the Kernel.
 */

#define	IODC_MAXSIZE	(16 * 4 * 1024)	/* maximum size of IODC */
#define	IODC_MINIOSIZ	64		/* minimum buffer size for IODC call */
#define	IODC_MAXIOSIZ	(64 * 1024)	/* maximum buffer size for IODC call */
#define	IODC_IOSIZ	(16 * 1024)

#define	PDC_ALIGNMENT	__attribute__ ((__aligned__(64)))
#define	PDC_STACKSIZE	(4 * PAGE_SIZE)

/*
 * The PDC Entry Points and their arguments...
 */

#define	PDC_POW_FAIL	1	/* prepare for power failure */
#define PDC_POW_FAIL_DFLT	0

#define	PDC_CHASSIS	2	/* update chassis display (see below) */
#define	PDC_CHASSIS_DISP	0	/* update display */
#define	PDC_CHASSIS_WARN	1	/* return warnings */
#define	PDC_CHASSIS_ALL		2	/* update display & return warnings */
#define	PDC_CHASSIS_INFO	128	/* return led/lcd info */

#define	PDC_PIM		3	/* access Processor Internal Memory */
#define	PDC_PIM_HPMC		0	/* read High Pri Mach Chk data */
#define	PDC_PIM_SIZE		1	/* return size */
#define	PDC_PIM_LPMC		2	/* read Low Pri Mach Chk data */
#define	PDC_PIM_SBD		3	/* read soft boot data */
#define	PDC_PIM_TOC		4	/* read TOC data (used to use HPMC) */

#define	PDC_MODEL	4	/* processor model number info */
#define	PDC_MODEL_INFO		0	/* processor model number info */
#define	PDC_MODEL_BOOTID	1	/* set BOOT_ID of processor */
#define	PDC_MODEL_COMP		2	/* return component version numbers */
#define	PDC_MODEL_MODEL		3	/* return system model information */
#define	PDC_MODEL_ENSPEC	4	/* enable product-specific instrs */
#define	PDC_MODEL_DISPEC	5	/* disable product-specific instrs */
#define	PDC_MODEL_CPUID		6	/* return CPU versions */
#define	PDC_MODEL_CPBALITIES	7	/* return capabilites */
#define	PDC_MODEL_GETBOOTOPTS	8	/* return boot test options */
#define	PDC_MODEL_SETBOOTOPTS	9	/* set boot test options */

#define	PDC_CACHE	5	/* return cache and TLB params */
#define	PDC_CACHE_DFLT		0	/* return parameters */
#define	PDC_CACHE_SETCS		1	/* set coherence state */
#define	PDC_CACHE_GETSPIDB	2	/* get space-id bits */

#define	PDC_HPA		6	/* return HPA of processor */
#define	PDC_HPA_DFLT		0
#define	PDC_HPA_MODULES		1

#define	PDC_COPROC	7	/* return co-processor configuration */
#define	PDC_COPROC_DFLT		0

#define	PDC_IODC	8	/* talk to IODC */
#define	PDC_IODC_READ		0	/* read IODC entry point */
#define		IODC_DATA	0	/* get first 16 bytes from mod IODC */
#define		IODC_INIT	3	/* initialize (see options below) */
#define		IODC_INIT_FIRST	2	/* find first device on module */
#define		IODC_INIT_NEXT	3	/* find subsequent devices on module */
#define		IODC_INIT_ALL	4	/* initialize module and device */
#define		IODC_INIT_DEV	5	/* initialize device */
#define		IODC_INIT_MOD	6	/* initialize module */
#define		IODC_INIT_MSG	9	/* return error message(s) */
#define		IODC_INIT_STR	20	/* find device w/ spec in string */
#define		IODC_IO		4	/* perform I/O (see options below) */
#define		IODC_IO_READ	0	/* read from boot device */
#define		IODC_IO_WRITE	1	/* write to boot device */
#define		IODC_IO_CONSIN	2	/* read from console */
#define		IODC_IO_CONSOUT	3	/* write to conosle */
#define		IODC_IO_CLOSE	4	/* close device */
#define		IODC_IO_MSG	9	/* return error message(s) */
#define		IODC_SPA	5	/* get extended SPA information */
#define		IODC_SPA_DFLT	0	/* return SPA information */
#define		IODC_TEST	8	/* perform self tests */
#define		IODC_TEST_INFO	0	/* return test information */
#define		IODC_TEST_STEP	1	/* execute a particular test */
#define		IODC_TEST_TEST	2	/* describe a test section */
#define		IODC_TEST_MSG	9	/* return error message(s) */
#define	PDC_IODC_NINIT		2	/* non-destructive init */
#define	PDC_IODC_DINIT		3	/* destructive init */
#define	PDC_IODC_MEMERR		4	/* check for memory errors */
#define	PDC_IODC_IMEMMASTER	5	/* interlieved memory master ID */

#define	PDC_TOD		9	/* access time-of-day clock */
#define	PDC_TOD_READ		0	/* read TOD clock */
#define	PDC_TOD_WRITE		1	/* write TOD clock */
#define	PDC_TOD_ITIMER		2	/* calibrate Interval Timer (CR16) */

#define	PDC_STABLE	10	/* access Stable Storage (SS) */
#define	PDC_STABLE_READ		0	/* read SS */
#define	PDC_STABLE_WRITE	1	/* write SS */
#define	PDC_STABLE_SIZE		2	/* return size of SS */
#define	PDC_STABLE_VRFY		3	/* verify contents of SS */
#define	PDC_STABLE_INIT		4	/* initialize SS */

#define	PDC_NVM		11	/* access Non-Volatile Memory (NVM) */
#define	PDC_NVM_READ		0	/* read NVM */
#define	PDC_NVM_WRITE		1	/* write NVM */
#define	PDC_NVM_SIZE		2	/* return size of NVM */
#define	PDC_NVM_VRFY		3	/* verify contents of NVM */
#define	PDC_NVM_INIT		4	/* initialize NVM */

#define	PDC_ADD_VALID	12	/* check address for validity */
#define	PDC_ADD_VALID_DFLT	0

#define	PDC_BUS_BAD	13	/* verify Error Detection Circuitry (EDC) */
#define	PDC_BUS_BAD_DLFT	0

#define	PDC_DEBUG	14	/* return address of PDC debugger */
#define	PDC_DEBUG_DFLT		0

#define	PDC_INSTR	15	/* return instr that invokes PDCE_CHECK */
#define	PDC_INSTR_DFLT		0

#define	PDC_PROC	16	/* stop currently executing processor */
#define	PDC_PROC_STOP		0
#define	PDC_PROC_RENDEZVOUS	1

#define	PDC_CONF	17	/* (de)configure a module */
#define	PDC_CONF_DECONF		0	/* deconfigure module */
#define	PDC_CONF_RECONF		1	/* reconfigure module */
#define	PDC_CONF_INFO		2	/* get config informaion */

#define PDC_BLOCK_TLB	18	/* Manage Block TLB entries (BTLB) */
#define PDC_BTLB_DEFAULT	0	/* Return BTLB configuration info  */
#define PDC_BTLB_INSERT		1	/* Insert a BTLB entry */
#define PDC_BTLB_PURGE		2	/* Purge a BTLB entry */
#define PDC_BTLB_PURGE_ALL	3	/* Purge all BTLB entries */

#define PDC_TLB		19	/* Manage Hardware TLB handling */
#define PDC_TLB_INFO		0	/* Return HW-TLB configuration info  */
#define PDC_TLB_CONFIG		1	/* Set HW-TLB pdir base and size */

#define PDC_TLB_CURRPDE		1	/* cr28 points to current pde on miss */
#define PDC_TLB_RESERVD		3	/* reserved */
#define PDC_TLB_NEXTPDE		5	/* cr28 points to next pde on miss */
#define PDC_TLB_WORD3		7	/* cr28 is word 3 of 16 byte pde */

#define	PDC_PSW		21	/* manage default values of configurable psw bits */
#define	PDC_PSW_GETMASK		0	/* get mask */
#define	PDC_PSW_DEFAULTS	1	/* get default bits values */
#define	PDC_PSW_SETDEFAULTS	2	/* set default bits values */

#define	PDC_SYSMAP	22	/* map system modules */
#define	PDC_SYSMAP_FIND		0	/* find module by index */
#define	PDC_SYSMAP_ADDR		1	/* fetch list of addresses */
#define	PDC_SYSMAP_HPA		2	/* get hpa from devpath */

#define	PDC_SOFT_POWER	23	/* support for soft power switch */
#define	PDC_SOFT_POWER_INFO	0	/* get info about soft power switch */
#define	PDC_SOFT_POWER_ENABLE	1	/* enable/disable soft power switch */

#define	PDC_PAT_CELL	64	/* cell operations */
#define	PDC_PAT_CELL_GETID	0	/* get cell id number */
#define	PDC_PAT_CELL_GETINFO	1	/* get cell info */
#define	PDC_PAT_CELL_MODULE	2	/* get module info */
#define		PDC_PAT_IOVIEW	0
#define		PDC_PAT_PAVIEW	1

#define	PDC_PAT_CHASSIS	65	/* chassis log ops */
#define	PDC_PAT_CHASSIS_WRITE	0
#define	PDC_PAT_CHASSIS_READ	1

#define	PDC_PAT_CPU	67

#define	PDC_PAT_EVENT	68

#define	PDC_PAT_HPMC	70

#define	PDC_PAT_IO	71	/* online services for IO modules */
#define	PDC_PAT_IO_GET_PCI_RTSZ	15
#define	PDC_PAT_IO_GET_PCI_RT	16

#define	PDC_PAT_MEM	72

#define	PDC_PAT_NVRAM	73

#define	PDC_PAT_PROTDOM	74

#define	PDC_MEMMAP	128	/* hp700: return page information */
#define	PDC_MEMMAP_HPA		0	/* map module # to HPA */

#define	PDC_EEPROM	129	/* Hversion dependent */
#define	PDC_EEPROM_READ_WORD	0
#define	PDC_EEPROM_WRITE_WORD	1
#define	PDC_EEPROM_READ_BYTE	2
#define	PDC_EEPROM_WRITE_BYTE	3

#define	PDC_IO		135
#define	PDC_IO_READ_AND_CLEAR_ERRORS	0
#define	PDC_IO_RESET			1
#define	PDC_IO_RESET_DEVICES		2

#define	PDC_BROADCAST_RESET	136
#define	PDC_DO_RESET		0
#define	PDC_DO_FIRM_TEST_RESET	1
#define	PDC_BR_RECONFIGURATION	2

#define	PDC_LAN_STATION_ID	138	/* Hversion dependent mechanism for */
#define	PDC_LAN_STATION_ID_READ	0	/* getting the lan station address  */

#define	PDC_PCI_INDEX	147	/* PCI rt access */
#define	PDC_PCI_GET_INT_TBL_SZ	13
#define	PDC_PCI_GET_INT_TBL	14

#define	PDC_ERR_OK		0	/* operation complete */
#define	PDC_ERR_WARNING		3	/* OK, but warning */
#define	PDC_ERR_NOPROC		-1	/* no such procedure */
#define	PDC_ERR_NOPT		-2	/* no such option */
#define	PDC_ERR_COMPL		-3	/* unable to complete w/o error */
#define	PDC_ERR_EOD		-9	/* end of device list */
#define	PDC_ERR_INVAL		-10	/* invalid argument */
#define	PDC_ERR_PFAIL		-12	/* aborted by powerfail */

#if !defined(_LOCORE)

struct iomod;

typedef int (*pdcio_t)(int, int, ...);
typedef int (*iodcio_t)(u_int, int, ...);

/*
 * Commonly used PDC calls and the structures they return.
 */

/*
 * Device path specifications used by PDC.
 */
struct device_path {
	u_char	dp_flags;	/* see bit definitions below */
	char	dp_bc[6];	/* Bus Converter routing info to a specific */
				/* I/O adaptor (< 0 means none, > 63 resvd) */
	u_char	dp_mod;		/* fixed field of specified module */
	int	dp_layers[6];	/* device-specific info (ctlr #, unit # ...) */
};

struct pdc_model {	/* PDC_MODEL */
	u_int	hvers;		/* hardware version */
	u_int	rev : 4;	/* zero for all native processors */
	u_int	model : 20;	/* 4 for all native processors */
	u_int	sh : 1;		/* shadow registers are present */
	u_int	reserved : 2;	/* reserved */
	u_int	mc : 1;		/* module category (A - 0, B - 1) */
	u_int	reserved1 : 2;	/* reserved */
	u_int	pa_lvl : 2;	/* PA-RISC level */
	u_int	hw_id;		/* unique processor hardware identifier */
	u_int	boot_id;	/* same as hw_id */
	u_int	sw_id;		/* software security and licensing */
	u_int	sw_cap;		/* OS capabilities of processor */
	u_int	arch_rev;	/* architecture revision */
	u_int	pot_key;	/* potential key */
	u_int	curr_key;	/* current key */
	int	filler1;
	u_int	filler2[22];
};

struct pdc_cpuid {	/* PDC_MODEL_CPUID */
	u_int	reserved : 20;
	u_int	version  :  7;	/* CPU version */
	u_int	revision :  5;	/* CPU revision */
	u_int	filler[31];
};

struct pdc_getbootopts {	/* PDC_MODEL_GETBOOTOPTS */
	u_int	cur_test;	/* current enabled tests */
	u_int	sup_test;	/* supported tests */
	u_int	def_test;	/* default enabled tests */
	u_int	filler[29];
};

struct cache_cf {	/* PDC_CACHE (for "struct pdc_cache") */
	u_int	cc_alias: 4,	/* virtual address aliasing boundary */
		cc_block: 4,	/* used to determine most efficient stride */
		cc_line	: 3,	/* max data written by store (16-byte mults) */
		cc_resv1: 2,	/* (reserved) */
		cc_wt	: 1,	/* D-cache: write-to = 0, write-through = 1 */
		cc_sh	: 2,	/* separate I and D = 0, shared I and D = 1 */
		cc_cst  : 3,	/* D-cache: incoherent = 0, coherent = 1 */
		cc_resv2:11,	/* (reserved) */
		cc_hvers: 2;	/* H-VERSION dependent */
};

struct tlb_cf {		/* PDC_CACHE (for "struct pdc_cache") */
	u_int	tc_resv1:12,	/* (reserved) */
		tc_sh	: 2,	/* separate I and D = 0, shared I and D = 1 */
		tc_hvers: 1,	/* H-VERSION dependent */
		tc_page : 1,	/* 2K page size = 0, 4k page size = 1 */
		tc_cst  : 3,	/* incoherent = 0, coherent = 1 */
		tc_resv2: 5,	/* (reserved) */
		tc_assoc: 8;	/* associativity of TLB */
};

struct pdc_cache {	/* PDC_CACHE */
/* Instruction cache */
	u_int	ic_size;	/* size of I-cache (in bytes) */
	struct cache_cf ic_conf;/* cache configuration (see above) */
	u_int	ic_base;	/* start addr of I-cache (for FICE flush) */
	u_int	ic_stride;	/* addr incr per i_count iteration (flush) */
	u_int	ic_count;	/* number of i_loop iterations (flush) */
	u_int	ic_loop;	/* number of FICE's per addr stride (flush) */
/* Data cache */
	u_int	dc_size;	/* size of D-cache (in bytes) */
	struct cache_cf dc_conf;/* cache configuration (see above) */
	u_int	dc_base;	/* start addr of D-cache (for FDCE flush) */
	u_int	dc_stride;	/* addr incr per d_count iteration (flush) */
	u_int	dc_count;	/* number of d_loop iterations (flush) */
	u_int	dc_loop;	/* number of FDCE's per addr stride (flush) */
/* Instruction TLB */
	u_int	it_size;	/* number of entries in I-TLB */
	struct tlb_cf it_conf;	/* I-TLB configuration (see above) */
	u_int	it_sp_base;	/* start space of I-TLB (for PITLBE flush) */
	u_int	it_sp_stride;	/* space incr per sp_count iteration (flush) */
	u_int	it_sp_count;	/* number of off_count iterations (flush) */
	u_int	it_off_base;	/* start offset of I-TLB (for PITLBE flush) */
	u_int	it_off_stride;	/* offset incr per off_count iteration (flush)*/
	u_int	it_off_count;	/* number of it_loop iterations/space (flush) */
	u_int	it_loop;	/* number of PITLBE's per off_stride (flush) */
/* Data TLB */
	u_int	dt_size;	/* number of entries in D-TLB */
	struct tlb_cf dt_conf;	/* D-TLB configuration (see above) */
	u_int	dt_sp_base;	/* start space of D-TLB (for PDTLBE flush) */
	u_int	dt_sp_stride;	/* space incr per sp_count iteration (flush) */
	u_int	dt_sp_count;	/* number of off_count iterations (flush) */
	u_int	dt_off_base;	/* start offset of D-TLB (for PDTLBE flush) */
	u_int	dt_off_stride;	/* offset incr per off_count iteration (flush)*/
	u_int	dt_off_count;	/* number of dt_loop iterations/space (flush) */
	u_int	dt_loop;	/* number of PDTLBE's per off_stride (flush) */
	u_int	filler[2];
};

struct pdc_spidb {	/* PDC_CACHE, PDC_CACHE_GETSPIDB */
	u_int	spidR1   : 4;
	u_int	spidbits : 12;
	u_int	spidR2   : 16;
	u_int	filler[31];
};

struct pdc_cst {
	u_int	cstR1  : 16;
	u_int	cst    :  3;
	u_int	cstR2  : 13;
};

struct pdc_coherence {	/* PDC_CACHE, PDC_CACHE_SETCS */
	struct pdc_cst	ia;
#define	ia_cst ia.cst
	struct pdc_cst	da;
#define	da_cst da.cst
	struct pdc_cst	ita;
#define	ita_cst ita.cst
	struct pdc_cst	dta;
#define	dta_cst dta.cst
	u_int	filler[28];
};

struct pdc_hpa {	/* PDC_HPA */
	u_int	hpa;	/* HPA of processor */
	int	filler1;
	u_int	filler2[30];
};

struct pdc_coproc {	/* PDC_COPROC */
	u_int	ccr_enable;	/* same format as CCR (CR 10) */
	u_int	ccr_present;	/* which co-proc's are present (bitset) */
	u_int	pad[15];
	u_int	fpu_revision;
	u_int	fpu_model;
	u_int	filler2[13];
};

struct pdc_tod {	/* PDC_TOD, PDC_TOD_READ */
	u_int	sec;		/* elapsed time since 00:00:00 GMT, 1/1/70 */
	u_int	usec;		/* accurate to microseconds */
	u_int	filler2[30];
};

struct pdc_itimer {	/* PDC_TOD_ITIMER */
	u_int	calib0;		/* double giving itmr freq */
	u_int	calib1;
	u_int	tod_acc;	/* TOD accuracy in 1e-9 part */
	u_int	cr_acc;		/* itmr accuracy in 1e-9 parts */
	u_int	filler[28];
};

struct pdc_nvm {	/* PDC_NVM */
	u_int	hv[9];		/* 0x00: HV dependent */
	struct device_path bootpath;	/* 0x24: boot path */
	u_int	isl_ver;	/* 0x44: ISL revision */
	u_int	timestamp;	/* 0x48: timestamp */
	u_int	lif_ue[12];	/* 0x4c: LIF utility entries */
	u_int	eptr;		/* 0x7c: entry pointer */
	u_int	os_panic[32];	/* 0x80: OS panic info */
};

struct pdc_instr {	/* PDC_INSTR */
	u_int	instr;		/* instruction that invokes PDC mchk entry pt */
	int	filler1;
	u_int	filler2[30];
};

struct pdc_iodc_read {	/* PDC_IODC, PDC_IODC_READ */
	int	size;		/* number of bytes in selected entry point */
	int	filler1;
	u_int	filler2[30];
};

struct pdc_iodc_minit {	/* PDC_IODC, PDC_IODC_NINIT or PDC_IODC_DINIT */
	u_int	stat;		/* HPA.io_status style error returns */
	u_int	max_spa;	/* size of SPA (in bytes) > max_mem+map_mem */
	u_int	max_mem;	/* size of "implemented" memory (in bytes) */
	u_int	map_mem;	/* size of "mappable-only" memory (in bytes) */
	u_int	filler[28];
};

struct btlb_info {		/* for "struct pdc_btlb" (PDC_BTLB) */
	u_int	resv0: 8,	/* (reserved) */
		num_i: 8,	/* Number of instruction slots */
		num_d: 8,	/* Number of data slots */
		num_c: 8;	/* Number of combined slots */
};

struct pdc_btlb {	/* PDC_BLOCK_TLB */
	u_int	min_size;	/* Min size in pages */
	u_int	max_size;	/* Max size in pages */
	struct btlb_info finfo;	/* Fixed range info */
	struct btlb_info vinfo; /* Variable range info */
	u_int	filler[28];
};

struct pdc_hwtlb {	/* PDC_TLB */
	u_int	min_size;	/* What do these mean? */
	u_int	max_size;
	u_int	filler[30];
};

struct pdc_power_info {		/* PDC_SOFT_POWER_INFO */
	u_int	addr;		/* power register address */
	u_int	filler[30];
};

struct pdc_sysmap_find {	/* PDC_SYSMAP_FIND */
	u_int	hpa;
	u_int	size;		/* pages */
	u_int	naddrs;
	u_int	filler[29];
};

struct pdc_sysmap_addrs {	/* PDC_SYSMAP_ADDR */
	u_int	hpa;
	u_int	size;		/* pages */
	u_int	filler[30];
};

struct pdc_sysmap_hpa {		/* PDC_SYSMAP_HPA */
	u_int	hpa;
	u_int	size;
	u_int	naddrs;
	u_int	mod;
	u_int	filler[28];
};

struct pdc_pat_cell_id {	/* PDC_PAT_CELL_GETID */
	u_long	id;		/* cell id */
	u_long	loc;		/* cell location */
	u_long	filler[14];
};

struct pdc_pat_cell_module {	/* PDC_PAT_CELL_MODULE */
	u_long	chpa;		/* config space HPA */
	u_long	info;		/* module info */
#define	PDC_PAT_CELL_MODTYPE(t)	(((t) >> 56) & 0xff)
#define	PDC_PAT_CELL_MODDVI(t)	(((t) >> 48) & 0xff)
#define	PDC_PAT_CELL_MODIOC(t)	(((t) >> 40) & 0xff)
#define	PDC_PAT_CELL_MODSIZE(t)	(((t) & 0xffffff) << PAGE_SHIFT)
	u_long	loc;		/* module location */
	struct device_path dp;	/* module path */
	u_long	pad[508];	/* cell module gedoens */
};

struct pdc_pat_io_num {	/* PDC_PAT_IO */
	u_int	num;
	u_int	filler[31];
};

struct pdc_pat_pci_rt {	/* PDC_PAT_IO_GET_PCI_RT */
	u_int8_t	type;		/* 0x8b */
	u_int8_t	len;
	u_int8_t	itype;		/* 0 -- vectored int */
	u_int8_t	trigger;	/* polarity/level */
	u_int8_t	pin;		/* PCI pin number */
	u_int8_t	bus;
	u_int8_t	seg;		/* reserved */
	u_int8_t	line;
	u_int64_t	addr;		/* io sapic address */
};

struct pdc_memmap {	/* PDC_MEMMAP */
	u_int	hpa;		/* HPA for module */
	u_int	morepages;	/* additional IO pages */
	u_int	filler[30];
};

struct pdc_lan_station_id {	/* PDC_LAN_STATION_ID */
	u_int8_t addr[6];
	u_int8_t filler1[2];
	u_int	filler2[30];
};

/*
 * The PDC_CHASSIS is a strange bird.  The format for updating the display
 * is as follows:
 *
 *	0     11 12      14    15   16    19 20    23 24    27 28    31
 *	+-------+----------+-------+--------+--------+--------+--------+
 *	|   R   | OS State | Blank |  Hex1  |  Hex2  |  Hex3  |  Hex4  |
 *	+-------+----------+-------+--------+--------+--------+--------+
 *
 * Unfortunately, someone forgot to tell the hardware designers that
 * there was supposed to be a hex display somewhere.  The result is,
 * you can only toggle 5 LED's and the fault light.
 *
 * Interesting values for Hex1-Hex4 and the resulting LED displays:
 *
 *	FnFF			CnFF:
 *	 0	- - - - -		Counts in binary from 0x0 - 0xF
 *	 2	o - - - -		for corresponding values of `n'.
 *	 4	o o - - -
 *	 6	o o o - -
 *	 8	o o o o -
 *	 A	o o o o o
 *
 * If the "Blank" bit is set, the display should be made blank.
 * The values for "OS State" are defined below.
 */

#define	PDC_CHASSIS_BAR	0xF0FF	/* create a bar graph with LEDs */
#define	PDC_CHASSIS_CNT	0xC0FF	/* count with LEDs */

#define	PDC_OSTAT(os)	(((os) & 0x7) << 17)
#define	PDC_OSTAT_OFF	0x0	/* all off */
#define	PDC_OSTAT_FAULT	0x1	/* the red LED of death */
#define	PDC_OSTAT_TEST	0x2	/* self test */
#define	PDC_OSTAT_BOOT	0x3	/* boot program running */
#define	PDC_OSTAT_SHUT	0x4	/* shutdown in progress */
#define	PDC_OSTAT_WARN	0x5	/* battery dying, etc */
#define	PDC_OSTAT_RUN	0x6	/* OS running */
#define	PDC_OSTAT_ON	0x7	/* all on */

struct pdc_chassis_info {
	u_int	size;
	u_int	max_size;
	u_int	filler[30];
};

struct pdc_chassis_lcd {
	u_int	model : 16,
		width : 16;
	u_int	cmd_addr;
	u_int	data_addr;
	u_int	delay;
	u_int8_t line[2];
	u_int8_t enabled;
	u_int8_t heartbeat[3];
	u_int8_t disk[3];
	u_int	filler[25];
};

/* dp_flags */
#define	PZF_AUTOBOOT	0x80	/* These two are PDC flags for how to locate */
#define	PZF_AUTOSEARCH	0x40	/*	the "boot device" */
#define	PZF_TIMER	0x0f	/* power of 2 # secs "boot timer" (0 == dflt) */
#define	PZF_BITS	"\020\010autoboot\07autosearch"

/* macros to decode serial parameters out of dp_layers */
#define	PZL_BITS(l)	(((l) & 0x03) + 5)
#define	PZL_PARITY(l)	(((l) & 0x18) >> 3)
#define	PZL_SPEED(l)	(((l) & 0x3c0) >> 6)
#define	PZL_ENCODE(bits, parity, speed) \
	(((bits) - 5) & 0x03) | (((parity) & 0x3) << 3) | \
	(((speed) & 0x0f) << 6)

/*
 * A processors Stable Storage is accessed through the PDC.  There are
 * at least 96 bytes of stable storage (the device path information may
 * or may not exist).  However, as far as I know, processors provide at
 * least 192 bytes of stable storage.
 */
struct stable_storage {
	struct device_path ss_pri_boot;	/* (see above) */
	char	ss_filenames[32];
	u_short	ss_os_version;	/* 0 == none, 1 == HP-UX, 2 == MPE-XL */
	char	ss_os[22];	/* OS-dependant information */
	char	ss_pdc[7];	/* reserved */
	char	ss_fast_size;	/* how much memory to test.  0xf == all, or */
				/*	else it's (256KB << ss_fast_size) */
	struct device_path ss_console;
	struct device_path ss_alt_boot;
	struct device_path ss_keyboard;
};

/*
 * Recoverable error indications provided to boot code by the PDC.
 * Any non-zero value indicates error.
 */
struct boot_err {
	u_int	be_resv : 10,	/* (reserved) */
		be_fixed : 6,	/* module that produced error */
		be_chas : 16;	/* error code (interpret as 4 hex digits) */
};

#define	HPBE_HBOOT_CORRECTABLE	0	/* hard-boot corrctable error */
#define	HPBE_HBOOT_UNCORRECTBL	1	/* hard-boot uncorrectable error */
#define	HPBE_SBOOT_CORRECTABLE	2	/* soft-boot correctable error */
#define	HPBE_SBOOT_UNCORRECTBL	3	/* soft-boot uncorrectable error */
#define	HPBE_ETEST_MODUNUSABLE	4	/* ENTRY_TEST err: module's unusable */
#define	HPBE_ETEST_MODDEGRADED	5	/* ENTRY_TEST err: module in degraded mode */

/*
 * The PDC uses the following structure to completely define an I/O
 * module and the interface to its IODC.
 */
typedef
struct pz_device {
	struct device_path pz_dp;
#define	pz_flags	pz_dp.dp_flags
#define	pz_bc		pz_dp.dp_bc
#define	pz_mod		pz_dp.dp_mod
#define	pz_layers	pz_dp.dp_layers
	u_int	pz_hpa;	/* HPA base address of device */
	u_int	pz_spa;		/* SPA base address (zero if no SPA exists) */
	u_int	pz_iodc_io;	/* entry point of device's driver routines */
	short	pz_resv;	/* (reserved) */
	u_short	pz_class;	/* (see below) */
} pz_device_t;

/* pz_class */
#define	PCL_NULL	0	/* illegal */
#define	PCL_RANDOM	1	/* random access (disk) */
#define	PCL_SEQU	2	/* sequential access (tape) */
#define	PCL_DUPLEX	7	/* full-duplex point-to-point (RS-232, Net) */
#define	PCL_KEYBD	8	/* half-duplex input (HIL Keyboard) */
#define	PCL_DISPL	9	/* half-duplex ouptput (display) */
#define	PCL_FC		10	/* fibre channel access media */
#define	PCL_CLASS_MASK	0xf	/* XXX class mask */
#define	PCL_NET_MASK	0x1000	/* mask for bootp/tftp device */

/*
 * The following structure defines what a particular IODC returns when
 * given the IODC_DATA argument.
 */
struct iodc_data {
	u_int	iodc_model: 8,		/* hardware model number */
		iodc_revision:8,	/* software revision */
		iodc_spa_io: 1,		/* 0:memory, 1:device */
		iodc_spa_pack:1,	/* 1:packed multiplexor */
		iodc_spa_enb:1,		/* 1:has an spa */
		iodc_spa_shift:5,	/* power of two # bytes in SPA space */
		iodc_more: 1,		/* iodc_data is: 0:8-byte, 1:16-byte */
		iodc_word: 1,		/* iodc_data is: 0:byte, 1:word */
		iodc_pf: 1,		/* 1:supports powerfail */
		iodc_type: 5;		/* see below */
	u_int	iodc_sv_rev: 4,		/* software version revision number */
		iodc_sv_model:20,	/* software interface model # */
		iodc_sv_opt: 8;		/* type-specific options */
	u_char	iodc_rev;		/* revision number of IODC code */
	u_char	iodc_dep;		/* module-dependent information */
	u_char	iodc_rsv[2];		/* reserved */
	u_short	iodc_cksum;		/* 16-bit checksum of whole IODC */
	u_short	iodc_length;		/* number of entry points in IODC */
		/* IODC entry points follow... */
};

extern pdcio_t pdc;

#ifdef _KERNEL
struct consdev;

extern int kernelmapped;

void pdc_init(void);
int pdc_call(iodcio_t, int, ...);

void pdccnprobe(struct consdev *);
void pdccninit(struct consdev *);
int pdccngetc(dev_t);
void pdccnputc(dev_t, int);
void pdccnpollc(dev_t, int);
#endif

#endif	/* !(_LOCORE) */

#endif	/* _MACHINE_PDC_H_ */


code:
/*	$OpenBSD: pmap.h,v 1.51 2015/07/27 03:36:38 guenther Exp $	*/

/*
 * Copyright (c) 2002-2004 Michael Shalayeff
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_PMAP_H_
#define _MACHINE_PMAP_H_

#include <uvm/uvm_object.h>
#include <sys/mutex.h>

#ifdef	_KERNEL
#include <machine/pte.h>

struct pmap {
	struct mutex pm_mtx;
	struct uvm_object pm_obj;
	struct vm_page	*pm_ptphint;
	struct vm_page	*pm_pdir_pg;	/* vm_page for pdir */
	volatile u_int32_t *pm_pdir;	/* page dir (read-only after create) */
	pa_space_t	pm_space;	/* space id (read-only after create) */
	u_int		pm_pid;		/* prot id (read-only after create) */

	struct pmap_statistics	pm_stats;
};
typedef struct pmap *pmap_t;

#define HPPA_MAX_PID    0xfffa
#define	HPPA_SID_MAX	0x7ffd
#define HPPA_SID_KERNEL 0
#define HPPA_PID_KERNEL 2

#define KERNEL_ACCESS_ID 1
#define KERNEL_TEXT_PROT (TLB_AR_KRX | (KERNEL_ACCESS_ID << 1))
#define KERNEL_DATA_PROT (TLB_AR_KRW | (KERNEL_ACCESS_ID << 1))

struct pv_entry {			/* locked by its list's pvh_lock */
	struct pv_entry	*pv_next;
	struct pmap	*pv_pmap;	/* the pmap */
	vaddr_t		pv_va;		/* the virtual address */
	struct vm_page	*pv_ptp;	/* the vm_page of the PTP */
};

/* also match the hardware tlb walker definition */
struct vp_entry {
	u_int	vp_tag;
	u_int	vp_tlbprot;
	u_int	vp_tlbpage;
	u_int	vp_ptr;
};

extern void gateway_page(void);
extern struct pmap kernel_pmap_store;

#if defined(HP7100LC_CPU) || defined(HP7300LC_CPU)
extern int pmap_hptsize;
extern struct pdc_hwtlb pdc_hwtlb;
#endif

/*
 * pool quickmaps
 */
#define	pmap_map_direct(pg)	((vaddr_t)VM_PAGE_TO_PHYS(pg))
struct vm_page *pmap_unmap_direct(vaddr_t);
#define	__HAVE_PMAP_DIRECT

/*
 * according to the parisc manual aliased va's should be
 * different by high 12 bits only.
 */
#define	PMAP_PREFER(o,h)	pmap_prefer(o, h)
static __inline__ vaddr_t
pmap_prefer(vaddr_t offs, vaddr_t hint)
{
	vaddr_t pmap_prefer_hint = (hint & HPPA_PGAMASK) | (offs & HPPA_PGAOFF);
	if (pmap_prefer_hint < hint)
		pmap_prefer_hint += HPPA_PGALIAS;
	return pmap_prefer_hint;
}

/* pmap prefer alignment */
#define PMAP_PREFER_ALIGN()	(HPPA_PGALIAS)
/* pmap prefer offset within alignment */
#define PMAP_PREFER_OFFSET(of)	((of) & HPPA_PGAOFF)

#define	pmap_sid2pid(s)			(((s) + 1) << 1)
#define pmap_kernel()			(&kernel_pmap_store)
#define	pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
#define	pmap_update(pm)			(void)(pm)
#define pmap_copy(dpmap,spmap,da,len,sa)

#define pmap_clear_modify(pg)	pmap_changebit(pg, 0, PTE_PROT(TLB_DIRTY))
#define pmap_clear_reference(pg) pmap_changebit(pg, PTE_PROT(TLB_REFTRAP), 0)
#define pmap_is_modified(pg)	pmap_testbit(pg, PTE_PROT(TLB_DIRTY))
#define pmap_is_referenced(pg)	pmap_testbit(pg, PTE_PROT(TLB_REFTRAP))

#define pmap_unuse_final(p)		/* nothing */
#define	pmap_remove_holes(vm)		do { /* nothing */ } while (0)

void pmap_bootstrap(vaddr_t);
boolean_t pmap_changebit(struct vm_page *, pt_entry_t, pt_entry_t);
boolean_t pmap_testbit(struct vm_page *, pt_entry_t);
void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
void pmap_remove(struct pmap *pmap, vaddr_t sva, vaddr_t eva);
void pmap_page_remove(struct vm_page *pg);

static __inline int
pmap_prot(struct pmap *pmap, int prot)
{
	extern u_int hppa_prot[];
	return (hppa_prot[prot] | (pmap == pmap_kernel()? 0 : TLB_USER));
}

static __inline void
pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
{
	if ((prot & PROT_WRITE) == 0) {
		if (prot & (PROT_READ | PROT_EXEC))
			pmap_changebit(pg, 0, PTE_PROT(TLB_WRITE));
		else
			pmap_page_remove(pg);
	}
}

static __inline void
pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
{
	if ((prot & PROT_WRITE) == 0) {
		if (prot & (PROT_READ | PROT_EXEC))
			pmap_write_protect(pmap, sva, eva, prot);
		else
			pmap_remove(pmap, sva, eva);
	}
}

#endif /* _KERNEL */

#if !defined(_LOCORE)
struct pv_entry;
struct vm_page_md {
	struct mutex pvh_mtx;
	struct pv_entry	*pvh_list;	/* head of list (locked by pvh_mtx) */
	u_int		pvh_attrs;	/* to preserve ref/mod */
};

#define	VM_MDPAGE_INIT(pg) do {				\
	mtx_init(&(pg)->mdpage.pvh_mtx, IPL_VM);	\
	(pg)->mdpage.pvh_list = NULL;			\
	(pg)->mdpage.pvh_attrs = 0;			\
} while (0)
#endif

#endif /* _MACHINE_PMAP_H_ */


code:
/*	$OpenBSD: proc.h,v 1.5 2011/11/08 15:39:50 kettenis Exp $	*/

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)proc.h      7.1 (Berkeley) 5/15/91
 */

/*
 * Machine-dependent part of the proc structure for hppa.
 */
struct mdproc {
	struct trapframe *md_regs;	/* registers on current frame */
	volatile int md_astpending;	/* AST pending for this process */
	int	md_flags;		/* machine-dependent flags */

	vaddr_t md_bpva;
	u_int	md_bpsave[2];
};

#define __HAVE_MD_TCB

/* md_flags */


code:
/*	$OpenBSD: profile.h,v 1.3 2003/06/02 23:27:46 millert Exp $	*/

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)profile.h	8.1 (Berkeley) 6/11/93
 */

#define	_MCOUNT_DECL void _mcount

#define	MCOUNT

#ifdef _KERNEL
/*
 * Note that we assume splhigh() and splx() cannot call mcount()
 * recursively.
 */
#define	MCOUNT_ENTER	s = splhigh()
#define	MCOUNT_EXIT	splx(s)
#endif /* _KERNEL */


code:
/*	$OpenBSD: psl.h,v 1.10 2004/09/14 22:41:20 mickey Exp $	*/

/*
 * Copyright (c) 1999-2004 Michael Shalayeff
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_PSL_H_
#define _MACHINE_PSL_H_

/*
 * Rference:
 * 1. PA-RISC 1.1 Architecture and Instruction Set Manual
 *    Hewlett Packard, 3rd Edition, February 1994; Part Number 09740-90039
 */

/*
 * Processor Status Word Bit Positions (in PA-RISC bit order)
 */
#define	PSL_Y_POS	(0)
#define	PSL_Z_POS	(1)
#define	PSL_SS_POS	(3)	/* Reserved, Software-defined */
#define	PSL_W_POS	(4)
#define	PSL_E_POS	(5)
#define	PSL_S_POS	(6)
#define	PSL_T_POS	(7)
#define	PSL_H_POS	(8)
#define	PSL_L_POS	(9)
#define	PSL_N_POS	(10)
#define	PSL_X_POS	(11)
#define	PSL_B_POS	(12)
#define	PSL_C_POS	(13)
#define	PSL_V_POS	(14)
#define	PSL_M_POS	(15)
#define	PSL_CB_POS	(16)
#define	PSL_O_POS	(24)
#define	PSL_G_POS	(25)
#define	PSL_F_POS	(26)
#define	PSL_R_POS	(27)
#define	PSL_Q_POS	(28)
#define	PSL_P_POS	(29)
#define	PSL_D_POS	(30)
#define	PSL_I_POS	(31)

#define	PSL_BITS	"\020\001I\002D\003P\004Q\005R\006F\007G\010O"  \
			"\021M\022V\023C\024B\025X\026N\027L\030H" \
			"\031T\032S\033E\034W\037Z\040Y"

/*
 * Processor Status Word Bit Values
 */
#define	PSL_Y	(1 << (31-PSL_Y_POS))	/* Data Debug Trap Disable */
#define	PSL_Z	(1 << (31-PSL_Z_POS))	/* Instruction Debug Trap Disable */
#define	PSL_SS	(1 << (31-PSL_SS_POS))	/* Reserved; Software Single-Step */
#define	PSL_W	(1 << (31-PSL_W_POS))	/* 64bit address decode enable */
#define	PSL_E	(1 << (31-PSL_E_POS))	/* Little Endian Memory Access Enable */
#define	PSL_S	(1 << (31-PSL_S_POS))	/* Secure Interval Timer */
#define	PSL_T	(1 << (31-PSL_T_POS))	/* Taken Branch Trap Enable */
#define	PSL_H	(1 << (31-PSL_H_POS))	/* Higher-privilege Transfer Trap Enable */
#define	PSL_L	(1 << (31-PSL_L_POS))	/* Lower-privilege Transfer Trap Enable */
#define	PSL_N	(1 << (31-PSL_N_POS))	/* Nullify */
#define	PSL_X	(1 << (31-PSL_X_POS))	/* Data Memory Break Disable */
#define	PSL_B	(1 << (31-PSL_B_POS))	/* Taken Branch */
#define	PSL_C	(1 << (31-PSL_C_POS))	/* Instruction Address Translation Enable */
#define	PSL_V	(1 << (31-PSL_V_POS))	/* Divide Step Correction */
#define	PSL_M	(1 << (31-PSL_M_POS))	/* High-priority Machine Check Mask */
#define	PSL_CB	(1 << (31-PSL_CB_POS))	/* Carry/Borrow Bits */
#define	PSL_O	(1 << (31-PSL_O_POS))	/* Force strong ordering (2.0) */
#define	PSL_G	(1 << (31-PSL_G_POS))	/* Debug Trap Enable */
#define	PSL_F	(1 << (31-PSL_F_POS))	/* Perfomance Monitor Interrupt Unmask */
#define	PSL_R	(1 << (31-PSL_R_POS))	/* Recover Counter Enable */
#define	PSL_Q	(1 << (31-PSL_Q_POS))	/* Interrupt State Collection Enable */
#define	PSL_P	(1 << (31-PSL_P_POS))	/* Protection Identifier Validation Enable */
#define	PSL_D	(1 << (31-PSL_D_POS))	/* Data Address Translation Enable */
#define	PSL_I	(1 << (31-PSL_I_POS))	/* External Interrupt, Power Failure
					   Interrupt, and Low-Priority Machine
					   Check Interrupt unmask */

/*
 * Frequently Used PSW Values
 */
#define	RESET_PSL	(PSL_R | PSL_Q | PSL_P | PSL_D | PSL_I)

#endif  /* _MACHINE_PSL_H_ */


code:
/*	$OpenBSD: pte.h,v 1.13 2013/03/25 20:14:30 deraadt Exp $	*/

/*
 * Copyright (c) 1990,1993,1994 The University of Utah and
 * the Computer Systems Laboratory at the University of Utah (CSL).
 * All rights reserved.
 *
 * Permission to use, copy, modify and distribute this software is hereby
 * granted provided that (1) source code retains these copyright, permission,
 * and disclaimer notices, and (2) redistributions including binaries
 * reproduce the notices in supporting documentation, and (3) all advertising
 * materials mentioning features or use of this software display the following
 * acknowledgement: ``This product includes software developed by the
 * Computer Systems Laboratory at the University of Utah.''
 *
 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
 * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
 * improvements that they make and grant CSL redistribution rights.
 *
 * 	Utah $Hdr: pmap.h 1.24 94/12/14$
 *	Author: Mike Hibler, Bob Wheeler, University of Utah CSL, 9/90
 */

#ifndef	_MACHINE_PTE_H_
#define	_MACHINE_PTE_H_

#define	PTE_PROT_SHIFT	19
#define	PTE_PROT(tlb)	((tlb) >> PTE_PROT_SHIFT)
#define	TLB_PROT(pte)	((pte) << PTE_PROT_SHIFT)
#define	PDE_MASK	(0xffc00000)
#define	PDE_SIZE	(0x00400000)
#define	PTE_MASK	(0x003ff000)
#define	PTE_PAGE(pte)	((pte) & ~PAGE_MASK)

/* TLB access/protection values */
#define TLB_WIRED	0x40000000	/* software only */
#define TLB_REFTRAP	0x20000000
#define TLB_DIRTY	0x10000000
#define TLB_BREAK	0x08000000
#define TLB_AR_MASK	0x07f00000
#define	TLB_READ	0x00000000
#define	TLB_WRITE	0x01000000
#define	TLB_EXECUTE	0x02000000
#define	TLB_GATEWAY	0x04000000
#define	TLB_USER	0x00f00000
#define		TLB_AR_NA	0x07300000
#define		TLB_AR_R	TLB_READ
#define		TLB_AR_RW	TLB_READ|TLB_WRITE
#define		TLB_AR_RX	TLB_READ|TLB_EXECUTE
#define		TLB_AR_RWX	TLB_READ|TLB_WRITE|TLB_EXECUTE
#define TLB_UNCACHABLE	0x00080000
#define TLB_PID_MASK	0x0000fffe

#define	TLB_BITS	"\020\024U\031W\032X\033N\034B\035D\036R\037H"

/* protection for a gateway page */
#define TLB_GATE_PROT	0x04c00000

/* protection for break page */
#define TLB_BREAK_PROT	0x02c00000

#ifndef	_LOCORE
typedef	u_int32_t	pt_entry_t;
#endif

#endif	/* _MACHINE_PTE_H_ */


code:
/*	$OpenBSD: ptrace.h,v 1.4 2011/11/10 22:48:13 deraadt Exp $	*/

/*
 * Copyright (c) 2005 Michael Shalayeff
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

/*
 * MD ptrace definitions
 */
#define	PT_STEP		(PT_FIRSTMACH + 0)
#define	PT_GETREGS	(PT_FIRSTMACH + 1)
#define	PT_SETREGS	(PT_FIRSTMACH + 2)
#define	PT_GETFPREGS	(PT_FIRSTMACH + 3)
#define	PT_SETFPREGS	(PT_FIRSTMACH + 4)


code:
/*	$OpenBSD: rbus_machdep.h,v 1.6 2011/11/10 22:48:13 deraadt Exp $	*/

/*
 * Copyright (c) 2005 Michael Shalayeff
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#if !defined _MACHINE_RBUS_MACHDEP_H_
#define _MACHINE_RBUS_MACHDEP_H_

static __inline int
md_space_map(rbus_tag_t rbt, bus_addr_t bpa, bus_size_t size, int flags,
    bus_space_handle_t *bshp)
{
	if (bshp)
		*(bshp) = bpa;

	return (0);
}

#define md_space_unmap(rbt,bsh,s,addrp)	do { *(addrp) = (bsh); } while (0)

struct pci_attach_args;

#define rbus_pccbb_parent_mem(d, p) (*(p)->pa_pc->pc_alloc_parent)((d), (p), 0)
#define rbus_pccbb_parent_io(d, p)  (*(p)->pa_pc->pc_alloc_parent)((d), (p), 1)

#define pccbb_attach_hook(parent, self, pa)	/* nothing */

#endif /* _MACHINE_RBUS_MACHDEP_H_ */


code:
/*	$OpenBSD: reg.h,v 1.12 2012/08/29 18:58:45 kettenis Exp $	*/

/*
 * Copyright (c) 1998-2004 Michael Shalayeff
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */
/*
 * Copyright (c) 1990,1994 The University of Utah and
 * the Computer Systems Laboratory at the University of Utah (CSL).
 * All rights reserved.
 *
 * Permission to use, copy, modify and distribute this software is hereby
 * granted provided that (1) source code retains these copyright, permission,
 * and disclaimer notices, and (2) redistributions including binaries
 * reproduce the notices in supporting documentation, and (3) all advertising
 * materials mentioning features or use of this software display the following
 * acknowledgement: ``This product includes software developed by the
 * Computer Systems Laboratory at the University of Utah.''
 *
 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
 * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
 * improvements that they make and grant CSL redistribution rights.
 *
 * 	Utah $Hdr: regs.h 1.6 94/12/14$
 *	Author: Bob Wheeler, University of Utah CSL
 */

#ifndef _MACHINE_REG_H_
#define _MACHINE_REG_H_

/*
 * constants for registers for use with the following routines:
 *
 *     void mtctl(reg, value)	- move to control register
 *     int mfctl(reg)		- move from control register
 *     int mtsp(sreg, value)	- move to space register
 *     int mfsr(sreg)		- move from space register
 */

#define	CR_RCTR		0
#define	CR_PIDR1	8
#define	CR_PIDR2	9
#define	CR_CCR		10
#define	CR_SAR		11
#define	CR_PIDR3	12
#define	CR_PIDR4	13
#define	CR_IVA		14
#define	CR_EIEM		15
#define	CR_ITMR		16
#define	CR_PCSQ		17
#define	CR_PCOQ		18
#define	CR_IIR		19
#define	CR_ISR		20
#define	CR_IOR		21
#define	CR_IPSW		22
#define	CR_EIRR		23
#define	CR_HPTMASK	24
#define	CR_VTOP		25
#define	CR_TR2		26
#define	CR_TR3		27
#define	CR_HVTP		28	/* points to a faulted HVT slot on LC cpus */
#define	CR_TR5		29
#define	CR_UPADDR	30	/* paddr of U-area of curproc */
#define	CR_TR7		31

/*
 * Diagnostic registers and bit positions
 */
#define	DR_CPUCFG		0

#define	DR0_PCXS_DHPMC		10	/* r/c D-cache error flag */
#define	DR0_PCXS_ILPMC		14	/* r/c I-cache error flag */
#define	DR0_PCXS_EQWSTO		16	/* r/w enable quad-word stores */
#define	DR0_PCXS_IHE		18	/* r/w I-cache sid hash enable */
#define	DR0_PCXS_DOMAIN		19
#define	DR0_PCXS_DHE		20	/* r/w D-cache sid hash enable */

#define	DR0_PCXT_DHPMC		10	/* r/c L1 D-cache error flag */
#define	DR0_PCXT_ILPMC		14	/* r/c L1 I-cache error flag */
#define	DR0_PCXT_IHE		18	/* r/w I-cache sid hash enable */
#define	DR0_PCXT_DHE		20	/* r/w D-cache sid hash enable */

#define	DR0_PCXL_L2IHPMC	6	/* r/c L2 I-cache error flag */
#define	DR0_PCXL_L2IHPMC_DIS	7	/* r/w L2 I-cache hpmc disable mask */
#define	DR0_PCXL_L2DHPMC	8	/* r/c L2 D-cache error flag */
#define	DR0_PCXL_L2DHPMC_DIS	9	/* r/w L2 D-cache hpmc disable mask */
#define	DR0_PCXL_L1IHPMC	10	/* r/c L1 I-cache error flag */
#define	DR0_PCXL_L1IHPMC_DIS	11	/* r/w L1 I-cache hpmc disable mask */
#define	DR0_PCXL_L2PARERR	15	/* r/c L2 Cache parity error (4 bit) */
#define	DR0_PCXL_STORE0		16	/* r/w scratch space */
#define	DR0_PCXL_PFMASK		17	/* r/w power-fail trap mask */
#define	DR0_PCXL_STORE1		18	/* r/w scratch */
#define	DR0_PCXL_FASTMODE	19	/* r   0-fast, 1-slow */
#define	DR0_PCXL_ISTRM_EN	20	/* r/w I-cache streaming enable */
#define	DR0_PCXL_DUAL_DIS	22	/* r/w disable dual-issue (2 bit) */
#define	DR0_PCXL_ENDIAN		23	/* r/w little endian traps */
#define	DR0_PCXL_SOU_EN		24	/* r/w stall-on-use on dc misses */
#define	DR0_PCXL_SHINT_EN	25	/* r/w no-fill on miss store hints */
#define	DR0_PCXL_IPREF_EN	26	/* r/w L2 to L1 I-cache prefetch */
#define	DR0_PCXL_L2DHASH_EN	27	/* r/w L2 D-cache hash enable */
#define	DR0_PCXL_L2IHASH_EN	28	/* r/w L2 I-cache hash enable */
#define	DR0_PCXL_L1ICACHE_EN	29	/* r/w L1 I-cache enable */
#define	DR0_PCXL_HIT		30	/* r   Diag cache read hit indication */
#define	DR0_PCXL_PARERR		31	/* r   Diag cache read parity error */

#define	DR0_PCXL2_L1DHPMC	8	/* r/c L1 D-cache error flag */
#define	DR0_PCXL2_L1DHPMC_DIS	9	/* r/w L1 D-cache hpmc disable */
#define	DR0_PCXL2_L2DHPMC	10	/* r/c L1 I-cache error flag */
#define	DR0_PCXL2_L2DHPMC_DIS	11	/* r/w L1 I-cache hpmc disable */
#define	DR0_PCXL2_SCRATCH	12	/* r/w scratch register */
#define	DR0_PCXL2_ACCEL_IO	13	/*  /w enable accel IO writes */
#define	DR0_PCXL2_STORE0	16	/* r/w scratch space */
#define	DR0_PCXL2_PFMASK	17	/* r/w power-fail trap mask */
#define	DR0_PCXL2_STORE1	18	/* r/w scratch */
#define	DR0_PCXL2_DCSAFE	19	/* r/w serialize all data cache hangs */
#define	DR0_PCXL2_ISTRM_EN	20	/* r/w I-cache streaming enable */
#define	DR0_PCXL2_DUAL_DIS	22	/* r/w disable dual-issue (2 bit) */
#define	DR0_PCXL2_ENDIAN	23	/* r/w little endian traps */
#define	DR0_PCXL2_SOU_EN	24	/* r/w stall-on-use on dc misses */
#define	DR0_PCXL2_SHINT_EN	25	/* r/w no-fill on miss store hints */
#define	DR0_PCXL2_IPREF_EN	26	/* r/w L2 to L1 I-cache prefetch */
#define	DR0_PCXL2_LMIN_EN	27	/* r/w minor ill insn traps on LIH */
#define	DR0_PCXL2_RMIN_EN	28	/* r/w major ill insn traps on RIH */
#define	DR0_PCXL2_L1CACHE_EN	29	/* r/w L1 I-cache enable */

#define	DR_DTLB			8

#define	DR_ITLB			9

#define	DR0_PCXL2_HTLB_ADDR	24	/* page address of the htlb */
#define	DR0_PCXL2_HTLB_CFG	25	/* htlb config */
#define	DR0_PCXL2_HTLB_P	0	/* r   latches power fail signal */
#define	DR0_PCXL2_HTLB_MASK	19	/*   w 12bit mask of the hash */
#define	DR0_PCXL2_HTLB_FP	26	/* r/w 3bit FP delay */
#define	DR0_PCXL2_HTLB_I	28	/* r/w disable ITLB htlb lookup */
#define	DR0_PCXL2_HTLB_U	29	/* r/w set cr28 only if tag nomatch */
#define	DR0_PCXL2_HTLB_N	30	/* r/w set cr28 from w3 or w7 (0) */
#define	DR0_PCXL2_HTLB_D	31	/* r/w disable DTLB htlb lookup */

#define	DR_ITLB_SIZE_1		24
#define	DR_ITLB_SIZE_0		25

#define	DR_DTLB_SIZE_1		26
#define	DR_DTLB_SIZE_0		27

#define CCR_MASK 0xff

#define	HPPA_NREGS	(32)
#define	HPPA_NFPREGS	(33)	/* 33rd is used for r0 in fpemul */

#ifndef _LOCORE

struct reg {
	uint32_t r_regs[HPPA_NREGS];	/* r0 is psw */

	uint32_t r_sar;

	uint32_t r_pcsqh;
	uint32_t r_pcsqt;
	uint32_t r_pcoqh;
	uint32_t r_pcoqt;

	uint32_t r_sr0;
	uint32_t r_sr1;
	uint32_t r_sr2;
	uint32_t r_sr3;
	uint32_t r_sr4;
	uint32_t r_sr5;
	uint32_t r_sr6;
	uint32_t r_sr7;

	uint32_t r_cr26;
	uint32_t r_cr27;
};

struct fpreg {
	uint64_t fpr_regs[HPPA_NFPREGS];
};
#endif /* !_LOCORE */

#endif /* _MACHINE_REG_H_ */


code:
/*	$OpenBSD: reloc.h,v 1.4 2011/11/10 22:48:13 deraadt Exp $	*/

/*
 * Copyright (c) 1999,2005 Michael Shalayeff
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef _MACHINE_RELOC_H_
#define _MACHINE_RELOC_H_

/* pa1 compatibility */
#define	RELOC_DLTREL21L	RELOC_GPREL21L
#define	RELOC_DLTREL14R	RELOC_GPREL14R
#define	RELOC_DLTIND21L	RELOC_LTOFF21L
#define	RELOC_DLTIND14R	RELOC_LTOFF14R
#define	RELOC_DLTIND14F	RELOC_LTOFF14F
#define	RELOC_DLTREL14WR	RELOC_GPREL14WR
#define	RELOC_DLTREL14DR	RELOC_GPREL14DR
#define	RELOC_DLTIND14WR	RELOC_LTOFF14WR
#define	RELOC_DLTIND14DR	RELOC_LTOFF14DR

enum reloc_type {
	RELOC_NONE = 0,
	RELOC_DIR32,		/*	symbol + addend*/
	RELOC_DIR21L,		/*	LR(symbol, addend)  */
	RELOC_DIR17R,		/*	RR(symbol, addend) */
	RELOC_DIR17F,		/*	symbol + addend */
	RELOC_DIR14R = 6,	/*	RR(symbol, addend) */
	RELOC_PCREL32 = 9,	/*	pa2: symbol - PC - 8 + addend */
	RELOC_PCREL21L,		/*	L(symbol - PC - 8 + addend */
	RELOC_PCREL17R,		/*	R(symbol - PC - 8 + addend */
	RELOC_PCREL17F,		/*	symbol - PC - 8 + addend */
	RELOC_PCREL17C,		/* pa1: symbol - PC - 8 + addend */
	RELOC_PCREL14R,		/*	R(symbol - PC - 8 + addend */
	RELOC_DPREL21L = 18,	/* pa1: LR(symbol - GP, addend */
	RELOC_DPREL14WR,	/* pa1: RR(symbol - GP, addend */
	RELOC_DPREL14DR,	/* pa1: RR(symbol - GP, addend */
	RELOC_DPREL14R,		/* pa1: RR(symbol - GP, addend */
	RELOC_GPREL21L = 26,	/*	LR(symbol - GP, addend */
	RELOC_GPREL14R = 30,	/*	RR(symbol - GP, addend */
	RELOC_LTOFF21L = 34,	/*	L(ltoff(symbol + addend)) */
	RELOC_LTOFF14R = 38,	/*	R(ltoff(symbol + addend)) */
	RELOC_LTOFF14F,		/* pa1: ltoff(symbol + addend) */
	RELOC_SETBASE,		/*	no relocation; base = symbol */
	RELOC_SECREL32,		/*	symbol - SECT + addend */
	RELOC_BASEREL21L,	/* pa1: LR(symbol - base, addend) */
	RELOC_BASEREL17R,	/* pa1: RR(symbol - base, addend) */
	RELOC_BASEREL14R = 46,	/* pa1: RR(symbol - base, addend) */
	RELOC_SEGBASE = 48,	/*	no relocation; SB = symbol */
	RELOC_SEGREL32,		/*	symbol - SB + addend */
	RELOC_PLTOFF21L,	/*	LR(pltoff(symbol), addend */
	RELOC_PLTOFF14R = 54,	/*	RR(pltoff(symbol), addend */
	RELOC_PLTOFF14F,	/* pa1: pltoff(symbol) + addend */
	RELOC_LTOFF_FPTR32 = 57,/* pa2: ltoff(fptr(symbol + addend)) */
	RELOC_LTOFF_FPTR21L,	/* pa2: L(ltoff(fptr(symbol + addend))) */
	RELOC_LTOFF_FPTR14R= 62,/* pa2: R(ltoff(fptr(symbol + addend))) */
	RELOC_FPTR64 = 64,	/* pa2: fptr(symbol + addend) */
	RELOC_PLABEL32,		/* pa1: fptr(symbol) */
	RELOC_PCREL64 = 72,	/* pa2: symbol - PC - 8 + addend */
	RELOC_PCREL22C,		/* pa1: symbol - PC - 8 + addend */
	RELOC_PCREL22F,		/*	symbol - PC - 8 + addend */
	RELOC_PCREL14WR,	/*	R(symbol - PC - 8 + addend) */
	RELOC_PCREL14DR,	/*	R(symbol - PC - 8 + addend) */
	RELOC_PCREL16F,		/* pa2: symbol - PC - 8 + addend */
	RELOC_PCREL16WF,	/* pa2: symbol - PC - 8 + addend */
	RELOC_PCREL16DF,	/* pa2: symbol - PC - 8 + addend */
	RELOC_DIR64,		/* pa2: symbol + addend */
	RELOC_DIR14WR = 83,	/*	RR(symbol, addend) */
	RELOC_DIR14DR,		/*	RR(symbol, addend) */
	RELOC_DIR16F,		/* pa2: symbol + addend */
	RELOC_DIR16WF,		/* pa2: symbol + addend */
	RELOC_DIR16DF,		/* pa2: symbol + addend */
	RELOC_GPREL64,		/* pa2: symbol - GP + addend */
	RELOC_GPREL14WR = 91,	/*	RR(symbol - GP, addend) */
	RELOC_GPREL14DR,	/*	RR(symbol - GP, addend) */
	RELOC_GPREL16F,		/* pa2: symbol - GP + addend */
	RELOC_GPREL16WF,	/* pa2: symbol - GP + addend */
	RELOC_GPREL16DF,	/* pa2: symbol - GP + addend */
	RELOC_LTOFF64 = 96,	/* pa2: ltoff(symbol + addend) */
	RELOC_LTOFF14WR = 99,	/*	R(ltoff(symbol + addend)) */
	RELOC_LTOFF14DR,	/*	R(ltoff(symbol + addend)) */
	RELOC_LTOFF16F,		/* pa2: ltoff(symbol + addend) */
	RELOC_LTOFF16WF,	/* pa2: ltoff(symbol + addend) */
	RELOC_LTOFF16DF,	/* pa2: ltoff(symbol + addend) */
	RELOC_SECREL64,		/* pa2: symbol - SECT + addend */
	RELOC_BASEREL14WR=107,	/* pa1: RR(symbol - base, addend */
	RELOC_BASEREL14DR,	/* pa1: RR(symbol - base, addend */
	RELOC_SEGREL64 = 112,	/* pa2: symbol - SB + addend */
	RELOC_PLTOFF14WR =115,	/*	RR(pltoff(symbol) + addend) */
	RELOC_PLTOFF14DR,	/*	RR(pltoff(symbol) + addend) */
	RELOC_PLTOFF16F,	/* pa2: pltoff(symbol) + addend */
	RELOC_PLTOFF16WF,	/* pa2: pltoff(symbol) + addend */
	RELOC_PLTOFF16DF,	/* pa2: pltoff(symbol) + addend */
	RELOC_LTOFF_FPTR64,	/* pa2: ltoff(fptr(symbol + addend)) */
	RELOC_LTOFF_FPTR14WR=123,/* pa2: R(ltoff(fptr(symbol + addend) */
	RELOC_LTOFF_FPTR14DR,	/* pa2: R(ltoff(fptr(symbol + addend) */
	RELOC_LTOFF_FPTR16F,	/* pa2: ltoff(fptr(symbol + addend)) */
	RELOC_LTOFF_FPTR16WF,	/* pa2: ltoff(fptr(symbol + addend)) */
	RELOC_LTOFF_FPTR16DF,	/* pa2: ltoff(fptr(symbol + addend)) */
	RELOC_LORESERVE,	/*	reserved for environment-specific use */
	RELOC_COPY = 128,
	RELOC_IPLT,
	RELOC_EPLT,
	RELOC_GDATA,
	RELOC_JMPSLOT,
	RELOC_RELATIVE,
	RELOC_HIRESERVE = 255
};

#endif /* _MACHINE_RELOC_H_ */


code:
/*	$OpenBSD: setjmp.h,v 1.1 1998/08/28 19:56:05 mickey Exp $	*/

/*
 * machine/setjmp.h: machine dependent setjmp-related information.
 */

#define _JBLEN  48              /* size, in longs, of a jmp_buf */


code:
/*	$OpenBSD: signal.h,v 1.11 2013/04/01 17:18:20 deraadt Exp $	*/

/*
 * Copyright (c) 1994, The University of Utah and
 * the Computer Systems Laboratory at the University of Utah (CSL).
 * All rights reserved.
 *
 * Permission to use, copy, modify and distribute this software is hereby
 * granted provided that (1) source code retains these copyright, permission,
 * and disclaimer notices, and (2) redistributions including binaries
 * reproduce the notices in supporting documentation, and (3) all advertising
 * materials mentioning features or use of this software display the following
 * acknowledgement: ``This product includes software developed by the
 * Computer Systems Laboratory at the University of Utah.''
 *
 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
 * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
 * improvements that they make and grant CSL redistribution rights.
 *
 * 	Utah $Hdr: signal.h 1.3 94/12/16$
 */

#ifndef	_MACHINE_SIGNAL_H_
#define	_MACHINE_SIGNAL_H_

#include <sys/cdefs.h>

/*
 * Machine-dependent signal definitions
 */

typedef int sig_atomic_t;

#ifdef _KERNEL
#include <machine/trap.h>
#endif

#if __BSD_VISIBLE || __XPG_VISIBLE >= 420
/*
 * Information pushed on stack when a signal is delivered.
 * This is used by the kernel to restore state following
 * execution of the signal handler.  It is also made available
 * to the handler to allow it to restore state properly if
 * a non-standard exit is performed.
 */
struct	sigcontext {
	unsigned long	__sc_unused;
	unsigned long	sc_mask;	/* signal mask to restore */
	unsigned long	sc_ps;		/* psl to restore */
	unsigned long	sc_fp;		/* fp to restore */
	unsigned long	sc_pcoqh;	/* pc offset queue (head) to restore */
	unsigned long	sc_pcoqt;	/* pc offset queue (tail) to restore */
	unsigned long	sc_resv[2];
	unsigned long	sc_regs[32];
	unsigned long	sc_fpregs[64];
};
#endif /* __BSD_VISIBLE || __XPG_VISIBLE >= 420 */
#endif  /* !_MACHINE_SIGNAL_H_ */


code:
/*	$OpenBSD: som.h,v 1.4 2004/04/07 18:24:20 mickey Exp $	*/

/*
 * Copyright (c) 1998 Michael Shalayeff
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef	_MACHINE_SOM_H_
#define	_MACHINE_SOM_H_

/* system_id */
#define	SOM_BSD		800
#define	SOM_PA10	0x20b
#define	SOM_PA11	0x210
#define	SOM_PA12	0x211
#define	SOM_PA20	0x214

/* a_magic */
#define	SOM_MAGIC	0x107
#define	SOM_SHARED	0x108
#define	SOM_DEMAND	0x10B

#define	SOM_BADMAGIC(fh) \
	((fh)->system_id != SOM_PA10 && \
	 (fh)->system_id != SOM_PA11 && \
	 (fh)->system_id != SOM_PA12 && \
	 (fh)->system_id != SOM_PA20)

struct som_filehdr {
	u_short system_id;
	u_short a_magic;
	u_int   version_id;
	u_int	time_secs;		/* sys time (zero if unused) */
	u_int	time_nsecs;
	u_int	ep_space;		/* ep space */
	u_int	ep_subspace;
	u_int	entry;			/* how is it different from a_entry? */
	u_int	aux_loc;		/* aux header location */
	u_int	aux_size;
	u_int	som_length;		/* entire image length */
	u_int	dp;			/* dp presumed at compilation time */
	u_int	space_loc;		/* space dictionary location */
	u_int	space_total;		/* N of entries in the space dict */
	u_int	subspace_loc;		/* subspace dict location */
	u_int	subspace_total;		/* N of entries in the subspace dict */
	u_int	ld_fixup_loc;		/* space ref array (relocs?) */
	u_int	ld_fixup_total;		/* N of space ref records */
	u_int	space_str_loc;		/* {,sub}space string table location */
	u_int	space_str_size;		/* size of the above */
	u_int	init_loc;		/* init ptrs location */
	u_int	init_total;		/* N of entries in the above */
	u_int	dict_loc;		/* module dictionary location */
	u_int	dict_total;		/* number of modules */
	u_int	sym_loc;		/* symbol table location */
	u_int	sym_total;		/* N of symbols */
	u_int	fixup_loc;		/* fixpup reqs location */
	u_int	fixup_total;		/* N of the fixup reqs */
	u_int	strings_loc;		/* string table location */
	u_int	strings_size;		/* size of the strings table */
	u_int	unloadable_loc;		/* unloadable spaces location */
	u_int	unloadable_size;	/* size of the unloadable spaces */
	u_int	checksum;		/* header checksum? */
};

struct som_exec_aux {
	u_int	mandatory : 1;
	u_int	copy : 1;
	u_int	append : 1;
	u_int	ignore : 1;
	u_int	reserved : 12;
	u_int	type : 16;
	u_int	length;
	long	a_tsize;
	long	a_tmem;
	long	a_tfile;
	long	a_dsize;
	long	a_dmem;
	long	a_dfile;
	long	a_bsize;
	long	a_entry;
	long	a_flags;
	long	a_bfill;
};

struct som_sym {
	u_int	sym_type : 8;
	u_int	sym_scope : 4;
	u_int	sym_chklevel : 3;
	u_int	sym_qualify : 1;
	u_int	sym_ifrozen : 1;
	u_int	sym_resident : 1;
	u_int	sym_is_common : 1;
	u_int	sym_dup_common : 1;
	u_int	sym_xleast : 2;
	u_int	sym_arg_reloc : 10;
	union {
		char *n_name;
		u_int n_strx;
	} sym_name, sym_qualifier_name;
	u_int	sym_info;
	u_int	sym_value;

};

/* sym_type */
#define	SOM_ST_NULL		0
#define	SOM_ST_ABS		1
#define	SOM_ST_DATA		2
#define	SOM_ST_CODE		3
#define	SOM_ST_PRI_PROG		4
#define	SOM_ST_SEC_PROG		5
#define	SOM_ST_ENTRY		6
#define	SOM_ST_STORAGE		7
#define	SOM_ST_STUB		8
#define	SOM_ST_MODULE		9
#define	SOM_ST_SYM_EXT		10
#define	SOM_ST_ARG_EXT		11
#define	SOM_ST_MILLICODE	12
#define	SOM_ST_PLABEL		13

/* sym_scope */
#define	SOM_SS_UNSAT		0
#define	SOM_SS_EXTERNAL		1
#define	SOM_SS_GLOBAL		2
#define	SOM_SS_UNIVERSAL	3

#endif /* _MACHINE_SOM_H_ */


code:
/*	$OpenBSD: spinlock.h,v 1.4 2013/06/01 20:47:40 tedu Exp $	*/

#ifndef _MACHINE_SPINLOCK_H_
#define _MACHINE_SPINLOCK_H_

#define _ATOMIC_LOCK_UNLOCKED	(1)
#define _ATOMIC_LOCK_LOCKED	(0)
typedef long _atomic_lock_t __attribute__((__aligned__(16)));

#ifndef _KERNEL
int _atomic_lock(volatile _atomic_lock_t *);
#endif

#endif


code:
/*	$OpenBSD: stdarg.h,v 1.11 2014/03/11 19:45:27 guenther Exp $	*/

/*-
 * Copyright (c) 1991, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)stdarg.h	8.1 (Berkeley) 6/10/93
 */

#ifndef _MACHINE_STDARG_H_
#define	_MACHINE_STDARG_H_

#include <sys/cdefs.h>
#include <machine/_types.h>

typedef __va_list va_list;

#define	va_start(ap,lastarg)	((ap) = (va_list)__builtin_saveregs())

#define va_arg(ap,type)							\
	(sizeof(type) > 8 ?						\
	    ((ap = (va_list) ((char *)ap - sizeof (int))),		\
	     (*((type *) (void *) (*((int *) (ap)))))):			\
	    ((ap = (va_list) ((long)((char *)ap - sizeof (type)) &	\
	                             (sizeof(type) > 4 ? ~0x7 : ~0x3))),\
	     (*((type *) (void *) ((char *)ap + ((8 - sizeof(type)) % 4))))))

#define	va_end(ap)

#endif /* !_MACHINE_STDARG_H */


code:
/*	$OpenBSD: tcb.h,v 1.2 2011/11/08 15:39:50 kettenis Exp $	*/

/*
 * Copyright (c) 2011 Philip Guenther <guenther@openbsd.org>
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef _MACHINE_TCB_H_
#define _MACHINE_TCB_H_

#ifdef _KERNEL

#define TCB_GET(p)		\
	((void *)(p)->p_md.md_regs->tf_cr27)
#define TCB_SET(p, addr)	\
	((p)->p_md.md_regs->tf_cr27 = (unsigned)(addr))

#else /* _KERNEL */

/* ELF TLS ABI calls for small TCB, with static TLS data after it */
#define TLS_VARIANT	1

/* Get a pointer to the TCB itself */
static inline void *
__hppa_get_tcb(void)
{
	void *val;
	__asm__ ("mfctl %%cr27, %0" : "=r" (val));
	return val;
}
#define TCB_GET()		__hppa_get_tcb()

#endif /* _KERNEL */

#endif /* _MACHINE_TCB_H_ */


code:
/*	$OpenBSD: trap.h,v 1.12 2005/05/26 04:34:52 kettenis Exp $	*/

/*
 * Copyright (c) 1999-2004 Michael Shalayeff
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef	_MACHINE_TRAP_H_
#define	_MACHINE_TRAP_H_

/*
 * This is PA-RISC trap types per 1.1 specs, see .c files for references.
 */
#define	T_NONEXIST	0	/* invalid interrupt vector */
#define	T_HPMC		1	/* high priority machine check */
#define	T_POWERFAIL	2	/* power failure */
#define	T_RECOVERY	3	/* recovery counter */
#define	T_INTERRUPT	4	/* external interrupt */
#define	T_LPMC		5	/* low-priority machine check */
#define	T_ITLBMISS	6	/* instruction TLB miss fault */
#define	T_IPROT		7	/* instruction protection */
#define	T_ILLEGAL	8	/* Illegal instruction */
#define	T_IBREAK	9	/* break instruction */
#define	T_PRIV_OP	10	/* privileged operation */
#define	T_PRIV_REG	11	/* privileged register */
#define	T_OVERFLOW	12	/* overflow */
#define	T_CONDITION	13	/* conditional */
#define	T_EXCEPTION	14	/* assist exception */
#define	T_DTLBMISS	15	/* data TLB miss */
#define	T_ITLBMISSNA	16	/* ITLB non-access miss */
#define	T_DTLBMISSNA	17	/* DTLB non-access miss */
#define	T_DPROT		18	/* data protection/rights/alignment <7100 */
#define	T_DBREAK	19	/* data break */
#define	T_TLB_DIRTY	20	/* TLB dirty bit */
#define	T_PAGEREF	21	/* page reference */
#define	T_EMULATION	22	/* assist emulation */
#define	T_HIGHERPL	23	/* higher-privelege transfer */
#define	T_LOWERPL	24	/* lower-privilege transfer */
#define	T_TAKENBR	25	/* taken branch */
#define	T_DATACC	26	/* data access rights >=7100 */
#define	T_DATAPID	27	/* data protection ID >=7100 */
#define	T_DATALIGN	28	/* unaligned data ref */
#define	T_PERFMON	29	/* performance monitor interrupt */
#define	T_IDEBUG	30	/* debug SFU interrupt */
#define	T_DDEBUG	31	/* debug SFU interrupt */

/*
 * Reserved range for traps is 0-63, place user flag at 6th bit
 */
#define	T_USER_POS	25
#define	T_USER		(1 << (31 - T_USER_POS))

/*
 * Various trap frame flags.
 */
#define	TFF_LAST_POS	0
#define	TFF_ITLB_POS	1
#define	TFF_SYS_POS	2
#define	TFF_INTR_POS	3

#define	TFF_LAST	(1 << (31 - TFF_LAST_POS))
#define	TFF_ITLB	(1 << (31 - TFF_ITLB_POS))
#define	TFF_SYS		(1 << (31 - TFF_SYS_POS))
#define	TFF_INTR	(1 << (31 - TFF_INTR_POS))

/*
 * Define this for pretty printings of trapflags.
 */
#define	T_BITS	"\020\07user\036intr\037itlb\040last"

/*
 * These are break instruction entry points.
 */
/* im5 */
#define	HPPA_BREAK_KERNEL	0
/* im13 */
#define HPPA_BREAK_SS		4
#define	HPPA_BREAK_KGDB		5
#define	HPPA_BREAK_GET_PSW	9
#define	HPPA_BREAK_SET_PSW	10
#define	HPPA_BREAK_SPLLOWER	11

/*
 * break instruction decoding.
 */
#define	break5(i)	((i) & 0x1f)
#define	break13(i)	(((i) >> 13) & 0x1fff)

#endif	/* _MACHINE_TRAP_H_ */


code:
/*	$OpenBSD: varargs.h,v 1.2 2003/12/08 08:25:17 pvalchev Exp $	*/

#ifndef _MACHINE_VARARGS_H_
#define	_MACHINE_VARARGS_H_

#include <machine/stdarg.h>

#define	__va_ellipsis	...

#define	va_alist	__builtin_va_alist
#define	va_dcl		long __builtin_va_alist; __va_ellipsis

#undef	va_start
#define	va_start(ap) \
	((ap) = (va_list)&__builtin_va_alist)

#endif /* !_MACHINE_VARARGS_H */


code:
/*	$OpenBSD: vmparam.h,v 1.46 2015/02/10 10:02:55 tedu Exp $	*/

/*
 * Copyright (c) 1988-1994, The University of Utah and
 * the Computer Systems Laboratory at the University of Utah (CSL).
 * All rights reserved.
 *
 * Permission to use, copy, modify and distribute this software is hereby
 * granted provided that (1) source code retains these copyright, permission,
 * and disclaimer notices, and (2) redistributions including binaries
 * reproduce the notices in supporting documentation, and (3) all advertising
 * materials mentioning features or use of this software display the following
 * acknowledgement: ``This product includes software developed by the
 * Computer Systems Laboratory at the University of Utah.''
 *
 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
 * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
 * improvements that they make and grant CSL redistribution rights.
 *
 * 	Utah $Hdr: vmparam.h 1.16 94/12/16$
 */

#ifndef _MACHINE_VMPARAM_H_
#define _MACHINE_VMPARAM_H_

/*
 * Machine dependent constants for HP PA
 */
/*
 * USRTEXT is the start of the user text/data space, while USRSTACK
 * is the bottm (start) of the user stack.
 */
#define	USRTEXT		PAGE_SIZE		/* Start of user .text */
#define	USRSTACK	0x78000000UL		/* Start of user stack */
#define	SYSCALLGATE	0xC0000000		/* syscall gateway page */

/*
 * Virtual memory related constants, all in bytes
 */
#ifndef MAXTSIZ
#define	MAXTSIZ		(512*1024*1024UL)	/* max text size */
#endif
#ifndef DFLDSIZ
#define	DFLDSIZ		(16*1024*1024)		/* initial data size limit */
#endif
#ifndef MAXDSIZ
#define	MAXDSIZ		(1*1024*1024*1024UL)	/* max data size */
#endif
#ifndef BRKSIZ
#define	BRKSIZ		MAXDSIZ			/* heap gap size */
#endif
#ifndef	DFLSSIZ
#define	DFLSSIZ		(2*1024*1024)		/* initial stack size limit */
#endif
#ifndef	MAXSSIZ
#define	MAXSSIZ		(32*1024*1024UL)	/* max stack size */
#endif

#define	STACKGAP_RANDOM	256*1024

#ifndef USRIOSIZE
#define	USRIOSIZE	((2*HPPA_PGALIAS)/PAGE_SIZE)	/* 8mb */
#endif

/*
 * PTEs for system V style shared memory.
 * This is basically slop for kmempt which we actually allocate (malloc) from.
 */
#ifndef SHMMAXPGS
#define SHMMAXPGS	8192	/* 32mb */
#endif

/* user/kernel map constants */
#define	VM_MIN_ADDRESS		((vaddr_t)PAGE_SIZE)
#define	VM_MAXUSER_ADDRESS	((vaddr_t)0xc0000000)
#define	VM_MAX_ADDRESS		VM_MAXUSER_ADDRESS
#define	VM_MIN_KERNEL_ADDRESS	((vaddr_t)0xc0001000)
#define	VM_MAX_KERNEL_ADDRESS	((vaddr_t)0xef000000)

/* use a small range for PIE to minimize mmap pressure */
#define	VM_PIE_MIN_ADDR		PAGE_SIZE
#define	VM_PIE_MAX_ADDR		0x40000UL

/* virtual sizes (bytes) for various kernel submaps */
#define VM_PHYS_SIZE		(USRIOSIZE*PAGE_SIZE)

#define	VM_PHYSSEG_MAX		1	/* this many physmem segments */
#define	VM_PHYSSEG_STRAT	VM_PSTRAT_RANDOM

#define	VM_PHYSSEG_NOADD	/* XXX until uvm code is fixed */

#endif	/* _MACHINE_VMPARAM_H_ */


code: src/sys/arch/hppa/spmath

path: sys/arch/hppa/spmath/CVS/Repository