code:
/*	$OpenBSD: av400.h,v 1.10 2013/10/10 21:24:59 miod Exp $	*/
/*
 * Copyright (c) 1999 Steve Murphree, Jr.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Steve Murphree, Jr.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
/*
 * Mach Operating System
 * Copyright (c) 1991 Carnegie Mellon University
 * Copyright (c) 1991 OMRON Corporation
 * All Rights Reserved.
 *
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 */

#ifndef	_MACHINE_AV400_H_
#define	_MACHINE_AV400_H_

#define	AV400_PROM		0xffc00000
#define	AV400_PROM_SIZE		0x00200000
#define	AV400_SRAM		0xffe00000
#define	AV400_SRAM_SIZE		0x00020000
#define	AV400_UTILITY		0xfff00000
#define	AV400_UTILITY_SIZE	0x00100000

/*
 * AV400 VME mappings
 */

#define	AV400_VME32_BASE	0x00000000
#define	AV400_VME32_START1	0x10000000
#define	AV400_VME32_END1	0x7fffffff
#define	AV400_VME32_START2	0x90000000
#define	AV400_VME32_END2	0xfdffffff
#define	AV400_VME24_BASE	0xfe000000
#define	AV400_VME24_START	0x00000000
#define	AV400_VME24_END		0x00ffffff
#define	AV400_VME16_BASE	0xffff0000
#define	AV400_VME16_START	0x00000000
#define	AV400_VME16_END		0x0000ffff

/*
 * AV400 declarations for hardware level device registers and such.
 */

#define	AV400_SETSWI	0xfff84080 	/* generate soft interrupt */
#define	AV400_CLRSWI	0xfff84084 	/* reset soft interrupt */

#define	AV400_VIRQLV	0xfff85000
#define	AV400_VIACK1V	0xfff85004
#define	AV400_VIACK2V	0xfff85008
#define	AV400_VIACK3V	0xfff8500c
#define	AV400_VIACK4V	0xfff85010
#define	AV400_VIACK5V	0xfff85014
#define	AV400_VIACK6V	0xfff85018
#define	AV400_VIACK7V	0xfff8501c
#define	AV400_VIRQV	0xfff85020

/*
 * IEN and IST register bits
 * See ``Programming System control and I/O registers for the 100, 200, 300,
 * 400, 3000 and 4000 series'', section 3 (Interrupts).
 */

#define	AV400_IRQ_RESERVED	0x1800018c	/* all reserved bits */
#define AV400_IRQ_ABORT		0x80000000	/* 31 - Abort */
#define AV400_IRQ_ACF		0x40000000	/* 30 - AC Fail */
#define AV400_IRQ_ARBTO		0x20000000	/* 29 - VME Arbiter Timeout */
#define AV400_IRQ_ZBUF		0x04000000	/* 26 - Z Buffer */
#define AV400_IRQ_VID		0x02000000	/* 25 - Video */
#define AV400_IRQ_PAR		0x01000000	/* 24 - Parity Error */
#define AV400_IRQ_VME7		0x00800000	/* 23 - VMEBus level 7 */
#define AV400_IRQ_KBD		0x00400000	/* 22 - Keyboard */
#define AV400_IRQ_CIOI		0x00200000	/* 21 - CIO */
#define AV400_IRQ_SF		0x00100000	/* 20 - System Failure */
#define AV400_IRQ_VME6		0x00080000	/* 19 - VMEBus level 6 */
#define AV400_IRQ_PPI		0x00040000	/* 18 - Parallel Port */
#define AV400_IRQ_DI1		0x00020000	/* 17 - DUART1 */
#define AV400_IRQ_DI2		0x00010000	/* 16 - DUART2 */
#define AV400_IRQ_ECI		0x00008000	/* 15 - Ethernet Controller */
#define AV400_IRQ_VME5		0x00004000	/* 14 - VMEBus level 5 */
#define AV400_IRQ_DTC		0x00002000	/* 13 - DMA Terminal Count */
#define AV400_IRQ_VME4		0x00001000	/* 12 - VMEBus level 4 */
#define AV400_IRQ_DWP		0x00000800	/* 11 - DMA Write Protect */
#define AV400_IRQ_VME3		0x00000400	/* 10 - VMEBus level 3 */
#define AV400_IRQ_DVB		0x00000200	/* 09 - DMA Valid Bit */
#define AV400_IRQ_VME2		0x00000040	/* 06 - VMEBus level 2 */
#define AV400_IRQ_SCI		0x00000020	/* 05 - SCSI Controller */
#define AV400_IRQ_VME1		0x00000010	/* 04 - VMEBus level 1 */
#define AV400_IRQ_SWI1		0x00000002	/* 01 - SW Interrupt level 1 */
#define AV400_IRQ_SWI0		0x00000001	/* 00 - SW Interrupt level 0 */

#define AV400_IST_STRING	"\20" \
	"\40ABRT\37ACF\36ARBTO\33ZBUF\32VID\31PAR" \
	"\30IRQ7\27KBD\26CIOI\25SF\24IRQ6\23PPI\22DI1\21DI2" \
	"\20ECI\17IRQ5\16DTC\15IRQ4\14DWP\13IRQ3\12DVB" \
	"\7IRQ2\6SCI\5IRQ1\2SWI1\1SWI0"

/*
 * Onboard device addresses
 */

#define	AV400_SCSI	0xfff8a000
#define	AV400_LAN	0xfff8c000

/*
 * CMMU addresses
 */

#define AV400_CMMU_D0	0xfff00000
#define AV400_CMMU_I0	0xfff01000
#define AV400_CMMU_D1	0xfff02000
#define AV400_CMMU_I1	0xfff03000
#define AV400_CMMU_D2	0xfff04000
#define AV400_CMMU_I2	0xfff05000
#define AV400_CMMU_D3	0xfff06000
#define AV400_CMMU_I3	0xfff07000

#endif	/* _MACHINE_AV400_H_ */


code:
/*	$OpenBSD: av530.h,v 1.5 2013/09/24 20:14:35 miod Exp $	*/
/*
 * Copyright (c) 2006, 2010 Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef	_MACHINE_AV530_H_
#define	_MACHINE_AV530_H_

#define	AV530_PROM		0xffc00000
#define	AV530_PROM_SIZE		0x00080000
#define	AV530_UTILITY		0xfff00000
#define	AV530_UTILITY_SIZE	0x00100000

/*
 * AV530 VME mappings
 */

#define	AV530_VME32_BASE	0x00000000
#define	AV530_VME32_START1	0x40000000
#define	AV530_VME32_END1	0x7fffffff
#define	AV530_VME32_START2	0x90000000
#define	AV530_VME32_END2	0xfdffffff
#define	AV530_VME24_BASE	0xfe000000
#define	AV530_VME24_START	0x00000000
#define	AV530_VME24_END		0x00ffffff
#define	AV530_VME16_BASE	0xffff0000
#define	AV530_VME16_START	0x00000000
#define	AV530_VME16_END		0x0000ffff

/*
 * AV530 declarations for hardware level device registers and such.
 */

#define	AV530_SETSWI	0xfff84080 	/* generate soft interrupt */
#define	AV530_CLRSWI	0xfff84084 	/* reset soft interrupt */

#define	AV530_VIRQLV	0xfff85000
#define	AV530_VIACK1V	0xfff85004
#define	AV530_VIACK2V	0xfff85008
#define	AV530_VIACK3V	0xfff8500c
#define	AV530_VIACK4V	0xfff85010
#define	AV530_VIACK5V	0xfff85014
#define	AV530_VIACK6V	0xfff85018
#define	AV530_VIACK7V	0xfff8501c
#define	AV530_VIRQV	0xfff85020

/*
 * IEN and IST register bits
 * See ``Programming System Control and I/O Registers: AViiON 4600 and
 * 530 series'', section 3 (Interrupts).
 */

#define	AV530_IRQ_RESERVED	0x0020aa00	/* all reserved bits */
#define AV530_IRQ_ABORT		0x80000000	/* 31 - Abort */
#define AV530_IRQ_ACF		0x40000000	/* 30 - AC Fail */
#define AV530_IRQ_ARBTO		0x20000000	/* 29 - VME Arbiter Timeout */
#define	AV530_IRQ_DTI		0x10000000	/* 28 - DUART Timer Interrupt */
#define AV530_IRQ_SWI7		0x08000000	/* 27 - SW Interrupt level 7 */
#define AV530_IRQ_SWI6		0x04000000	/* 26 - SW Interrupt level 6 */
#define AV530_IRQ_SWI5		0x02000000	/* 25 - SW Interrupt level 5 */
#define AV530_IRQ_SWI4		0x01000000	/* 24 - SW Interrupt level 4 */
#define AV530_IRQ_VME7		0x00800000	/* 23 - VMEBus level 7 */
#define AV530_IRQ_KBD		0x00400000	/* 22 - Keyboard */
#define AV530_IRQ_SF		0x00100000	/* 20 - System Failure */
#define AV530_IRQ_VME6		0x00080000	/* 19 - VMEBus level 6 */
#define AV530_IRQ_MEM		0x00040000	/* 18 - Memory Error */
#define AV530_IRQ_DI		0x00020000	/* 17 - DUART */
#define AV530_IRQ_SIGHPI	0x00010000	/* 16 - SIGHPI */
#define AV530_IRQ_VME5		0x00004000	/* 14 - VMEBus level 5 */
#define AV530_IRQ_VME4		0x00001000	/* 12 - VMEBus level 4 */
#define AV530_IRQ_VME3		0x00000400	/* 10 - VMEBus level 3 */
#define	AV530_IRQ_LMI		0x00000100	/* 08 - Location Monitor */
#define	AV530_IRQ_SIGLPI	0x00000080	/* 07 - SIGLPI */
#define AV530_IRQ_VME2		0x00000040	/* 06 - VMEBus level 2 */
#define AV530_IRQ_VME1		0x00000010	/* 04 - VMEBus level 1 */
#define AV530_IRQ_SWI3		0x00000008	/* 03 - SW Interrupt level 3 */
#define AV530_IRQ_SWI2		0x00000004	/* 02 - SW Interrupt level 2 */
#define AV530_IRQ_SWI1		0x00000002	/* 01 - SW Interrupt level 1 */
#define AV530_IRQ_SWI0		0x00000001	/* 00 - SW Interrupt level 0 */

#define AV530_IST_STRING	"\20" \
	"\40ABRT\37ACF\36ARBTO\35DTI\34SWI7\33SWI6\32SWI5\31SWI4" \
	"\30IRQ7\27KBD\25SF\24IRQ6\23MEM\22DI\21SIGHPI" \
	"\17IRQ5\15IRQ4\13IRQ3\11LMI" \
	"\10SIGLPI\7IRQ2\5IRQ1\4SWI3\3SWI2\2SWI1\1SWI0"

/*
 * Software interrupts 0 to 3, and 4 to 7, are used to deliver IPIs to
 * CPU0-3. We use two software interrupts per CPU because we want clock
 * IPIs to be maskable.
 */
#define	AV530_CLOCK_IPI_MASK	(AV530_IRQ_SWI7 | AV530_IRQ_SWI6 | \
				 AV530_IRQ_SWI5 | AV530_IRQ_SWI4)
#define	AV530_IPI_MASK		(AV530_IRQ_SWI3 | AV530_IRQ_SWI2 | \
				 AV530_IRQ_SWI1 | AV530_IRQ_SWI0)
/* values for SETSWI and CLRSWI registers */
#define	AV530_SWI_IPI_BIT(cpu)		(0x01 << (cpu))
#define	AV530_SWI_CLOCK_IPI_BIT(cpu)	(0x10 << (cpu))
/* values for IEN and IST registers */
#define	AV530_SWI_IPI_MASK(cpu)		(AV530_IRQ_SWI0 << (cpu))
#define	AV530_SWI_CLOCK_IPI_MASK(cpu)	(AV530_IRQ_SWI4 << (cpu))

/*
 * Extended interrupts
 */

#define	AV_EXIEN_BASE	0xfff8e000
#define	AV_EXIEN0	0xfff8e004
#define	AV_EXIEN1	0xfff8e008
#define	AV_EXIEN2	0xfff8e010
#define	AV_EXIEN3	0xfff8e020
#define	AV_EXIENALL	0xfff8e03c
#define	AV_EXIEN(cpu)	(AV_EXIEN_BASE + (4 << (cpu)))

#define	AV_EXIST	0xfff8e040

/*
 * EXIEN and EXIST register bits
 * See ``Programming System Control and I/O Registers: AViiON 4600 and
 * 530 series'', section 3 (Interrupts).
 */

#define	AV530_EXIRQ_RESERVED	0x04000e9f	/* all reserved bits */
#define AV530_EXIRQ_RTCOF	0x80000000	/* 31 - RTC Overflow */
#define AV530_EXIRQ_PIT3OF	0x40000000	/* 30 - PIT 3 Overflow */
#define AV530_EXIRQ_PIT2OF	0x20000000	/* 29 - PIT 2 Overflow */
#define AV530_EXIRQ_PIT1OF	0x10000000	/* 28 - PIT 1 Overflow */
#define AV530_EXIRQ_PIT0OF	0x08000000	/* 27 - PIT 0 Overflow */
#define	AV530_EXIRQ_DMA4C	0x02000000	/* 25 - DMA4 Channel Complete */
#define	AV530_EXIRQ_DMA3C	0x01000000	/* 24 - DMA3 Channel Complete */
#define	AV530_EXIRQ_DMA2C	0x00800000	/* 23 - DMA2 Channel Complete */
#define	AV530_EXIRQ_DMA1C	0x00400000	/* 22 - DMA1 Channel Complete */
#define	AV530_EXIRQ_DMA0C	0x00200000	/* 21 - DMA0 Channel Complete */
#define	AV530_EXIRQ_SCC		0x00100000	/* 20 - SCC */
#define	AV530_EXIRQ_LAN0	0x00080000	/* 19 - Ethernet 0 */
#define	AV530_EXIRQ_LAN1	0x00040000	/* 18 - Ethernet 1 */
#define	AV530_EXIRQ_SCSI0	0x00020000	/* 17 - SCSI0 */
#define	AV530_EXIRQ_SCSI1	0x00010000	/* 16 - SCSI1 */
#define	AV530_EXIRQ_VIDEO	0x00008000	/* 15 - Video */
#define	AV530_EXIRQ_ZBUF	0x00004000	/* 14 - Z Buffer */
#define	AV530_EXIRQ_DUART2	0x00002000	/* 13 - DUART2 */
#define	AV530_EXIRQ_VDMA	0x00001000	/* 12 - VDMA */
#define	AV530_EXIRQ_IOEXP1	0x00000100	/* 8 - IO Expansion 1 */
#define	AV530_EXIRQ_IOEXP2	0x00000040	/* 6 - IO Expansion 2 */
#define	AV530_EXIRQ_PDMA	0x00000020	/* 5 - Parallel Printer DMA */

#define AV530_EXIST_STRING	"\20" \
	"\40RTCOF\37PIT3OF\36PIT2OF\35PIT1OF\34PIT0OF\32DMA4\31DMA3" \
	"\30DMA2\27DMA1\26DMA0\25SCC\24LAN0\23LAN1\22SCSI0\21SCSI1" \
	"\20VIDEO\17ZBUF\16DUART2\15VDMA\11IOEXP1" \
	"\7IOEXP2\6PDMA"

/*
 * Miscellaneous registers
 */

#define	AV530_SRST		0xfff83100	/* software reset */
#define	SRST_KBD			0x08
#define	SRST_DUART2			0x02
#define	SRST_DUART1			0x01
#define	AV530_IOBRDID0		0xfffcf000	/* byte access */
#define	AV530_IOBRDID1		0xfffcf004	/* byte access */
#define	AV530_CONFIG		0xfff8fffc

#define	AV530_IOFUSE0		0xfffb0040	/* byte access */
#define	AV530_IOFUSE1		0xfffb00c0	/* byte access */
#define	AV530_IOFUSE_LAN		0x02
#define	AV530_IOFUSE_SCSI		0x01

/*
 * PIT and RTC
 */

#define	AV530_PIT0_CNT		0xfff8f004
#define	AV530_PIT1_CNT		0xfff8f008
#define	AV530_PIT2_CNT		0xfff8f010
#define	AV530_PIT3_CNT		0xfff8f020
#define	AV530_PIT0_CS		0xfff8f044
#define	AV530_PIT1_CS		0xfff8f048
#define	AV530_PIT2_CS		0xfff8f050
#define	AV530_PIT3_CS		0xfff8f060
#define	AV530_PIT_CMD_ALL	0xfff8f07c
#define	AV530_PIT_CTEN			0x00000008
#define	AV530_PIT_TEST			0x00000004
#define	AV530_PIT_IACK			0x00000002
#define	AV530_PIT_RESET			0x00000001

#define	AV530_RTC_CNT		0xfff8f084
#define	AV530_RTC_CS		0xfff8f088
#define	AV530_RTC_IACK			0x00000002
#define	AV530_RTC_RESET			0x00000001

/*
 * Onboard device addresses
 */

#define	AV530_SCSI1	0xfffb0000
#define	AV530_SCSI2	0xfffb0080
#define	AV530_LAN1	0xfffb0100
#define	AV530_LAN2	0xfffb0140

/*
 * CMMU addresses
 */

#define AV530_CMMU_D0	0xfff00000
#define AV530_CMMU_I0	0xfff01000
#define AV530_CMMU_D1	0xfff02000
#define AV530_CMMU_I1	0xfff03000

#define AV530_CMMU6_D0	0xfff00000
#define AV530_CMMU6_D1	0xfff01000
#define AV530_CMMU6_I0	0xfff04000
#define AV530_CMMU6_I1	0xfff05000
#define AV530_CMMU6_I2	0xfff06000
#define AV530_CMMU6_I3	0xfff07000
#define AV530_CMMU6_D2	0xfff08000
#define AV530_CMMU6_D3	0xfff09000
#define AV530_CMMU6_I4	0xfff0c000
#define AV530_CMMU6_I5	0xfff0d000
#define AV530_CMMU6_I6	0xfff0e000
#define AV530_CMMU6_I7	0xfff0f000

#endif	/* _MACHINE_AV530_H_ */

license: unknown


code:
/*	$OpenBSD: avcommon.h,v 1.6 2011/03/23 16:54:34 pirofti Exp $	*/
/*
 * Copyright (c) 1999 Steve Murphree, Jr.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Steve Murphree, Jr.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
/*
 * Mach Operating System
 * Copyright (c) 1991 Carnegie Mellon University
 * Copyright (c) 1991 OMRON Corporation
 * All Rights Reserved.
 *
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 */

#ifndef	_MACHINE_AVCOMMON_H_
#define	_MACHINE_AVCOMMON_H_

/*
 * Common declarations for hardware level device registers and such,
 * for 88100-based designs.
 */

/* per-processor interrupt enable registers */
#define	AV_IEN_BASE	0xfff84000
#define	AV_IEN0		0xfff84004	/* interrupt enable CPU 0 */
#define	AV_IEN1		0xfff84008	/* interrupt enable CPU 1 */
#define	AV_IEN2		0xfff84010	/* interrupt enable CPU 2 */
#define	AV_IEN3		0xfff84020	/* interrupt enable CPU 3 */
#define	AV_IENALL	0xfff8403c	/* simultaneous write */
#define	AV_IEN(cpu)	(AV_IEN_BASE + (4 << (cpu)))

#define	AV_IST		0xfff84040 	/* interrupt status register */

#define	AV_ISTATE	0xfff84088 	/* HW interrupt status */
#define	AV_CLRINT	0xfff8408c 	/* reset HW interrupt */

#define	AV_GCSR		0xfff86000	/* global control and status reg */
#define AV_GLOBAL0	0xfff86001	/* global control and status regs */
#define AV_GLOBAL1	0xfff86003
#define	AV_LRST			0x80
#define	AV_SYSCON		0x40
#define AV_BRDID	0xfff86005
#define AV_CGCSR0	0xfff86007
#define AV_CGCSR1	0xfff86009
#define AV_CGCSR2	0xfff8600b
#define AV_CGCSR3	0xfff8600d
#define AV_CGCSR4	0xfff8600f
#define	AV_UCSR		0xfff87000	/* utility control and status reg */
#define	AV_BASAD	0xfff87004	/* base address reg */
#define	AV_GLBRES	0xfff8700c	/* global reset reg */

#define	AV_CCSR		0xfff88000	/* CPU board control status reg */
#define	AV_ERROR	0xfff88004	/* Mbus fault reg */
#define	AV_PCNFA	0xfff88008	/* Pbus A decoder reg */
#define	AV_PCNFB	0xfff8800c	/* Pbus B decoder reg */
#define	AV_EXTAD	0xfff88010	/* A24 master A24-A31 addr reg */
#define	AV_EXTAM	0xfff88014	/* AM3-AM0 addr modifiers reg */
#define	AV_WHOAMI	0xfff88018	/* whoami reg */
#define	AV_WMAD		0xfff88020	/* write mbus addr decoder reg */
#define	AV_RMAD		0xfff88024	/* read mbus addr decoder reg */
#define	AV_WVAD		0xfff88028	/* write vmebus addr decoder reg */
#define	AV_RVAD		0xfff8802c	/* read vmebus adds decoder reg */

/*
 * ISTATE and CLRINT register bits
 */

#define ISTATE_ABORT		0x04
#define	ISTATE_ACFAIL		0x02
#define	ISTATE_SYSFAIL		0x01

/*
 * UCSR register bits
 */

#define UCSR_PWRUPBIT 	0x00004000	/* powerup indicator */
#define UCSR_DRVSFBIT 	0x00002000	/* Board system fail */
#define UCSR_BRIRQBIT 	0x00001000	/* drives VME IRQ1 broadcast int */
#define UCSR_ROBINBIT 	0x00000800	/* sel round robin VME arbiter mode */
#define UCSR_BRLVBITS 	0x00000600	/* VME bus request level 0-3 */
#define UCSR_RNEVERBIT  0x00000100	/* VME bus never release once req'd */
#define UCSR_RONRBIT	0x00000080	/* VME bus req release on no request */
#define UCSR_RWDBIT	0x00000040	/* VME bus request release when done */
#define UCSR_EARBTOBIT  0x00000020	/* enable VME arbiter bus timeout */
#define VTOSELBITS	0x00000018	/* VMEbus timeout select bits */
#define VTO32US			0x00	/* 32 usec */
#define VTO64US			0x01	/* 64 usec */
#define VTO128US		0x10	/* 128 usec */
#define VTODISABLE		0x18	/* disabled */

/* Z8536 counter/timer register (not found on all models) */
#define CIO_BASE		0xfff83000
#define CIO_PORTC		0xfff83000
#define CIO_PORTB		0xfff83004
#define CIO_PORTA		0xfff83008
#define CIO_CTRL		0xfff8300c

#define CONSOLE_DART_BASE	0xfff82000

#if defined(_KERNEL) && !defined(_LOCORE)

#include <machine/intr.h>

/*
 * Interrupt masks, one per IPL level.
 */
extern u_int32_t int_mask_val[NIPLS];
extern u_int32_t ext_int_mask_val[NIPLS];

#endif

#endif	/* _MACHINE_AVCOMMON_H_ */


code:
/*	$OpenBSD: board.h,v 1.14 2013/10/23 10:07:14 miod Exp $	*/
/*
 * Copyright (c) 2006, 2007, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef	_MACHINE_BOARD_H_
#define	_MACHINE_BOARD_H_

#if !defined(_LOCORE)

/*
 * cpuid values
 */

#define	AVIION_300_310		0x7904	/* mono Maverick */
#define	AVIION_5100_6100	0x7906	/* 20MHz Topgun */
#define	AVIION_400_4000		0x7908	/* 16MHz Mav+ */
#define	AVIION_410_4100		0x790c	/* 20MHz Mav+ */
#define	AVIION_300C_310C	0x7910	/* color Maverick */
#define	AVIION_5200_6200	0x7912	/* 25MHz Topgun */
#define	AVIION_5240_6240	0x7918	/* 25MHz Shotgun */
#define	AVIION_300CD_310CD	0x7920	/* dual duart color Maverick */
#define	AVIION_300D_310D	0x7924	/* dual duart mono Maverick */
#define	AVIION_4600_530		0x7930	/* Rolling Rock */
#define	AVIION_4300_25		0x7932	/* 25MHz Terra */
#define	AVIION_4300_20		0x7934	/* 20MHz Terra */
#define	AVIION_4300_16		0x7936	/* 16MHz Terra */
#define	AVIION_5255_6255	0x7942	/* 25MHz Tophat */
#define	AVIION_350		0x7944	/* KME */
#define	AVIION_6280		0x7946	/* High Noon */
#define	AVIION_8500_9500	0x794a	/* Odyssey */
#define	AVIION_9500_HA		0x794c	/* Oz */
#define	AVIION_500		0x794e	/* Robin Hood */
#define	AVIION_5500		0x7950	/* Schooner */
#define	AVIION_450		0x7958	/* Inner Tube */
#define	AVIION_8500_9500_45_1MB	0x795a	/* 45MHz Iliad (1MB L2) */
#define	AVIION_10000		0x7960	/* Sierra */
#define	AVIION_10000_QT		0x7962	/* Sierra QT */
#define	AVIION_5500PLUS		0x7964	/* Schooner+ */
#define	AVIION_450PLUS		0x7966	/* Inner Tube+ */
#define	AVIION_8500_9500_50_1MB	0x7968	/* 50MHz Iliad (1MB L2) */
#define	AVIION_8500_9500_50_2MB	0x796a	/* 50MHz Iliad (2MB L2) */

/* did the following ever hit the market? */
#define	AVIION_UNKNOWN1		0x7926	/* mono Montezuma */
#define	AVIION_UNKNOWN2		0x7928	/* color Montezuma */
#define	AVIION_UNKNOWN3		0x7956	/* Flintstone */
#define	AVIION_UNKNOWN1_DIS	0xfff0	/* mono disabled Montezuma */
#define	AVIION_UNKNOWN2_DIS	0xfff1	/* color disabled Montezuma */

extern int32_t cpuid;

struct pmap_table;
struct vme_range;

struct board {
	u_int		(*bootstrap)(void);
	vaddr_t		(*memsize)(void);
	void		(*startup)(void);
	paddr_t		(*get_boot_device)(uint32_t *, u_int);

	void		(*intr)(struct trapframe *);
	void		(*init_clocks)(void);
	u_int		(*getipl)(void);
	u_int		(*setipl)(u_int);
	u_int		(*raiseipl)(u_int);
#ifdef	MULTIPROCESSOR
	void		(*send_ipi)(int, cpuid_t);
	void		(*smp_setup)(struct cpu_info *);
#endif

	u_int32_t	(*intsrc)(int);
	u_int32_t	(*exintsrc)(int);
	const struct vme_range *(*get_vme_ranges)(void);

	const struct pmap_table *ptable;
};

#define	md_interrupt_func(f)	platform->intr(f)

#define	DECLARE_BOARD(b) \
extern const struct board board_av##b; \
u_int	av##b##_bootstrap(void); \
vaddr_t	av##b##_memsize(void); \
void	av##b##_startup(void); \
paddr_t	av##b##_get_boot_device(uint32_t *, u_int); \
void	av##b##_intr(struct trapframe *); \
void	av##b##_init_clocks(void); \
u_int	av##b##_getipl(void); \
u_int	av##b##_setipl(u_int); \
u_int	av##b##_raiseipl(u_int); \
void	av##b##_send_ipi(int, cpuid_t); \
void	av##b##_smp_setup(struct cpu_info *); \
u_int32_t av##b##_intsrc(int); \
u_int32_t av##b##_exintsrc(int); \
const struct vme_range *av##b##_get_vme_ranges(void);

DECLARE_BOARD(400);
DECLARE_BOARD(530);
DECLARE_BOARD(5000);
DECLARE_BOARD(6280);

extern const struct board *platform;/* just to have people confuse both names */

/*
 * Logical values for interrupt sources.
 * When adding new sources, keep INTSRC_VME as the last item - syscon
 * depends on this.
 */

#define	INTSRC_ABORT		1	/* abort button */
#define	INTSRC_ACFAIL		2	/* AC failure */
#define	INTSRC_SYSFAIL		3	/* system failure */
#define	INTSRC_CLOCK		4	/* clock chip */
#define	INTSRC_DUART1		5	/* console MC68692 */
#define	INTSRC_DUART2		6	/* secondary MC68692 */
#define	INTSRC_ETHERNET1	7	/* first on-board Ethernet */
#define	INTSRC_ETHERNET2	8	/* second on-board Ethernet */
#define	INTSRC_SCSI1		9	/* first on-board SCSI controller */
#define	INTSRC_SCSI2		10	/* second on-board SCSI controller */
#define	INTSRC_DMA		11	/* DMA completion interrupt */
#define	NINTSRC_SYSCON		12	/* total number of non-VME sources */
#define	INTSRC_VME(lvl)	(NINTSRC_SYSCON + (lvl) - 1)	/* seven VME levels */

#define	IS_VME_INTSRC(intsrc)		((intsrc) >= NINTSRC_SYSCON)
#define	VME_INTSRC_LEVEL(intsrc)	((intsrc) - NINTSRC_SYSCON + 1)

void	intsrc_enable(u_int, int);
void	intsrc_disable(u_int);

void cio_init_clocks(void);
void rtc_init_clocks(void);

#endif	/* _LOCORE */
#endif	/* _MACHINE_BOARD_H_ */


code:
/*	$OpenBSD: bus.h,v 1.5 2011/09/27 20:47:30 miod Exp $	*/

/*
 * Copyright (c) 2003-2004 Opsycon AB Sweden.  All rights reserved.
 * Copyright (c) 2004, Miodrag Vallat.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_BUS_H_
#define _MACHINE_BUS_H_

#include <machine/asm_macro.h>

#ifdef __STDC__
#define CAT(a,b)	a##b
#define CAT3(a,b,c)	a##b##c
#else
#define CAT(a,b)	a/**/b
#define CAT3(a,b,c)	a/**/b/**/c
#endif

/*
 * bus_space implementation
 */

typedef u_long bus_addr_t;
typedef u_long bus_size_t;

struct aviion_bus_space_tag;
typedef const struct aviion_bus_space_tag *bus_space_tag_t;
typedef u_long bus_space_handle_t;

struct aviion_bus_space_tag {
	int		(*_space_map)(bus_space_tag_t, bus_addr_t,
			  bus_size_t, int, bus_space_handle_t *);
	void		(*_space_unmap)(bus_space_tag_t, bus_space_handle_t,
			  bus_size_t);
	int		(*_space_subregion)(bus_space_tag_t, bus_space_handle_t,
			  bus_size_t, bus_size_t, bus_space_handle_t *);
	void *		(*_space_vaddr)(bus_space_tag_t, bus_space_handle_t);
	/* alloc, free not implemented yet */

	u_int8_t	(*_space_read_1)(bus_space_tag_t , bus_space_handle_t,
			  bus_size_t);
	void		(*_space_write_1)(bus_space_tag_t , bus_space_handle_t,
			  bus_size_t, u_int8_t);
	u_int16_t	(*_space_read_2)(bus_space_tag_t , bus_space_handle_t,
			  bus_size_t);
	void		(*_space_write_2)(bus_space_tag_t , bus_space_handle_t,
			  bus_size_t, u_int16_t);
	u_int32_t	(*_space_read_4)(bus_space_tag_t , bus_space_handle_t,
			  bus_size_t);
	void		(*_space_write_4)(bus_space_tag_t , bus_space_handle_t,
			  bus_size_t, u_int32_t);
	void		(*_space_read_raw_2)(bus_space_tag_t, bus_space_handle_t,
			  bus_addr_t, u_int8_t *, bus_size_t);
	void		(*_space_write_raw_2)(bus_space_tag_t, bus_space_handle_t,
			  bus_addr_t, const u_int8_t *, bus_size_t);
	void		(*_space_read_raw_4)(bus_space_tag_t, bus_space_handle_t,
			  bus_addr_t, u_int8_t *, bus_size_t);
	void		(*_space_write_raw_4)(bus_space_tag_t, bus_space_handle_t,
			  bus_addr_t, const u_int8_t *, bus_size_t);
};

#define	bus_space_read_1(t, h, o) (*(t)->_space_read_1)((t), (h), (o))
#define	bus_space_read_2(t, h, o) (*(t)->_space_read_2)((t), (h), (o))
#define	bus_space_read_4(t, h, o) (*(t)->_space_read_4)((t), (h), (o))

#define	bus_space_write_1(t, h, o, v) (*(t)->_space_write_1)((t), (h), (o), (v))
#define	bus_space_write_2(t, h, o, v) (*(t)->_space_write_2)((t), (h), (o), (v))
#define	bus_space_write_4(t, h, o, v) (*(t)->_space_write_4)((t), (h), (o), (v))

#define	bus_space_read_raw_multi_2(t, h, a, b, l) \
	(*(t)->_space_read_raw_2)((t), (h), (a), (b), (l))
#define	bus_space_read_raw_multi_4(t, h, a, b, l) \
	(*(t)->_space_read_raw_4)((t), (h), (a), (b), (l))

#define	bus_space_write_raw_multi_2(t, h, a, b, l) \
	(*(t)->_space_write_raw_2)((t), (h), (a), (b), (l))
#define	bus_space_write_raw_multi_4(t, h, a, b, l) \
	(*(t)->_space_write_raw_4)((t), (h), (a), (b), (l))

#define	bus_space_map(t, o, s, c, p) \
    (*(t)->_space_map)((t), (o), (s), (c), (p))
#define	bus_space_unmap(t, h, s) \
    (*(t)->_space_unmap)((t), (h), (s))
#define	bus_space_subregion(t, h, o, s, p) \
    (*(t)->_space_subregion)((t), (h), (o), (s), (p))

#define	BUS_SPACE_MAP_CACHEABLE		0x01
#define	BUS_SPACE_MAP_LINEAR		0x02
#define	BUS_SPACE_MAP_PREFETCHABLE	0x04

#define	bus_space_vaddr(t, h)	(*(t)->_space_vaddr)((t), (h))

/*----------------------------------------------------------------------------*/
#define bus_space_read_multi(n,m)					      \
static __inline void							      \
CAT(bus_space_read_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,     \
     bus_size_t o, CAT3(u_int,m,_t) *x, size_t cnt)			      \
{									      \
	while (cnt--)							      \
		*x++ = CAT(bus_space_read_,n)(bst, bsh, o);		      \
}

bus_space_read_multi(1,8)
bus_space_read_multi(2,16)
bus_space_read_multi(4,32)

/*----------------------------------------------------------------------------*/
#define bus_space_read_region(n,m)					      \
static __inline void							      \
CAT(bus_space_read_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,    \
     bus_addr_t ba, CAT3(u_int,m,_t) *x, size_t cnt)			      \
{									      \
	while (cnt--)							      \
		*x++ = CAT(bus_space_read_,n)(bst, bsh, ba++);		      \
}

bus_space_read_region(1,8)
bus_space_read_region(2,16)
bus_space_read_region(4,32)

/*----------------------------------------------------------------------------*/
#define bus_space_read_raw_region(n,m)					      \
static __inline void							      \
CAT(bus_space_read_raw_region_,n)(bus_space_tag_t bst,			      \
     bus_space_handle_t bsh,						      \
     bus_addr_t ba, u_int8_t *x, size_t cnt)				      \
{									      \
	cnt >>= ((n) >> 1);						      \
	while (cnt--) {							      \
		CAT(bus_space_read_raw_multi_,n)(bst, bsh, ba, x, (n));	      \
		ba += (n);						      \
		x += (n);						      \
	}								      \
}

bus_space_read_raw_region(2,16)
bus_space_read_raw_region(4,32)

/*----------------------------------------------------------------------------*/
#define bus_space_write_multi(n,m)					      \
static __inline void							      \
CAT(bus_space_write_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,    \
     bus_size_t o, const CAT3(u_int,m,_t) *x, size_t cnt)		      \
{									      \
	while (cnt--) {							      \
		CAT(bus_space_write_,n)(bst, bsh, o, *x++);		      \
	}								      \
}

bus_space_write_multi(1,8)
bus_space_write_multi(2,16)
bus_space_write_multi(4,32)

/*----------------------------------------------------------------------------*/
#define bus_space_write_region(n,m)					      \
static __inline void							      \
CAT(bus_space_write_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,   \
     bus_addr_t ba, const CAT3(u_int,m,_t) *x, size_t cnt)		      \
{									      \
	while (cnt--) {							      \
		CAT(bus_space_write_,n)(bst, bsh, ba, *x++);		      \
		ba += sizeof(x);					      \
	}								      \
}

bus_space_write_region(1,8)
bus_space_write_region(2,16)
bus_space_write_region(4,32)

/*----------------------------------------------------------------------------*/
#define bus_space_write_raw_region(n,m)					      \
static __inline void							      \
CAT(bus_space_write_raw_region_,n)(bus_space_tag_t bst,			      \
     bus_space_handle_t bsh,						      \
     bus_addr_t ba, const u_int8_t *x, size_t cnt)		              \
{									      \
	cnt >>= ((n) >> 1);						      \
	while (cnt--) {							      \
		CAT(bus_space_write_raw_multi_,n)(bst, bsh, ba, x, (n));      \
		ba += (n);						      \
		x += (n);						      \
	}								      \
}

bus_space_write_raw_region(2,16)
bus_space_write_raw_region(4,32)

/*----------------------------------------------------------------------------*/
#define bus_space_set_region(n,m)					      \
static __inline void							      \
CAT(bus_space_set_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,     \
     bus_addr_t ba, CAT3(u_int,m,_t) x, size_t cnt)			      \
{									      \
	while (cnt--) {							      \
		CAT(bus_space_write_,n)(bst, bsh, ba, x);		      \
		ba += sizeof(x);					      \
	}								      \
}

bus_space_set_region(1,8)
bus_space_set_region(2,16)
bus_space_set_region(4,32)

/*----------------------------------------------------------------------------*/
#define bus_space_copy(n)					      	      \
static __inline void							      \
CAT(bus_space_copy_,n)(bus_space_tag_t bst, bus_space_handle_t bsh1,	      \
     bus_size_t o1, bus_space_handle_t bsh2, bus_size_t o2, bus_size_t cnt)   \
{									      \
	while (cnt--) {							      \
		CAT(bus_space_write_,n)(bst, bsh2, o2,			      \
		    CAT(bus_space_read_,n)(bst, bsh1, o1));		      \
		o1 += (n);						      \
		o2 += (n);						      \
	}								      \
}

bus_space_copy(1)
bus_space_copy(2)
bus_space_copy(4)

uint8_t generic_space_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
uint16_t generic_space_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
uint32_t generic_space_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
void	generic_space_read_raw_2(bus_space_tag_t, bus_space_handle_t,
	    bus_addr_t, uint8_t *, bus_size_t);
void	generic_space_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
	    uint8_t);
void	generic_space_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
	    uint16_t);
void	generic_space_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
	    uint32_t);
void	generic_space_write_raw_2(bus_space_tag_t, bus_space_handle_t,
	    bus_addr_t, const uint8_t *, bus_size_t);
void	generic_space_read_raw_4(bus_space_tag_t, bus_space_handle_t,
	    bus_addr_t, uint8_t *, bus_size_t);
void	generic_space_write_raw_4(bus_space_tag_t, bus_space_handle_t,
	    bus_addr_t, const uint8_t *, bus_size_t);

/*----------------------------------------------------------------------------*/
/*
 * Bus read/write barrier methods.
 *
 *	void bus_space_barrier(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset,
 *	    bus_size_t len, int flags);
 *
 */
static inline void
bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,
    bus_size_t length, int flags)
{
	flush_pipeline();
}

#define BUS_SPACE_BARRIER_READ  0x01		/* force read barrier */
#define BUS_SPACE_BARRIER_WRITE 0x02		/* force write barrier */

/*
 * bus_dma implementation
 */

#define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
#define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
#define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
#define	BUS_DMA_COHERENT	0x004	/* hint: map memory DMA coherent */
#define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
#define	BUS_DMA_BUS2		0x020
#define	BUS_DMA_BUS3		0x040
#define	BUS_DMA_BUS4		0x080
#define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
#define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
#define	BUS_DMA_STREAMING	0x400	/* hint: sequential, unidirectional */
#define	BUS_DMA_ZERO		0x800	/* zero memory in dmamem_alloc */

#define BUS_DMASYNC_PREREAD	0x01
#define BUS_DMASYNC_POSTREAD	0x02
#define BUS_DMASYNC_PREWRITE	0x04
#define BUS_DMASYNC_POSTWRITE	0x08

typedef	u_int32_t	bus_dma_tag_t;	/* ignored, really */

/*
 *	bus_dma_segment_t
 *
 *	Describes a single contiguous DMA transaction.  Values
 *	are suitable for programming into DMA registers.
 */
struct m88k_bus_dma_segment {
	bus_addr_t	ds_addr;	/* DMA address */
	bus_size_t	ds_len;		/* length of transfer */
};
typedef struct m88k_bus_dma_segment  bus_dma_segment_t;

/*
 *	bus_dmamap_t
 *
 *	Describes a DMA mapping.
 */
struct m88k_bus_dmamap {
	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
	int		_dm_segcnt;	/* number of segs this map can map */
	bus_size_t	_dm_maxsegsz;	/* largest possible segment */
	bus_size_t	_dm_boundary;	/* don't cross this */

	bus_size_t	dm_mapsize;	/* size of the mapping */
	int		dm_nsegs;	/* # valid segments in mapping */
	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
};
typedef struct m88k_bus_dmamap		*bus_dmamap_t;

struct mbuf;
struct proc;
struct uio;

int	bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
	    bus_size_t, int, bus_dmamap_t *);
void	bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
int	bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
	    bus_size_t, struct proc *, int);
int	bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
	    struct mbuf *, int);
int	bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
	    struct uio *, int);
int	bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, bus_dma_segment_t *,
	    int, bus_size_t, int);
void	bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
void	bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
	    bus_size_t, int);

int	bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
	    bus_size_t alignment, bus_size_t boundary,
	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
void	bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
	    int nsegs);
int	bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
	    int nsegs, size_t size, caddr_t *kvap, int flags);
void	bus_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva,
	    size_t size);
paddr_t bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
	    int nsegs, off_t off, int prot, int flags);

#endif	/* _MACHINE_BUS_H_ */


code:
/* $OpenBSD: cdefs.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */

#include <m88k/cdefs.h>


code:
/* $OpenBSD: cmmu.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */
#include <m88k/cmmu.h>


code:
/*	$OpenBSD: conf.h,v 1.1.1.1 2006/04/27 15:47:48 miod Exp $	*/
/*
 * Copyright (c) 2002, Miodrag Vallat.
 * All rights reserved.
 *
 * Permission to redistribute, use, copy, and modify this software
 * is hereby granted without fee, provided that the following
 * conditions are met:
 *
 * 1. This entire notice is included in all source code copies of any
 *    software which is or includes a copy or modification of this
 *    software.
 * 2. The name of the author may not be used to endorse or promote
 *    products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/conf.h>

#define	mmread	mmrw
#define	mmwrite	mmrw
cdev_decl(mm);

cdev_decl(nvram);

cdev_decl(vme);

cdev_decl(dart);


code:
/* $OpenBSD: cpu.h,v 1.4 2011/03/23 16:54:34 pirofti Exp $ */
/*
 * Copyright (c) 1996 Nivas Madhur
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */
#ifndef	_MACHINE_CPU_H_
#define	_MACHINE_CPU_H_

#include <m88k/cpu.h>

#ifdef _KERNEL

#include <sys/evcount.h>

/*
 * Generic interrupt handler structure. Handlers may be chained.
 */
struct intrhand {
	SLIST_ENTRY(intrhand) ih_link;
	int	(*ih_fn)(void *);
	void	*ih_arg;
	int	ih_ipl;
	int	ih_flags;
#define	INTR_WANTFRAME	0x01
#define	INTR_EXCLUSIVE	0x02
	struct evcount ih_count;
};
typedef SLIST_HEAD(, intrhand) intrhand_t;

void	doboot(void);
void	nmihand(void *);

#endif /* _KERNEL */

#endif


code:
/* $OpenBSD: db_machdep.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */
#include <m88k/db_machdep.h>

#ifdef DDB

void m88k_db_prom_cmd(db_expr_t, int, db_expr_t, char *);

#define	EXTRA_MACHDEP_COMMANDS \
	{ "prom",	m88k_db_prom_cmd,		0,	NULL },

#endif


code:
/*	$OpenBSD: disklabel.h,v 1.13 2013/09/29 12:17:59 miod Exp $	*/

/*
 * Copyright (c) 2010 Miodrag Vallat.
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef	_MACHINE_DISKLABEL_H_
#define	_MACHINE_DISKLABEL_H_

#define	LABELSECTOR	1		/* sector containing label */
#define	LABELOFFSET	0		/* offset of label in sector */
#define	MAXPARTITIONS	16		/* number of partitions */

/*
 * AViiON native disk identification
 */

#define	VDM_LABEL_SIGNATURE		0x1234abcd

#define	VDM_LABEL_SECTOR		0
#define	VDM_LABEL_OFFSET		0x1c8
#define	VDM_LABEL_OFFSET_ALT		0x1c0

struct vdm_label {
	uint32_t	signature;
	uint32_t	version;
	uint32_t	unused[2];
};

#define	VDM_LABEL_VERSION		0

struct vdm_boot_info {
	uint32_t	padding[6];
	uint32_t	signature;
	uint32_t	boot_start;
	uint32_t	boot_size;
	uint32_t	version;
};

#define	VDM_BOOT_INFO_VERSION		1
#define	VDM_BOOT_DEFAULT_SIZE		500

/*
 * MBR identification information is in <sys/disklabel.h>
 */

/* DG/UX VDM partition type (apparently not used on m88k AViiON) */
#define	DOSPTYP_DGUX_VDM		0xdf

/*
 * DG/UX VDM structures
 */

#define	VDIT_SECTOR			1

struct vdm_self_id {
	union {
		uint8_t			_kind;
		uint32_t		_blkno;
	} u;
	uint32_t			node_number;
} __packed;

#define	VDM_ID_KIND(id)			((id)->u._kind)
#define	VDM_BLKNO_MASK			0x00ffffff	/* low 24 bits */
#define	VDM_ID_BLKNO(id)		(((id)->u._blkno) & VDM_BLKNO_MASK)
#define	VDM_NO_NODE_NUMBER		012345670123
#define	VDM_NO_BLK_NUMBER		0xffffffff

#define	VDIT_BLOCK			0x12
#define	VDIT_PORTION_HEADER_BLOCK	0x13
#define	VDIT_BLOCK_HEAD_BE		0x14
#define	VDIT_BLOCK_HEAD_LE		0x18

struct vdit_block_header {
	struct vdm_self_id		id;
	uint32_t			nextblk;
	uint32_t			timestamp;
	uint32_t			secondary_vdit;
	uint16_t			chunksz;
	uint16_t			padding;
} __packed;

typedef uint32_t vdit_timestamp_t;
typedef uint32_t vdit_id_t;

struct vdit_entry_header {
	uint16_t			type;
	uint16_t			size;
	vdit_timestamp_t		timestamp;
} __packed;

#define	VDIT_ENTRY_SENTINEL		0x00
#define	VDIT_ENTRY_UNUSED		0x01
#define	VDIT_ENTRY_BOOT_INFO		0x02
#define	VDIT_ENTRY_SUBDRIVER_INFO	0x03
#define	VDIT_ENTRY_INSTANCE		0x04

#define	VDIT_NAME_MAX 0x20

struct vdit_instance_id {
	vdit_timestamp_t		generation_timestamp;
	vdit_id_t			system_id;
} __packed;

struct vdit_boot_info_entry {
	uint16_t			version;
	struct vdit_instance_id		default_swap;
	struct vdit_instance_id		default_root;
} __packed;

struct vdit_subdriver_entry {
	uint16_t			version;
	vdit_id_t			subdriver_id;
	char				name[VDIT_NAME_MAX];
} __packed;

#define	VDM_SUBDRIVER_VDMPHYS		"vdmphys"
#define	VDM_SUBDRIVER_VDMPART		"vdmpart"
#define	VDM_SUBDRIVER_VDMAGGR		"vdmaggr"
#define	VDM_SUBDRIVER_VDMREMAP		"vdmremap"

struct vdit_instance_entry {
	uint16_t			version;
	char				name[VDIT_NAME_MAX];
	vdit_id_t			subdriver_id;
	struct vdit_instance_id		instance_id;
	uint8_t				exported;
} __packed;

#define	VDM_INSTANCE_OPENBSD		"OpenBSD"

struct vdit_vdmphys_instance {
	struct vdit_instance_entry	instance;
	uint16_t			version;
	uint16_t			mode;
#define	VDMPHYS_MODE_READONLY	0x00
#define	VDMPHYS_MODE_READWRITE	0x01
} __packed;

struct vdit_vdmpart_instance {
	struct vdit_instance_entry	instance;
	uint16_t			version;
	struct vdit_instance_id		child_instance;
	uint32_t			start_blkno;
	uint32_t			size;
	struct vdit_instance_id		remap_instance;
} __packed;

struct vdit_vdmaggr_instance {
	struct vdit_instance_entry	instance;
	uint16_t			version;
	uint16_t			aggr_count;
	uint32_t			stripe_size;
	struct vdit_instance_id		pieces[0];
} __packed;

struct vdit_vdmremap_instance {
	struct vdit_instance_entry	instance;
	uint16_t			version;
	struct vdit_instance_id		primary_remap_table;
	struct vdit_instance_id		secondary_remap_table;
	struct vdit_instance_id		remap_area;
} __packed;

#endif	/* _MACHINE_DISKLABEL_H_ */


code:
/* $OpenBSD: endian.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */
#include <m88k/endian.h>


code:
/* $OpenBSD: exec.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */
#include <m88k/exec.h>


code:
/*	$OpenBSD: fenv.h,v 1.2 2013/06/01 21:20:54 jasper Exp $	*/
/* public domain */
#include <m88k/fenv.h>


code:
/* $OpenBSD: fpu.h,v 1.1 2007/12/08 18:39:49 miod Exp $ */
/* public domain */
#include <m88k/fpu.h>


code:
/* $OpenBSD: frame.h,v 1.3 2007/01/13 22:00:56 miod Exp $ */
/* public domain */
#include <m88k/frame.h>


code:
/* $OpenBSD: ieee.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */
#include <m88k/ieee.h>


code:
/* $OpenBSD: ieeefp.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */
#include <m88k/ieeefp.h>


code:
/*	$OpenBSD: intr.h,v 1.5 2013/06/16 14:49:49 kettenis Exp $	*/
/*
 * Copyright (C) 2000 Steve Murphree, Jr.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_INTR_H_
#define _MACHINE_INTR_H_

/*
 * IPL levels.
 * We use 6 as IPL_HIGH so that abort can be programmed at 7 so that
 * it is always possible to break into the system unless interrupts
 * are disabled.
 */

#define IPL_NONE	0
#define IPL_SOFTINT	1
#define IPL_BIO		2
#define IPL_NET		3
#define IPL_TTY		3
#define IPL_VM		3
#define IPL_CLOCK	5
#define IPL_STATCLOCK	5
#define	IPL_SCHED	5
#define IPL_HIGH	6
#define IPL_NMI		7
#define IPL_ABORT	7

#define	NIPLS		8

#define	IPL_MPSAFE	0	/* no "mpsafe" interrupts */

#include <m88k/intr.h>

#endif /* _MACHINE_INTR_H_ */


code:
/* $OpenBSD: kcore.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */
#include <m88k/kcore.h>


code:
/* $OpenBSD: limits.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */
#include <m88k/limits.h>


code:
/*	$OpenBSD: loadfile_machdep.h,v 1.1 2013/10/09 21:26:02 miod Exp $	*/

/*-
 * Copyright (c) 1999 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Christos Zoulas.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#define BOOT_ELF

#define LOAD_KERNEL		LOAD_ALL
#define COUNT_KERNEL		COUNT_ALL

#define LOADADDR(a)		(((u_long)(a)) + offset)
#define ALIGNENTRY(a)		((u_long)(a) & ~0x0fff)
#define READ(f, b, c)		read((f), (void *)LOADADDR(b), (c))
#define BCOPY(s, d, c)		memcpy((void *)LOADADDR(d), (void *)(s), (c))
#define BZERO(d, c)		memset((void *)LOADADDR(d), 0, (c))
#define	WARN(a)			(void)(printf a, \
				    printf((errno ? ": %s\n" : "\n"), \
				    strerror(errno)))
#define PROGRESS(a)		(void) printf a
#define ALLOC(a)		alloc(a)
#define FREE(a, b)		free(a, b)


code:
/* $OpenBSD: lock.h,v 1.1.1.1 2006/04/18 10:56:58 miod Exp $ */
/* public domain */
#include <m88k/lock.h>


code:
#ifndef	_MACHINE_M8820X_H_
#define	_MACHINE_M8820X_H_
/*	$OpenBSD: m8820x.h,v 1.3 2011/03/23 16:54:34 pirofti Exp $ */
/*
 * Copyright (c) 2004, Miodrag Vallat.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
/*
 * Mach Operating System
 * Copyright (c) 1993-1992 Carnegie Mellon University
 * All Rights Reserved.
 *
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 */

/*
 * Code features to enable
 */

#define	M88200_HAS_SPLIT_ADDRESS
#define	M88200_HAS_ASYMMETRICAL_ASSOCIATION

#include <m88k/m8820x.h>

#endif	/* _MACHINE_M8820X_H_ */


code:
/*	$OpenBSD: mioctl.h,v 1.1.1.1 2006/04/18 10:57:32 miod Exp $ */

/*
 * Copyright (c) 1995 Theo de Raadt
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#define MIOCGSIZ		_IOR('m', 1, int)


code:
/*	$OpenBSD: mplock.h,v 1.1 2007/12/02 21:20:15 miod Exp $	*/
/* public domain */
#include <m88k/mplock.h>


code:
/* $OpenBSD: mutex.h,v 1.1.1.1 2006/04/18 10:56:57 miod Exp $ */
/* public domain */
#include <m88k/mutex.h>


code:
/*	$OpenBSD: param.h,v 1.5 2013/11/02 23:06:18 miod Exp $ */

/*
 * Copyright (c) 1999 Steve Murphree, Jr.
 * Copyright (c) 1988 University of Utah.
 * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
 * All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * the Systems Programming Group of the University of Utah Computer
 * Science Department.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

#ifndef	_MACHINE_PARAM_H_
#define	_MACHINE_PARAM_H_

#define	_MACHINE	aviion
#define	MACHINE		"aviion"

#include <m88k/param.h>

#define	KERNBASE	0x00000000	/* start of kernel virtual */
#define	KERNTEXTOFF	0x00080000	/* start of kernel text */

#endif /* _MACHINE_PARAM_H_ */


code:
/* $OpenBSD: pmap.h,v 1.3 2010/12/31 21:38:08 miod Exp $ */
/* public domain */
#include <m88k/pmap.h>


code:
/* $OpenBSD: pmap_table.h,v 1.1.1.1 2006/04/18 10:56:57 miod Exp $ */
/* public domain */
#include <m88k/pmap_table.h>


code:
/* $OpenBSD: proc.h,v 1.1.1.1 2006/04/18 10:56:57 miod Exp $ */
/* public domain */
#include <m88k/proc.h>


code:
/* $OpenBSD: profile.h,v 1.1.1.1 2006/04/18 10:56:57 miod Exp $ */
/* public domain */
#include <m88k/profile.h>


code:
/*	$OpenBSD: prom.h,v 1.6 2013/10/10 21:24:59 miod Exp $	*/
/*
 * Copyright (c) 2006, Miodrag Vallat.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_PROM_H_
#define _MACHINE_PROM_H_

#include <sys/cdefs.h>

/* SCM trap vector */
#define	SCM_VECTOR		496

/* system calls */
#define	SCM_CHAR		0x00
#define	SCM_OCHAR		0x20
#define	SCM_PTLINE		0x21
#define	SCM_OCRLF		0x26
#define	SCM_HALT		0x63
#define	SCM_STDIO		0x70
#define	SCM_JPSTART		0x100
#define	SCM_REBOOT		0x101
#define	SCM_CPUID		0x102
#define	SCM_MSIZE		0x103
#define	SCM_REVNUM		0x104
#define	SCM_HOSTID		0x107
#define	SCM_INVALID		0x112
#define	SCM_COMMID		0x114

/* 88204 PROMs only system calls */
#define	SCM_SYSID		0x31
#define	SCM_CPUCONFIG		0x107

/* SCM_JPSTART return values */
#define	JPSTART_OK		0
#define	JPSTART_NO_JP		1
#define	JPSTART_SINGLE_JP	2
#define	JPSTART_NOT_IDLE	3
#define	JPSTART_NO_ANSWER	4

struct	scm_cpuconfig {
	u_int32_t	version;
#define	SCM_CPUCONFIG_VERSION	0
	u_int32_t	cpucount;	/* # of CPUs */
	u_int16_t	igang, dgang;	/* # of CMMUs per CPU */
	u_int32_t	isplit, dsplit;	/* CMMU split bits */
	u_int32_t	:32;
};

int	scm_cpuconfig(struct scm_cpuconfig *);
u_int	scm_cpuid(void);
int	scm_getc(void);
void	scm_getenaddr(u_char *);
__dead void scm_halt(void);
u_int	scm_jpstart(cpuid_t, vaddr_t);
u_int	scm_memsize(int);
void	scm_printf(const char *);
u_int	scm_promver(void);
void	scm_putc(int);
void	scm_putcrlf(void);
__dead void scm_reboot(const char *);
u_int	scm_sysid(void);

/*
 * SCM boot device names
 */

/* cied */
#define	SCM_CIEN	0x6369656e
/* cimd */
/* cird */
/* cisc */
#define	SCM_DGEN	0x6467656e
#define	SCM_DGSC	0x64677363
/* hada */
#define	SCM_HKEN	0x686b656e
#define	SCM_INEN	0x696e656e
#define	SCM_INSC	0x696e7363
#define	SCM_NCSC	0x6e637363
/* nvrd */
/* pefn */
/* vitr */

#endif /* _MACHINE_PROM_H_ */


code:
/* $OpenBSD: ptrace.h,v 1.1.1.1 2006/04/18 10:56:57 miod Exp $ */
/* public domain */
#include <m88k/ptrace.h>


code:
/* $OpenBSD: reloc.h,v 1.1 2013/01/05 11:20:55 miod Exp $ */
/* public domain */
#include <m88k/reloc.h>


code:
/* $OpenBSD: setjmp.h,v 1.1.1.1 2006/04/18 10:56:57 miod Exp $ */
/* public domain */
#include <m88k/setjmp.h>


code:
/* $OpenBSD: signal.h,v 1.1.1.1 2006/04/18 10:56:57 miod Exp $ */
/* public domain */
#include <m88k/signal.h>


code:
/* $OpenBSD: spinlock.h,v 1.1.1.1 2006/04/18 10:56:57 miod Exp $ */
/* public domain */
#include <m88k/spinlock.h>


code:
/* $OpenBSD: stdarg.h,v 1.1.1.1 2006/04/18 10:56:57 miod Exp $ */
/* public domain */
#include <m88k/stdarg.h>


code:
/*	$OpenBSD: tcb.h,v 1.2 2013/06/01 21:20:54 jasper Exp $	*/
/* public domain */
#include <m88k/tcb.h>


code:
/* $OpenBSD: trap.h,v 1.2 2006/05/20 12:04:54 miod Exp $ */
/* public domain */
#include <machine/board.h>	/* md_interrupt_func */
#include <m88k/trap.h>


code:
/* $OpenBSD: varargs.h,v 1.1.1.1 2006/04/18 10:56:56 miod Exp $ */
/* public domain */
#include <m88k/varargs.h>


code:
/* $OpenBSD: vmparam.h,v 1.2 2010/12/31 21:38:08 miod Exp $ */
/* public domain */
/*
 * Physical memory is mapped 1:1 at the bottom of the supervisor address
 * space. Kernel virtual memory space starts from the end of physical memory,
 * up to the on-board devices appearing all over the last 4MB of address space.
 */
#define VM_MIN_KERNEL_ADDRESS	((vaddr_t)0x00000000)
#define VM_MAX_KERNEL_ADDRESS	((vaddr_t)0xffc00000)

#include <m88k/vmparam.h>


code:
/Makefile/1.8/Thu Oct 17 16:30:07 2013//TOPENBSD_5_8_BASE
/Makefile.inc/1.4/Tue Oct  8 21:55:20 2013//TOPENBSD_5_8_BASE
D/a2coff////
D/boot////
D/installboot////
D/libprom////
D/libsa////
D/libz////
D/vdmtool////

path: sys/arch/aviion/stand/CVS/Entries


code: src/sys/arch/aviion/stand

path: sys/arch/aviion/stand/CVS/Repository


code:
#	$OpenBSD: Makefile,v 1.8 2013/10/17 16:30:07 miod Exp $

SUBDIR= a2coff installboot

.if ${MACHINE} == "aviion"
SUBDIR+=	libprom libsa libz
SUBDIR+=	boot
.endif

.include <bsd.subdir.mk>

path: sys/arch/aviion/stand/Makefile


code:
#	$OpenBSD: Makefile.inc,v 1.4 2013/10/08 21:55:20 miod Exp $

MDEC_DIR?=	/usr/mdec

CWARNFLAGS=	-Wall -Werror -fno-stack-protector

HOSTCFLAGS+=	${CWARNFLAGS}
CFLAGS+=	${CWARNFLAGS} -mmemcpy
CFLAGS+=	-fno-builtin-printf -fno-builtin-putchar -fno-builtin-vprintf

# Load addresses for bootstrap code
# This should work on 8MB machines, if each bootstrap code fits in 60KB
# (not 64!)
STAGE1_RELOC=0x7c0000
STAGE2_RELOC=0x7d0000


code:
#	$OpenBSD: Makefile,v 1.3 2013/10/08 21:49:40 miod Exp $

MAN=	a2coff.8
MANSUBDIR=aviion
.if ${MACHINE} == "aviion"
PROG=	a2coff
BINDIR=/usr/mdec
NOPIE=
HOSTCFLAGS?=	-O2 ${PIPE} ${DEBUG}
.else
NOPROG=
.endif

.include <bsd.prog.mk>
CFLAGS=	${HOSTCFLAGS}


code:
.\"	$OpenBSD: a2coff.8,v 1.5 2015/01/15 19:06:32 schwarze Exp $
.\"
.\" Copyright (c) 2006, Miodrag Vallat
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\"    notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\"    notice, this list of conditions and the following disclaimer in the
.\"    documentation and/or other materials provided with the distribution.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
.\" DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
.\" POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd $Mdocdate: January 15 2015 $
.Dt A2COFF 8 aviion
.Os
.Sh NAME
.Nm a2coff
.Nd convert standalone ELF binaries to 88KBCS COFF format
.Sh SYNOPSIS
.Nm a2coff
.Ar source
.Ar destination
.Sh DESCRIPTION
.Nm a2coff
converts standalone binaries, such as kernels or boot blocks, from
.Xr elf 5
format to COFF format, suitable for booting
from the Data General AViiON PROMs.
.Sh SEE ALSO
.Xr elf 5


code:
/*	$OpenBSD: a2coff.c,v 1.13 2014/07/12 19:01:49 tedu Exp $	*/
/*
 * Copyright (c) 2006, 2013, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Quick and dirty ELF to 88K BCS ECOFF converter. Will only work for
 * standalone binaries with no relocations, and will drop symbols.
 * Also, bss is merged into the data section to cope with PROMs which
 * do not zero-fill the bss upon loading (sad but true).
 *
 * This should really only be used to build a BSD/aviion bootloader.
 */

#include <unistd.h>
#include <stdlib.h>
#include <err.h>
#include <fcntl.h>
#include <stdio.h>
#include <string.h>
#include <sys/types.h>

#include <a.out.h>	/* ZMAGIC */
#define	ELFSIZE		32
#include <sys/exec_elf.h>

#define	MINIMAL_ALIGN	8
#define	ECOFF_ALIGN	0x200

/*
 * We can't use the standard ecoff defines, first, because the system
 * we are building this tool on might not have ecoff support at all (thus
 * no <machine/ecoff_machdep.h> file), second, because the common defines
 * do not know about the scnhdr changes for 88K BCS.
 * So we'll provide our own, working, definitions.
 */
struct ecoff_filehdr {
	u_short f_magic;	/* magic number */
	u_short f_nscns;	/* # of sections */
	u_int   f_timdat;	/* time and date stamp */
	u_long  f_symptr;	/* file offset of symbol table */
	u_int   f_nsyms;	/* # of symbol table entries */
	u_short f_opthdr;	/* sizeof the optional header */
	u_short f_flags;	/* flags??? */
};

struct ecoff_aouthdr {
	u_short magic;
	u_short vstamp;
#if 0
	ECOFF_PAD
#endif
	u_long  tsize;
	u_long  dsize;
	u_long  bsize;
	u_long  entry;
	u_long  text_start;
	u_long  data_start;
#if 0	/* not on m88k */
	u_long  bss_start;
	ECOFF_MACHDEP;
#endif
};

struct ecoff_scnhdr {		/* needed for size info */
	char	s_name[8];	/* name */
	u_long  s_paddr;	/* physical addr? for ROMing?*/
	u_long  s_vaddr;	/* virtual addr? */
	u_long  s_size;		/* size */
	u_long  s_scnptr;	/* file offset of raw data */
	u_long  s_relptr;	/* file offset of reloc data */
	u_long  s_lnnoptr;	/* file offset of line data */
#if 0
	u_short s_nreloc;	/* # of relocation entries */
	u_short s_nlnno;	/* # of line entries */
#else
	/* m88k specific changes */
	u_long  s_nreloc;
	union {
	 u_long _s_nlnno;
	 u_long _s_vendor;
	} _s_s;
#define	s_nlnno   _s_s._s_nlnno
#define	s_vendor _s_s._s_vendor
#endif
	u_long	s_flags;
};

struct ecoff_exechdr {
	struct ecoff_filehdr f;
	struct ecoff_aouthdr a;
};

#define	round(qty, pow2)	(((qty) + (pow2 - 1)) & ~(pow2 - 1UL))

void	convert_elf(const char *, int, int, Elf_Ehdr *);
void	copybits(int, int, u_int32_t);
void	usage(void);
void	zerobits(int, u_int32_t);

int
main(int argc, char *argv[])
{
	Elf_Ehdr head;
	int infd, outfd;
	int n;

	if (argc != 3)
		usage();

	infd = open(argv[1], O_RDONLY);
	if (infd < 0)
		err(1, argv[1]);

	n = read(infd, &head, sizeof(head));
	if (n < sizeof(head))
		err(1, "read");

	if (!IS_ELF(head))
		err(1, "%s: bad magic", argv[1]);

	outfd = open(argv[2], O_WRONLY | O_TRUNC | O_CREAT, 0644);
	if (outfd < 0)
		err(1, argv[2]);

	convert_elf(argv[1], infd, outfd, &head);

	close(infd);
	close(outfd);

	exit(0);
}

char buf[4096];
#define	min(a ,b)	((a) < (b) ? (a) : (b))

void
copybits(int from, int to, u_int32_t count)
{
	int chunk;

	while (count != 0) {
		chunk = min(count, sizeof buf);
		if (read(from, buf, chunk) != chunk)
			err(1, "read");
		if (write(to, buf, chunk) != chunk)
			err(1, "write");
		count -= chunk;
	}
}

void
zerobits(int to, u_int32_t count)
{
	int chunk;

	memset(buf, 0, sizeof buf);
	while (count != 0) {
		chunk = min(count, sizeof buf);
		if (write(to, buf, chunk) != chunk)
			err(1, "write");
		count -= chunk;
	}
}

__dead void
usage(void)
{
	extern char *__progname;

	fprintf(stderr, "usage: %s infile outfile\n", __progname);
	exit(1);
}

/*
 * Convert an ELF binary into BCS ECOFF format.
 * We merge all program headers into a single ECOFF section for simplicity.
 * However, PROM version 01.14 on AV4300 will fail to load a BCS binary
 * unless it has a non-empty data section, so we put the smallest possible
 * bunch of zeroes as a second section to appease it.
 */
void
convert_elf(const char *infile, int infd, int outfd, Elf_Ehdr *ehdr)
{
	struct ecoff_exechdr ehead;
	struct ecoff_scnhdr escn[2];
	Elf_Phdr *phdr;
	off_t outpos;
	uint delta, ptload;
	Elf_Addr minaddr, maxaddr;
	int n, last;

	phdr = calloc(ehdr->e_phnum, sizeof(Elf_Phdr));
	if (phdr == NULL)
		err(1, "calloc");

	for (n = 0; n < ehdr->e_phnum; n++) {
		if (lseek(infd, ehdr->e_phoff + n * ehdr->e_phentsize,
		    SEEK_SET) == (off_t) -1)
			err(1, "seek");
		if (read(infd, phdr + n, sizeof *phdr) != sizeof(*phdr))
			err(1, "read");
	}

	ptload = 0;
	for (n = 0; n < ehdr->e_phnum; n++)
		if (phdr[n].p_type == PT_LOAD)
			ptload++;
	if (ptload > 3)
		errx(1, "%s: too many PT_LOAD program headers", infile);

	maxaddr = 0;
	minaddr = (Elf_Addr)-1;

	for (n = 0; n < ehdr->e_phnum; n++) {
		if (phdr[n].p_type != PT_LOAD)
			continue;
		if (phdr[n].p_paddr < minaddr)
			minaddr = phdr[n].p_paddr;
		if (phdr[n].p_paddr + phdr[n].p_memsz > maxaddr)
			maxaddr = phdr[n].p_paddr + phdr[n].p_memsz;
	}
	maxaddr = round(maxaddr, MINIMAL_ALIGN);

	/*
	 * Header
	 */

	memset(&ehead, 0, sizeof ehead);
	memset(&escn, 0, sizeof escn);

	ehead.f.f_magic = 0x016d;		/* MC88OMAGIC */
	ehead.f.f_nscns = 2;
	ehead.f.f_opthdr = sizeof ehead.a;
	ehead.f.f_flags = 0x020f;
		/* F_RELFLG | F_EXEC | F_LNNO | 8 | F_AR16WR */

	ehead.a.magic = ZMAGIC;
	ehead.a.tsize = maxaddr - minaddr;			/* ignored */
	ehead.a.dsize = MINIMAL_ALIGN;				/* ignored */
	ehead.a.bsize = 0;					/* ignored */
	ehead.a.entry = ehdr->e_entry;
	ehead.a.text_start = minaddr;				/* ignored */
	ehead.a.data_start = maxaddr;				/* ignored */

	n = write(outfd, &ehead, sizeof(ehead));
	if (n != sizeof(ehead))
		err(1, "write");

	/*
	 * Sections
	 */

	strncpy(escn[0].s_name, ".text", sizeof escn[0].s_name);
	escn[0].s_paddr = minaddr;		/* ignored, 1:1 mapping */
	escn[0].s_size = maxaddr - minaddr;
	escn[0].s_scnptr = round(sizeof(ehead) + sizeof(escn), MINIMAL_ALIGN);
	escn[0].s_flags = 0x20;	/* STYP_TEXT */

	strncpy(escn[1].s_name, ".data", sizeof escn[1].s_name);
	escn[1].s_paddr = escn[0].s_paddr + escn[0].s_size;
	escn[1].s_size = MINIMAL_ALIGN;
	escn[1].s_scnptr = escn[0].s_scnptr + escn[0].s_size;
	escn[1].s_flags = 0x40;	/* STYP_DATA */

	/* adjust load addresses */
	escn[0].s_vaddr = escn[0].s_paddr;
	escn[1].s_vaddr = escn[1].s_paddr;

	n = write(outfd, &escn, sizeof(escn));
	if (n != sizeof(escn))
		err(1, "write");

	/*
	 * Copy ``text'' section (all PT_LOAD program headers).
	 */

	outpos = escn[0].s_scnptr;
	if (lseek(outfd, outpos, SEEK_SET) == (off_t) -1)
		err(1, "seek");
	for (n = 0, last = -1; n < ehdr->e_phnum; n++) {
		if (phdr[n].p_type != PT_LOAD)
			continue;
		if (last >= 0) {
			delta = (phdr[n].p_paddr - phdr[last].p_paddr) -
			    phdr[last].p_memsz;
			if (delta != 0) {
				zerobits(outfd, delta);
				outpos += delta;
			}
		}
#ifdef DEBUG
		printf("copying %s: source %x dest %llx size %x\n",
		    escn[0].s_name, phdr[n].p_offset, outpos, phdr[n].p_filesz);
#endif
		if (lseek(infd, phdr[n].p_offset, SEEK_SET) == (off_t) -1)
			err(1, "seek");
		copybits(infd, outfd, phdr[n].p_filesz);
		delta = phdr[n].p_memsz - phdr[n].p_filesz;
		if (delta != 0)
			zerobits(outfd, delta);
		outpos += phdr[n].p_memsz;
		last = n;
	}

	free(phdr);

	/*
	 * Fill ``data'' section.
	 */

	zerobits(outfd, escn[1].s_size);
	outpos += escn[1].s_size;

	/*
	 * Round file to a multiple of 512 bytes, since ``recent'' PROM
	 * (such as rev 1.20 on AV530) will reject files not being properly
	 * rounded to a multiple of 512 bytes.
	 */

	if ((outpos % ECOFF_ALIGN) != 0)
		zerobits(outfd, ECOFF_ALIGN - (outpos % ECOFF_ALIGN));
}


path: sys/arch/aviion/stand/boot/CVS/Entries


path: sys/arch/aviion/stand/boot/CVS/Tag


code:
#	$OpenBSD: Makefile,v 1.7 2015/06/14 19:37:11 miod Exp $

SIZE?=	size

S=	${.CURDIR}/../../../..
DEFS=	-DSUN_BOOTPARAMS
#DEFS+=	-DNETIF_DEBUG
INCPATH=-I${.CURDIR} -I${.CURDIR}/../libsa -I${.CURDIR}/../libprom \
	-I${S} -I${S}/lib/libsa
CFLAGS+=${DEFS} ${INCPATH} ${COPTS} -DSTAGE1_RELOC=${STAGE1_RELOC}
CLEANFILES+=boot boot.ELF

.include "${S}/arch/aviion/stand/Makefile.inc"
.include "${S}/arch/aviion/stand/libprom/Makefile.inc"
.include "${S}/arch/aviion/stand/libsa/Makefile.inc"
.include "${S}/arch/aviion/stand/libz/Makefile.inc"

# Keep crt.c first in the object list for ld's sake.
SRCS=	crt.c boot.c conf.c devopen.c version.c
SRCS+=	oaic.c oosiop.c scsi.c sd.c
SRCS+=	dev_net.c if_le.c
.PATH:	${S}/lib/libkern
SRCS+=	moddi3.c muldi3.c negdi2.c qdivrem.c
OBJS=  ${SRCS:S/.c/.o/g}
LIBS=	${LIBSA} ${LIBPROM} ${LIBZ}
LDFLAGS+= -N -Ttext ${STAGE2_RELOC} -e start
NOPIE=

all:	boot

boot: boot.ELF
	${MDEC_DIR}/a2coff boot.ELF boot

boot.ELF: ${OBJS} ${LIBS}
	${LD} ${LDFLAGS} -o $@ ${OBJS} ${LIBS}
	@${SIZE} $@

install: boot
	${INSTALL} ${INSTALL_COPY} -o ${LIBOWN} -g ${LIBGRP} -m ${LIBMODE} \
	  boot ${DESTDIR}${MDEC_DIR}/boot

.include <bsd.prog.mk>

path: sys/arch/aviion/stand/boot/Makefile


code:
/*	$OpenBSD: boot.c,v 1.5 2014/02/24 20:15:37 miod Exp $ */

/*-
 * Copyright (c) 1995 Theo de Raadt
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * Copyright (c) 1982, 1986, 1990, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * 	@(#)boot.c	8.1 (Berkeley) 6/10/93
 */

#include <sys/param.h>
#include <sys/reboot.h>
#include <sys/stat.h>
#define _KERNEL
#include <sys/fcntl.h>
#undef _KERNEL

#include <machine/prom.h>

#include <lib/libkern/libkern.h>
#include "stand.h"
#include "libsa.h"

extern int devparse(const char *, uint *, uint *, uint *, uint *,
	    const char **, const char **, char **);
extern	const char version[];

char	line[80];
struct boot_info bi;

char   rnddata[BOOTRANDOM_MAX];		/* XXX dummy */

int	loadrandom(const char *, char *, size_t);

void
boot(const char *args, uint bootdev, uint bootunit, uint bootlun)
{
	char *p, *file, *fname;
	char rndpath[MAXPATHLEN];
	int ask;
	int ret;
	int rnd_loaded = 0;
	uint controller, unit, lun, part;
	const char *device, *ctrl;

	printf("\n>> OpenBSD/" MACHINE " boot %s\n", version);

	bi.bootdev = bootdev;
	bi.bootunit = bootunit;
	bi.bootlun = bootlun;
	bi.bootpart = 0;

	/*
	 * Older PROM version put a \r at the end of a manually entered
	 * boot string.
	 */
	if ((p = strchr(args, '\r')) != NULL)
		*p = '\0';

	ret = parse_args(args, &file, 1);
	ask = boothowto & RB_ASKNAME;
	for (;;) {
		if (ask != 0) {
			printf("boot: ");
			gets(line);
			if (line[0] == '\0')
				continue;

			ret = parse_args(line, &file, 0);
			args = line;
		}
		if (ret != 0) {
			printf("boot: returning to SCM\n");
			break;
		}

		/*
		 * Try and load randomness from the boot device.
		 */
		if (rnd_loaded == 0) {
			if (devparse(file, &controller, &unit, &lun, &part,
			    &device, &ctrl, &fname) == 0 &&
			    fname - file < sizeof(rndpath)) {
				memcpy(rndpath, file, fname - file);
				rndpath[fname - file] = '\0';
				strlcat(rndpath, BOOTRANDOM, sizeof rndpath);
				rnd_loaded = loadrandom(rndpath, rnddata,
				    sizeof(rnddata));
			}
		}

		printf("%s: ", file);
		exec(file, args,
		    bi.bootdev, bi.bootunit, bi.bootlun, bi.bootpart);
		printf("boot: %s: %s\n", file, strerror(errno));
		ask = 1;
	}
}

int
loadrandom(const char *name, char *buf, size_t buflen)
{
	struct stat sb;
	int fd;
	int rc = 0;

	fd = open(name, O_RDONLY);
	if (fd == -1) {
		if (errno != EPERM)
			printf("cannot open %s: %s\n", name, strerror(errno));
		return 0;
	}
	if (fstat(fd, &sb) == -1 || sb.st_uid != 0 || !S_ISREG(sb.st_mode) ||
	    (sb.st_mode & (S_IWOTH|S_IROTH)))
		goto fail;
	(void) read(fd, buf, buflen);
	rc = 1;
fail:
	close(fd);
	return rc;
}


code:
/*	$OpenBSD: conf.c,v 1.3 2014/08/21 14:24:08 mpi Exp $ */

#include <sys/types.h>
#include <netinet/in.h>

#include <stand.h>
#include <ufs.h>
#include <nfs.h>

struct fs_ops file_system[] = {
	{ ufs_open, ufs_close, ufs_read, ufs_write, ufs_seek, ufs_stat },
	{ nfs_open, nfs_close, nfs_read, nfs_write, nfs_seek, nfs_stat }
};
int nfsys = sizeof(file_system) / sizeof(file_system[0]);

extern int sdstrategy(void *, int, daddr32_t, size_t, void *, size_t *);
extern int sdopen(struct open_file *, ...);
extern int sdclose(struct open_file *);

extern int net_strategy(void *, int, daddr32_t, size_t, void *, size_t *);
extern int net_open(struct open_file *, ...);
extern int net_close(struct open_file *);

struct devsw devsw[] = {
	{ "sd", sdstrategy, sdopen, sdclose,  noioctl },
	{ "inen", net_strategy, net_open, net_close, noioctl }
};
int ndevs = sizeof(devsw) / sizeof(devsw[0]);

extern struct netif_driver le_driver;

struct netif_driver *netif_drivers[] = {
	&le_driver
};
int n_netif_drivers = sizeof(netif_drivers) / sizeof(netif_drivers[0]);

/* XXX */
int netif_debug;
int debug;
int errno;


code:
/*	$OpenBSD: crt.c,v 1.3 2013/10/16 16:59:34 miod Exp $ */

#include <sys/types.h>
#include <machine/prom.h>

#include "stand.h"

extern void boot(char *, int, int, int);

/*
 * This is the boot code entry point.
 * Note that we do not bother to set r31, and use the default value supplied
 * by the PROM, which is the top of memory, minus the PROM data area (usually
 * 128KB).
 */
void
start(char *args, int dev, int unit, int lun)
{
	extern int edata, end;

	/*
	 * This code enables the SFU1 and is used for single stage
	 * bootstraps or the first stage of a two stage bootstrap.
	 * Do not use any low register to enable the SFU1. This wipes out
	 * the args.  Not cool at all... r25 seems free.
	 */
	asm("	ldcr	%%r25,%%cr1" ::: "r25");
	asm("	clr	%r25,%r25,1<3>"); /* bit 3 is SFU1D */
	asm("	stcr	%r25,%cr1");

	memset(&edata, 0, ((int)&end - (int)&edata));

	boot(args, dev, unit, lun);
	_rtt();
	/* NOTREACHED */
}


code:
/*	$OpenBSD: dev_net.c,v 1.2 2014/08/21 14:24:08 mpi Exp $ */

/*
 * Copyright (c) 1995 Gordon W. Ross
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 * 4. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Gordon W. Ross
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * This module implements a "raw device" interface suitable for
 * use by the stand-alone I/O library NFS code.  This interface
 * does not support any "block" access, and exists only for the
 * purpose of initializing the network interface, getting boot
 * parameters, and performing the NFS mount.
 *
 * At open time, this does:
 *
 * find interface      - netif_open()
 * RARP for IP address - rarp_getipaddress()
 * RPC/bootparams      - callrpc(d, RPC_BOOTPARAMS, ...)
 * RPC/mountd          - nfs_mount(sock, ip, path)
 *
 * the root file handle from mountd is saved in a global
 * for use by the NFS open code (NFS/lookup).
 */

#include <sys/param.h>
#include <sys/socket.h>
#include <net/if.h>
#include <netinet/in.h>
#include <netinet/if_ether.h>

#include <machine/prom.h>

#include "stand.h"
#include "libsa.h"
#include "prom.h"
#include "net.h"
#include "netif.h"
#include "bootparam.h"
#include "nfs.h"

extern int nfs_root_node[];	/* XXX - get from nfs_mount() */

struct in_addr myip, rootip, gateip, mask;
char rootpath[FNAME_SIZE];

int netdev_sock = -1;
static int open_count;

int	net_mountroot(struct open_file *, char *);

/*
 * Called by devopen after it sets f->f_dev to our devsw entry.
 * This opens the low-level device and sets f->f_devdata.
 */
int
net_open(f, devname)
	struct open_file *f;
	char *devname;		/* Device part of file name (or NULL). */
{
	int error = 0;

	/* On first open, do netif open, mount, etc. */
	if (open_count == 0) {
		/* Find network interface. */
		if ((netdev_sock = netif_open(devname)) < 0)
			return (error=ENXIO);
		if ((error = net_mountroot(f, devname)) != 0)
			return (error);
	}
	open_count++;
	f->f_devdata = nfs_root_node;
	return (error);
}

int
net_close(f)
	struct open_file *f;
{
	/* On last close, do netif close, etc. */
	if (open_count > 0)
		if (--open_count == 0)
			netif_close(netdev_sock);
	f->f_devdata = NULL;
	return (0);
}

int
net_strategy(void *devdata, int rw, daddr32_t blk, size_t size, void *buf,
    size_t *rsize)
{
	return EIO;
}

int
net_mountroot(f, devname)
	struct open_file *f;
	char *devname;		/* Device part of file name (or NULL). */
{
	int error;

#ifdef DEBUG
	printf("net_mountroot: %s\n", devname);
#endif

	/*
	 * Get info for NFS boot: our IP address, our hostname,
	 * server IP address, and our root path on the server.
	 * There are two ways to do this:  The old, Sun way,
	 * and the more modern, BOOTP way. (RFC951, RFC1048)
	 */

#ifdef	SUN_BOOTPARAMS
	/* Get boot info using RARP and Sun bootparams. */

	/* Get our IP address.  (rarp.c) */
	if (rarp_getipaddress(netdev_sock) == -1)
		return (EIO);
	printf("boot: client IP address: %s\n", intoa(myip.s_addr));

	/* Get our hostname, server IP address. */
	if (bp_whoami(netdev_sock))
		return (EIO);
	printf("boot: client name: %s\n", hostname);

	/* Get the root pathname. */
	if (bp_getfile(netdev_sock, "root", &rootip, rootpath))
		return (EIO);

#else

	/* Get boot info using BOOTP way. (RFC951, RFC1048) */
	bootp(netdev_sock);

	printf("Using IP address: %s\n", intoa(myip.s_addr));

	printf("myip: %s (%s)", hostname, intoa(myip));
	if (gateip)
		printf(", gateip: %s", intoa(gateip));
	if (mask)
		printf(", mask: %s", intoa(mask));
	printf("\n");

#endif

	printf("root addr=%s path=%s\n", intoa(rootip.s_addr), rootpath);

	/* Get the NFS file handle (mount). */
	error = nfs_mount(netdev_sock, rootip, rootpath);

	return (error);
}

/*
 * machdep_common_ether: get ethernet address
 */
void
machdep_common_ether(ether)
	u_char *ether;
{
	scm_getenaddr(ether);
}


code:
/*	$OpenBSD: devopen.c,v 1.5 2014/02/24 20:15:37 miod Exp $	*/

/*
 * Copyright (c) 2013 Miodrag Vallat.
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <sys/param.h>
#include <stand.h>

#include "libsa.h"

int	devparse(const char *, uint *, uint *, uint *, uint *,
	    const char **, const char **, char **);

/*
 * Parse the boot commandline into a proper device specification and
 * kernel filename.
 */
int
devparse(const char *fname, uint *controller, uint *unit, uint *lun, uint *part,
    const char **dev, const char **ctrl, char **file)
{
	struct devsw *dp;
	int i;
	const char *po, *pc, *pc2, *p, *comma;
	static char devctrl[1 + 4];
	char device[1 + 4];
	size_t devlen;

	/* defaults */
	*controller = *unit = *lun = *part = 0;
	device[0] = '\0';
	devctrl[0] = '\0';

	/*
	 * Attempt to parse the name as
	 *     ctrlnam([num[,unit[,lun]]])[partname:]filename
	 * or
	 *     devnam([num|ctrlnam([num]][,initiator])[,unit[,lun]])
	 *						[partname:]filename
	 *
	 * With device names being "sd" or "st" for storage devices,
	 * or a controller name for network devices, and controller names
	 * being four letter long ("dgen", "dgsc", "inen", "ncsc" ...)
	 *
	 * Initiator id is always ignored.
	 */

	po = strchr(fname, '(');
	if (po != NULL) {
		pc = strchr(fname, ')');
		if (pc == NULL || pc < po)
			return EINVAL;
		p = strchr(po + 1, '(');

		if (p != NULL && p < pc) {
			pc2 = strchr(pc + 1, ')');
			if (pc2 == NULL)
				return EINVAL;
		} else
			pc2 = NULL; /* XXX gcc3 -Wuninitialized */

		devlen = po++ - fname;
		if (devlen > 4)
			return EINVAL;
		memcpy(device, fname, devlen);
		device[devlen] = '\0';

		if (p != NULL && p < pc) {
			/* second form. extract controller name */
			devlen = p++ - po;
			if (devlen > 4)
				return EINVAL;
			memcpy(devctrl, po, devlen);
			devctrl[devlen] = '\0';

			*controller = strtol(p, NULL, 0);
			po = pc + 1;
			pc = pc2;
		} else {
			/* first form. extract controller number */
			*controller = strtol(po, NULL, 0);
		}

		comma = strchr(po, ',');
		if (comma != NULL && comma < pc) {
			comma++;
			*unit = strtol(comma, NULL, 0);
			po = comma;
		}

		comma = strchr(po, ',');
		if (comma != NULL && comma < pc) {
			comma++;
			*lun = strtol(comma, NULL, 0);
			po = comma;
		}

		pc++;
		fname = pc;
	} else {
		/* no controller, keep defaults */
	}

	p = strchr(fname, ':');
	if (p != NULL) {
		*part = strtol(fname, NULL, 0);
		fname = p + 1;
	}

	while (*fname == '/' || *fname == ':')
		fname++;

	*file = (char *)fname;

	for (dp = devsw, i = 0; i < ndevs; dp++, i++)
		if (dp->dv_name != NULL && strcmp(dp->dv_name, device) == 0)
			break;
	if (i == ndevs)
		return ENXIO;

	*dev = dp->dv_name;
	*ctrl = devctrl;
	return 0;
}

/*
 * Parse the boot commandline into a proper device specification and
 * kernel filename.
 */
int
devopen(struct open_file *f, const char *fname, char **file)
{
	struct devsw *dp;
	int error, i;
	uint controller, unit, lun, part;
	const char *device, *ctrl;

	error = devparse(fname, &controller, &unit, &lun, &part, &device, &ctrl,
	    file);
	if (error != 0)
		return error;

	for (dp = devsw, i = 0; i < ndevs; dp++, i++)
		if (dp->dv_name != NULL && strcmp(dp->dv_name, device) == 0)
			break;
	if (i == ndevs)
		return ENXIO;

	error = (*dp->dv_open)(f, ctrl, controller, unit, lun, part);
	if (error == 0) {
		f->f_dev = dp;
		/* update global boot_info */
		bi.bootdev = controller;
		bi.bootunit = unit;
		bi.bootlun = lun;
		bi.bootpart = part;
	}

	return error;
}