code:
/*	$OpenBSD: wdvar.h,v 1.3 2011/03/13 00:13:53 deraadt Exp $	*/
/*	$NetBSD: wdvar.h,v 1.6 2005/12/11 12:17:06 christos Exp $	*/

/*-
 * Copyright (c) 2003 The NetBSD Foundation, Inc.
 * Copyright (c) 2001 Dynarc AB, Sweden. All rights reserved.
 *
 * This code is derived from software written by Anders Magnusson,
 * ragge@ludd.luth.se
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _STAND_WDVAR_H
#define _STAND_WDVAR_H

#include <sys/disklabel.h>

#include <dev/ic/wdcreg.h>
#include <dev/ata/atareg.h>
#include <dev/pci/pciidereg.h>

/*
 * WD1003 / ATA Disk Controller register definitions.
 */

/* offsets of registers in the 'regular' register region */
#define wd_data                 0       /* data register (R/W - 16 bits) */
#define wd_error                1       /* error register (R) */
#define wd_precomp              1       /* write precompensation (W) */
#define wd_seccnt               2       /* sector count (R/W) */
#define wd_ireason              2       /* interrupt reason (R/W) (for atapi) */
#define wd_sector               3       /* first sector number (R/W) */
#define wd_cyl_lo               4       /* cylinder address, low byte (R/W) */
#define wd_cyl_hi               5       /* cylinder address, high byte (R/W) */
#define wd_sdh                  6       /* sector size/drive/head (R/W) */
#define wd_command              7       /* command register (W) */
#define wd_lba_lo               3       /* lba address, low byte (RW) */
#define wd_lba_mi               4       /* lba address, middle byte (RW) */
#define wd_lba_hi               5       /* lba address, high byte (RW) */

/* "shadow" registers; these may or may not overlap regular registers */
#define wd_status               8       /* immediate status (R) */
#define wd_features             9       /* features (W) */

/* offsets of registers in the auxiliary register region */
#define wd_aux_altsts           0       /* alternate fixed disk status (R) */
#define wd_aux_ctlr             0       /* fixed disk controller control (W) */
#define  WDCTL_4BIT              0x08   /* use four head bits (wd1003) */
#define  WDCTL_RST               0x04   /* reset the controller */
#define  WDCTL_IDS               0x02   /* disable controller interrupts */

#define WDC_TIMEOUT		2000000
#define PCIIDE_CHANNEL_NDEV	2
#define NUNITS			(PCIIDE_CHANNEL_NDEV * PCIIDE_NUM_CHANNELS)
#define WDC_NPORTS		8	/* XXX */
#define WDC_NSHADOWREG		2	/* XXX */

struct wdc_channel {
	volatile u_int8_t *c_cmdbase;
	volatile u_int8_t *c_ctlbase;
	volatile u_int8_t *c_cmdreg[WDC_NPORTS + WDC_NSHADOWREG];
	volatile u_int16_t *c_data;

	u_int8_t ndrives;

	u_int8_t (*read_cmdreg)(struct wdc_channel *chp, u_int8_t reg);
	void (*write_cmdreg)(struct wdc_channel *chp, u_int8_t reg, u_int8_t val);
	u_int8_t (*read_ctlreg)(struct wdc_channel *chp, u_int8_t reg);
	void (*write_ctlreg)(struct wdc_channel *chp, u_int8_t reg, u_int8_t val);
};

#define WDC_READ_REG(chp, reg)		(chp)->read_cmdreg(chp, reg)
#define WDC_WRITE_REG(chp, reg, val)	(chp)->write_cmdreg(chp, reg, val)
#define WDC_READ_CTLREG(chp, reg)	(chp)->read_ctlreg(chp, reg)
#define WDC_WRITE_CTLREG(chp, reg, val)	(chp)->write_ctlreg(chp, reg, val)
#define WDC_READ_DATA(chp)		*(chp)->c_data

struct wd_softc {
#define WDF_LBA		0x0001
#define WDF_LBA48	0x0002
	u_int16_t sc_flags;

	u_int sc_part;
	u_int sc_unit;

	u_int64_t sc_capacity;

	struct ataparams sc_params;
	struct disklabel sc_label;
	struct wdc_channel sc_channel;
	u_int sc_drive;
};

struct wdc_command {
	u_int8_t drive;		/* drive id */

	u_int8_t r_command;	/* Parameters to upload to registers */
	u_int8_t r_head;
	u_int16_t r_cyl;
	u_int8_t r_sector;
	u_int8_t r_count;
	u_int8_t r_precomp;

	u_int16_t bcount;
	void *data;

	u_int64_t r_blkno;
};

int	wdc_init		(struct wd_softc*, u_int);
int	wdccommand		(struct wd_softc*, struct wdc_command*);
int	wdccommandext		(struct wd_softc*, struct wdc_command*);
int	wdc_exec_read		(struct wd_softc*, u_int8_t, daddr32_t, void*);
int	wdc_exec_identify	(struct wd_softc*, void*);

#endif /* _STAND_WDVAR_H */


path: sys/arch/socppc/stand/mbr/CVS/Entries

license: unknown


path: sys/arch/socppc/stand/mbr/CVS/Tag


code:
#	$OpenBSD: Makefile,v 1.3 2012/09/11 15:59:01 kettenis Exp $

.include <bsd.own.mk>

NOMAN=
#MAN=	mbr.8

.if ${MACHINE} == "socppc"
PROG=	mbr
SRCS=	mbr.S
AFLAGS+=-I${.OBJDIR} -I${.CURDIR}/../../.. #-Wa,a
LDFLAGS+=-N -e start -Ttext 0 -nopie
OBJCOPY?=objcopy

INSTALL_STRIP=
S=	${.CURDIR}/../../../..

${PROG}: $(OBJS) $(DPADD)
	$(LD) $(LDFLAGS) -o $(PROG) $(OBJS) $(LDADD)
	@size $(PROG)
	@if [ -x ${.OBJDIR}/${PROG} ]; then \
		${OBJCOPY} -O binary ${PROG} ${.OBJDIR}/.tmp;\
		mv -f ${.OBJDIR}/.tmp ${.OBJDIR}/${PROG}; \
		ls -l ${.OBJDIR}/${PROG}; \
	fi

.else
NOPROG=
.endif

.include <bsd.prog.mk>

path: sys/arch/socppc/stand/mbr/Makefile


path: sys/arch/socppc/stand/mkboot/CVS/Tag


code:
#	$OpenBSD: Makefile,v 1.4 2012/09/02 17:22:53 pascal Exp $

.include "${.CURDIR}/../Makefile.inc"

MAN=	mkboot.8

.if ${MACHINE} == "socppc"
PROG=	mkboot
DPADD=	${LIBZ}
LDADD=	-lz
.else
NOPROG=
.endif

.include <bsd.prog.mk>

path: sys/arch/socppc/stand/mkboot/Makefile


code:
/*	$OpenBSD: mkboot.c,v 1.2 2009/01/31 21:10:09 grange Exp $	*/

/*
 * Copyright (c) 2008 Mark Kettenis
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <sys/types.h>
#include <err.h>
#include <fcntl.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <unistd.h>
#include <zlib.h>

#define IH_OS_OPENBSD		1 /* OpenBSD */

#define IH_CPU_PPC		7 /* PowerPC */

#define IH_TYPE_STANDALONE	1 /* Standalone */

#define IH_COMP_NONE		0 /* No compression */

#define IH_MAGIC		0x27051956	/* Image Magic Number */
#define IH_NMLEN		32 		/* Image Name Length */

struct image_header {
	uint32_t	ih_magic;
	uint32_t	ih_hcrc;
	uint32_t	ih_time;
	uint32_t	ih_size;
	uint32_t	ih_load;
	uint32_t	ih_ep;
	uint32_t	ih_dcrc;
	uint8_t		ih_os;
	uint8_t		ih_arch;
	uint8_t		ih_type;
	uint8_t		ih_comp;
	uint8_t		ih_name[IH_NMLEN];
};

extern char *__progname;

void	usage(void);

int
main(int argc, char *argv[])
{
	struct image_header ih;
	const char *iname, *oname;
	int ifd, ofd;
	u_long crc;
	ssize_t nbytes;
	char buf[BUFSIZ];
	int c, ep, load;

	ep = load = 0;
	while ((c = getopt(argc, argv, "e:l:")) != -1) {
		switch (c) {
		case 'e':
			sscanf(optarg, "0x%x", &ep);
			break;
		case 'l':
			sscanf(optarg, "0x%x", &load);
			break;
		default:
			usage();
		}
	}
	if (argc - optind != 2)
		usage();

	iname = argv[optind++];
	oname = argv[optind++];

	/* Initialize U-Boot header. */
	bzero(&ih, sizeof ih);
	ih.ih_magic = IH_MAGIC;
	ih.ih_time = time(NULL);
	ih.ih_load = load;
	ih.ih_ep = ep;
	ih.ih_os = IH_OS_OPENBSD;
	ih.ih_arch = IH_CPU_PPC;
	ih.ih_type = IH_TYPE_STANDALONE;
	ih.ih_comp = IH_COMP_NONE;
	strlcpy(ih.ih_name, "boot", sizeof ih.ih_name);

	ifd = open(iname, O_RDONLY);
	if (ifd < 0)
		err(1, "%s", iname);

	ofd = open(oname, O_RDWR | O_TRUNC | O_CREAT, 0644);
	if (ofd < 0)
		err(1, "%s", oname);

	/* Write initial header. */
	if (write(ofd, &ih, sizeof ih) != sizeof ih)
		err(1, "%s", oname);

	/* Copy data, calculating the data CRC as we go. */
	crc = crc32(0L, Z_NULL, 0);
	while ((nbytes = read(ifd, buf, sizeof buf)) != 0) {
		if (nbytes == -1)
			err(1, "%s", iname);
		if (write(ofd, buf, nbytes) != nbytes)
			err(1, "%s", oname);
		crc = crc32(crc, buf, nbytes);
		ih.ih_size += nbytes;
	}
	ih.ih_dcrc = htonl(crc);

	/* Calculate header CRC. */
	crc = crc32(0, (void *)&ih, sizeof ih);
	ih.ih_hcrc = htonl(crc);

	/* Write finalized header. */
	if (lseek(ofd, 0, SEEK_SET) != 0)
		err(1, "%s", oname);
	if (write(ofd, &ih, sizeof ih) != sizeof ih)
		err(1, "%s", oname);

	return(0);
}

void
usage(void)
{
	(void)fprintf(stderr,
	    "usage: %s [-e entry] [-l loadaddr] infile outfile\n", __progname);
	exit(1);
}


code:
/Makefile/1.8/Sun Dec  8 14:46:39 2013//TOPENBSD_5_8_BASE
D/compile////
D/conf////
D/dev////
D/include////
D/solbourne////

path: sys/arch/solbourne/CVS/Entries


code: src/sys/arch/solbourne

path: sys/arch/solbourne/CVS/Repository


code:
#	$OpenBSD: Makefile,v 1.8 2013/12/08 14:46:39 espie Exp $

S=	${.CURDIR}/../..
KFILE=	GENERIC
.if exists(conf/GENERIC.MP)
KFILE=	GENERIC.MP
.endif
TDIRS=	${_arch} include
TAGS=	${.CURDIR}/tags

NOPROG=
NOMAN=
NOOBJ=
SUBDIR=

# config the fattest kernel we can find into a temporary dir
# to create a Makefile.  Then use make to pull some variables
# out and push them into the sub-shell to expand the paths,
# and finally run ctags.
tags::
	TDIR=`mktemp -d /tmp/_tagXXXXXXXXXX` || exit 1; \
	eval "S=${S}" && \
	config -s ${S} -b $${TDIR} ${.CURDIR}/conf/${KFILE} && \
	eval "_arch=\"`make -V _arch -f $${TDIR}/Makefile`\"" && \
	eval "_mach=\"`make -V _mach -f $${TDIR}/Makefile`\"" && \
	eval "_machdir=\$S/arch/$${_mach}" && \
	eval "_archdir=\$S/arch/$${_arch}" && \
	eval "HFILES=\"`find $S \( -path $S/'arch' -o -path $S/stand -o -path $S/lib/libsa -o -path $S'/lib/libkern/arch' \) -prune -o -name '*.h'; find $${_machdir} $${_archdir} $S/lib/libkern/arch/$${_mach} \( -name boot -o -name stand \) -prune -o -name '*.h'`\"" && \
	eval "SFILES=\"`make -V SFILES -f $${TDIR}/Makefile`\"" && \
	eval "CFILES=\"`make -V CFILES -f $${TDIR}/Makefile`\"" && \
	eval "AFILES=\"`make -V AFILES -f $${TDIR}/Makefile`\"" && \
	ctags -wd -f ${TAGS} $${CFILES} $${HFILES} && \
	egrep "^[_A-Z]*ENTRY[_A-Z]*\(.*\)" $${SFILES} $${AFILES} | \
	    sed "s;\\([^:]*\\):\\([^(]*\\)(\\([^, )]*\\)\\(.*\\);\\3	\\1	/^\\2(\\3\\4$$/;" \
	    >> ${TAGS} && \
	sort -o ${TAGS} ${TAGS} && \
	rm -rf $${TDIR}

links:
	-for i in conf ${TDIRS}; do \
	    (cd $$i && rm -f tags; ln -s tags tags); done

obj:	_SUBDIRUSE

.include <bsd.prog.mk>

path: sys/arch/solbourne/Makefile


code:
/.cvsignore/1.1/Tue Apr 19 21:30:15 2005//TOPENBSD_5_8_BASE
D

path: sys/arch/solbourne/compile/CVS/Entries


path: sys/arch/solbourne/compile/CVS/Tag


code:
/GENERIC/1.3/Sat Apr 30 00:49:36 2005//TOPENBSD_5_8_BASE
/Makefile.solbourne/1.47/Tue Jan 13 01:12:50 2015//TOPENBSD_5_8_BASE
/files.solbourne/1.2/Mon Jun 19 15:13:35 2006//TOPENBSD_5_8_BASE
/ld.script/1.2/Thu Apr 12 18:36:15 2007//TOPENBSD_5_8_BASE
D

path: sys/arch/solbourne/conf/CVS/Entries


code: src/sys/arch/solbourne/conf

path: sys/arch/solbourne/conf/CVS/Repository


code:
#	$OpenBSD: GENERIC,v 1.3 2005/04/30 00:49:36 deraadt Exp $
#
# For further information on compiling OpenBSD kernels, see the config(8)
# man page.
#
# For further information on hardware support for this architecture, see
# the intro(4) man page.  For further information about kernel options
# for this architecture, see the options(4) man page.  For an explanation
# of each device driver in this file see the section 4 man page for the
# device.

machine		solbourne sparc
include		"../../../conf/GENERIC"
maxusers	32		# estimated number of users

option		SOLBOURNE	# necessary for proper config(8) operation

# Generic swap; second partition of root disk or network.
config		bsd	swap generic

# Main bus and CPU .. all systems.
mainbus0 at root
cpu0	at mainbus0
obio0	at mainbus0

# Oki MSM62X42BRS TODclock
tod0	at obio0

# Zilog 8530 serial chips.  Each has two-channels.
# zs0 is ttya and ttyb.  zs1 is the keyboard and mouse.
zs0	at obio0
zs1	at obio0

zstty*	at zs?
zsclock0 at zs1

# On-board Ethernet
le0	at obio0

path: sys/arch/solbourne/conf/GENERIC


code:
#	$OpenBSD: Makefile.solbourne,v 1.47 2015/01/13 01:12:50 deraadt Exp $

# For instructions on building kernels consult the config(8) and options(4)
# manual pages.
#
# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
#	IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
# DEBUG is set to -g by config if debugging is requested (config -g).
# PROF is set to -pg by config if profiling is requested (config -p).

.include <bsd.own.mk>

SIZE?=	size
STRIP?=	strip

# source tree is located via $S relative to the compilation directory
.ifndef S
S!=	cd ../../../..; pwd
.endif

_machdir?=	$S/arch/${_mach}
_archdir?=	$S/arch/${_arch}

INCLUDES=	-nostdinc -I$S -I. -I$S/arch
CPPFLAGS=	${INCLUDES} ${IDENT} ${PARAM} -D_KERNEL -D__${_mach}__ -MD -MP
CWARNFLAGS=	-Werror -Wall -Wimplicit-function-declaration \
		-Wno-main -Wno-uninitialized \
		-Wframe-larger-than=2047

CMACHFLAGS=	-mno-fpu
CMACHFLAGS+=	-fno-builtin-printf -fno-builtin-snprintf \
		-fno-builtin-vsnprintf -fno-builtin-log \
		-fno-builtin-log2 -fno-builtin-malloc ${NOPIE_FLAGS}
.if ${IDENT:M-DNO_PROPOLICE}
CMACHFLAGS+=	-fno-stack-protector
.endif

COPTS?=		-O2
CFLAGS=		${DEBUG} ${CWARNFLAGS} ${CMACHFLAGS} ${COPTS} ${PIPE}
AFLAGS=		-D_LOCORE -x assembler-with-cpp ${CWARNFLAGS} ${CMACHFLAGS}
LDSCRIPT=	${_machdir}/conf/ld.script
LINKFLAGS=	-N -e start -T ${LDSCRIPT} -Ttext FD084000 --warn-common -nopie

.if ${IDENT:M-DDDB_STRUCT}
DB_STRUCTINFO=	db_structinfo.h
.else
DB_STRUCTINFO=
.endif

HOSTCC?=	${CC}
HOSTED_CPPFLAGS=${CPPFLAGS:S/^-nostdinc$//}
HOSTED_CFLAGS=	${CFLAGS}
HOSTED_C=	${HOSTCC} ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} -c $<

NORMAL_C_NOP=	${CC} ${CFLAGS} ${CPPFLAGS} -c $<
NORMAL_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
NORMAL_S=	${CC} ${AFLAGS} ${CPPFLAGS} -c $<

%OBJS

%CFILES

%SFILES

# load lines for config "xxx" will be emitted as:
# xxx: ${SYSTEM_DEP} swapxxx.o
#	${SYSTEM_LD_HEAD}
#	${SYSTEM_LD} swapxxx.o
#	${SYSTEM_LD_TAIL}
SYSTEM_HEAD=	locore.o param.o ioconf.o
SYSTEM_OBJ=	${SYSTEM_HEAD} ${OBJS}
SYSTEM_DEP=	Makefile ${SYSTEM_OBJ} ${LDSCRIPT}
SYSTEM_LD_HEAD=	@rm -f $@
SYSTEM_LD=	@echo ${LD} ${LINKFLAGS} -o $@ '$${SYSTEM_HEAD} vers.o $${OBJS}'; \
		${LD} ${LINKFLAGS} -o $@ ${SYSTEM_HEAD} vers.o ${OBJS}
SYSTEM_LD_TAIL=	@${SIZE} $@; chmod 755 $@

DEBUG?=
.if ${DEBUG} == "-g"
LINKFLAGS+=	-X
STRIPFLAGS=	-g -x
SYSTEM_LD_TAIL+=; \
		echo mv $@ $@.gdb; rm -f $@.gdb; mv $@ $@.gdb; \
		echo ${STRIP} ${STRIPFLAGS} -o $@ $@.gdb; \
		${STRIP} ${STRIPFLAGS} -o $@ $@.gdb
.else
LINKFLAGS+=	-S -x
.endif

%LOAD

# cc's -MD puts the source and output paths in the dependency file;
# since those are temp files here we need to fix it up.  It also
# puts the file in /tmp, so we use -MF to put it in the current
# directory as assym.P and then generate assym.d from it with a
# good target name
assym.h: $S/kern/genassym.sh Makefile \
	 ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf
	cat ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf | \
	    sh $S/kern/genassym.sh ${CC} ${CFLAGS} ${CPPFLAGS} -MF assym.P > assym.h.tmp
	sed '1s/.*/assym.h: \\/' assym.P > assym.d
	sort -u assym.h.tmp > assym.h

param.c: $S/conf/param.c
	rm -f param.c
	cp $S/conf/param.c .

param.o: param.c Makefile
	${NORMAL_C}

mcount.o: $S/lib/libkern/mcount.c Makefile
	${NORMAL_C_NOP}

ioconf.o: ioconf.c
	${NORMAL_C}

vers.o: ${SYSTEM_DEP} ${SYSTEM_SWAP_DEP}
	sh $S/conf/newvers.sh
	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c

clean::
	rm -f eddep *bsd *bsd.gdb tags *.[dio] [a-z]*.s \
	    [Ee]rrs linterrs assym.h ${DB_STRUCTINFO}

lint:
	@lint -hbxncez -Dvolatile= ${CPPFLAGS} -UKGDB \
	    ${CFILES} ioconf.c param.c | \
	    grep -v 'static function .* unused'

depend:
	@touch $@

tags:
	@echo "see $S/kern/Makefile for tags"

db_structinfo.h: $S/ddb/db_structinfo.c $S/ddb/parse_structinfo.pl
	${CC} ${CFLAGS} ${CPPFLAGS} -MT $@ -gstabs -c $S/ddb/db_structinfo.c
	objdump -g db_structinfo.o | perl $S/ddb/parse_structinfo.pl > $@
	rm -f db_structinfo.o

locore.o: ${_machdir}/${_mach}/locore.s assym.h

# The install target can be redefined by putting a
# install-kernel-${MACHINE_NAME} target into /etc/mk.conf
MACHINE_NAME!=  uname -n
install: install-kernel-${MACHINE_NAME}
.if !target(install-kernel-${MACHINE_NAME}})
install-kernel-${MACHINE_NAME}:
	cmp -s bsd /bsd || ln -f /bsd /obsd
	cp bsd /nbsd
	mv /nbsd /bsd
.endif

# pull in the dependency information
.if !empty(DB_STRUCTINFO) && !exists(${DB_STRUCTINFO})
 ${SYSTEM_OBJ}: ${DB_STRUCTINFO}
.endif
.ifnmake clean
. for o in ${SYSTEM_OBJ} assym.h ${DB_STRUCTINFO}
.  if exists(${o:R}.d)
.   include "${o:R}.d"
.  elif exists($o)
    .PHONY: $o
.  endif
. endfor
.endif

%RULES


code:
#	$OpenBSD: files.solbourne,v 1.2 2006/06/19 15:13:35 deraadt Exp $

# Kernel configuration rules for OpenBSD/solbourne.
# Most device definitions and files rules are imported from
# sys/arch/sparc/conf/files.sparc and are not repeated here.
# Hence, this file only lists solbourne-specific changes from
# the sparc port.

maxpartitions 16

maxusers 2 8 64

# obio on solbourne is just an administrative wrapper on which
# all on-board devices attach.
file	arch/solbourne/dev/obio.c		obio

# OKI TODclock chip
device	tod
attach	tod at obio
file	arch/solbourne/dev/tod.c		tod

# Z8530 clock hijack
device	zsclock
attach	zsclock at zs
file	arch/solbourne/dev/zsclock.c		zsclock

file	arch/solbourne/solbourne/autoconf.c
file	arch/solbourne/solbourne/clock.c
file	arch/solbourne/solbourne/machdep.c
file	arch/solbourne/solbourne/mem.c
file	arch/solbourne/solbourne/pmap.c
file	arch/solbourne/solbourne/prom_machdep.c
file	arch/solbourne/solbourne/trap.c


code:
/*	$OpenBSD: ld.script,v 1.2 2007/04/12 18:36:15 miod Exp $	*/
/*
 * Copyright (c) 2005, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

OUTPUT_FORMAT("a.out-sparc-netbsd")
OUTPUT_ARCH(sparc)
ENTRY(start)
SECTIONS
{
	.text :
	{
		*(.text)
		. = ALIGN(0x2000);
		PROVIDE(etext = ABSOLUTE(.));
	}
	.data :
	{
		*(.rodata)
		*(.data)
		PROVIDE(edata = ABSOLUTE(.));
	}
	.bss :
	{
		*(.bss)
	}
	PROVIDE(end = ABSOLUTE(.));
	/DISCARD/ :
	{
		*(.comment)
	}
}


path: sys/arch/solbourne/dev/CVS/Entries


code: src/sys/arch/solbourne/dev

path: sys/arch/solbourne/dev/CVS/Repository


code:
/*	$OpenBSD: obio.c,v 1.1 2005/04/20 01:00:16 miod Exp $	*/
/*	OpenBSD: obio.c,v 1.16 2004/09/29 07:35:11 miod Exp 	*/

/*
 * Copyright (c) 1993, 1994 Theo de Raadt
 * Copyright (c) 1995, 1997 Paul Kranenburg
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>

#include <machine/autoconf.h>
#include <machine/cpu.h>
#include <machine/idt.h>

/* autoconfiguration driver */
static int	obiomatch(struct device *, void *, void *);
static void	obioattach(struct device *, struct device *, void *);

int		obioprint(void *, const char *);
int		obio_scan(struct device *, void *, void *);

struct cfattach obio_ca = {
	sizeof(struct device), obiomatch, obioattach
};

struct cfdriver obio_cd = {
	NULL, "obio", DV_DULL
};

/*
 * A list of the on-board devices in the IDT systems. This is better than
 * having people playing with locators in their kernel configuration
 * files, and necessary because the device tree built by the PROM does not
 * list all on-board devices (audio and floppy are missing).
 */
const struct {
	char *devname;
	paddr_t address;
	int	intr;
} obio_devices[] = {
	{ "tod",	TODCLOCK_BASE,	-1 },
	{ "nvram",	NVRAM_BASE,	-1 },
	{ "zs",		ZS0_BASE,	12 },
	{ "zs",		ZS1_BASE,	12 },
	{ "fdc",	FDC_BASE,	11 },
	{ "audioamd",	AUDIO_BASE,	13 },
	{ "wdsc",	SE_BASE + 0x20,	4 },
	{ "le",		SE_BASE + 0x30,	6 },
	{ NULL,		0 }
};

int
obiomatch(parent, vcf, aux)
	struct device *parent;
	void *vcf, *aux;
{
	register struct cfdata *cf = vcf;
	register struct confargs *ca = aux;
	register struct romaux *ra = &ca->ca_ra;

	return (strcmp(cf->cf_driver->cd_name, ra->ra_name) == 0);
}

int
obioprint(args, obio)
	void *args;
	const char *obio;
{
	register struct confargs *ca = args;

	if (ca->ca_ra.ra_name == NULL)
		ca->ca_ra.ra_name = "<unknown>";

	if (obio)
		printf("%s at %s", ca->ca_ra.ra_name, obio);

	printf(" addr %p", ca->ca_ra.ra_paddr);

	return (UNCONF);
}

void
obioattach(parent, self, args)
	struct device *parent, *self;
	void *args;
{
	struct confargs *ca = args;
	struct confargs oca;
	int i;

	if (self->dv_unit > 0) {
		printf(" unsupported\n");
		return;
	}
	printf("\n");

	for (i = 0; obio_devices[i].devname != NULL; i++) {
		/* fake a rom_reg */
		bzero(&oca, sizeof oca);
		oca.ca_ra.ra_paddr = (caddr_t)obio_devices[i].address;
		oca.ca_ra.ra_vaddr = NULL;
		oca.ca_ra.ra_len = 0;
		oca.ca_ra.ra_nreg = 1;
		oca.ca_ra.ra_iospace = 0;
		oca.ca_ra.ra_intr[0].int_pri = obio_devices[i].intr;
		oca.ca_ra.ra_intr[0].int_vec = -1;
		oca.ca_ra.ra_nintr = oca.ca_ra.ra_intr[0].int_pri < 0 ? 0 : 1;
		oca.ca_ra.ra_name = obio_devices[i].devname;
		if (ca->ca_ra.ra_bp != NULL)
			oca.ca_ra.ra_bp = ca->ca_ra.ra_bp + 1;
		else
			oca.ca_ra.ra_bp = NULL;
		oca.ca_bustype = BUS_OBIO;

		config_found(self, &oca, obioprint);
	}
}


code:
/*	$OpenBSD: tod.c,v 1.1 2005/04/20 01:00:16 miod Exp $	*/
/*
 * Copyright (c) 2005, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * TODclock driver. We only use it to know the current time during boot,
 * as we do not get interrupts from it.
 *
 * The clock in the IDT machines is the Oki MSM62X42BRS.
 *
 * A datasheet for this chip is available from:
 *   http://www.datasheetarchive.com/datasheet/pdf/19/196099.html
 */

#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <sys/systm.h>

#include <machine/autoconf.h>
#include <machine/cpu.h>

#include <solbourne/dev/todreg.h>
#include <dev/clock_subr.h>

#include <machine/idt.h>
#include <machine/kap.h>

int	todmatch(struct device *, void *, void *);
void	todattach(struct device *, struct device *, void *);

struct cfattach tod_ca = {
	sizeof(struct device), todmatch, todattach
};

struct cfdriver tod_cd = {
	NULL, "tod", DV_DULL
};

volatile u_char	*tod_regs;

u_char	msm_read(u_int);
void	msm_write(u_int, u_char);

int
todmatch(parent, vcf, aux)
	struct device *parent;
	void *vcf, *aux;
{
	struct confargs *ca = aux;

	return (strcmp(tod_cd.cd_name, ca->ca_ra.ra_name) == 0);
}

void
todattach(parent, self, aux)
	struct device *parent, *self;
	void *aux;
{
	printf(": OKI MSM62X42BRS\n");

	/* the register are already mapped 1:1 by pmap_bootstrap() */
	tod_regs = (volatile u_char *)TODCLOCK_BASE;
}

/*
 * Read or write a register of the Oki clock.
 *
 * The clock registers are not directly accessible (while control registers
 * are). We need to freeze them first. To do so, we set the hold bit in
 * D, and if the busy bit clears, we are free to proceed. If the busy bit
 * is still set, we need to clear the hold bit and retry.
 */
u_char
msm_read(u_int regno)
{
	u_char d, r;

	/* no need to do the hold dance for control registers */
	if (regno >= MSM_D)
		return (tod_regs[regno] & 0x0f);

	d = tod_regs[MSM_D] & 0x0f & ~MSM_D_HOLD;
	for (;;) {
		tod_regs[MSM_D] = d | MSM_D_HOLD;
		if (!ISSET(tod_regs[MSM_D], MSM_D_BUSY))
			break;
		tod_regs[MSM_D] = d;
	}

	r = tod_regs[regno] & 0x0f;
	tod_regs[MSM_D] = d;

	return (r);
}

void
msm_write(u_int regno, u_char value)
{
	u_char d;

	/* no need to do the hold dance for control registers */
	if (regno >= MSM_D) {
		tod_regs[regno] = value;
		return;
	}

	d = tod_regs[MSM_D] & 0x0f & ~MSM_D_HOLD;
	for (;;) {
		tod_regs[MSM_D] = d | MSM_D_HOLD;
		if (!ISSET(tod_regs[MSM_D], MSM_D_BUSY))
			break;
		tod_regs[MSM_D] = d;
	}

	tod_regs[regno] = value;
	tod_regs[MSM_D] = d;
}

void
inittodr(base)
	time_t base;
{
	struct clock_ymdhms dt;

	dt.dt_sec = msm_read(MSM_SEC_UNITS) + 10 * msm_read(MSM_SEC_TENS);
	dt.dt_min = msm_read(MSM_MIN_UNITS) + 10 * msm_read(MSM_MIN_TENS);
#if 0
	dt.dt_hour = msm_read(MSM_HOUR_UNITS) + 10 * msm_read(MSM_HOUR_TENS);
#else
	dt.dt_hour = msm_read(MSM_HOUR_TENS);
	if (dt.dt_hour & MSM_HOUR_PM)
		dt.dt_hour = 12 + 10 * (dt.dt_hour & ~MSM_HOUR_TENS);
	else
		dt.dt_hour *= 10;
	dt.dt_hour += msm_read(MSM_HOUR_UNITS);
#endif
	dt.dt_day = msm_read(MSM_DAY_UNITS) + 10 * msm_read(MSM_DAY_TENS);
	dt.dt_mon = msm_read(MSM_MONTH_UNITS) + 10 * msm_read(MSM_MONTH_TENS);
	dt.dt_year = msm_read(MSM_YEAR_UNITS) + 10 * msm_read(MSM_YEAR_TENS);
	dt.dt_year += CLOCK_YEAR_BASE;
	/* dt_wday left uninitialized */

	time.tv_sec = clock_ymdhms_to_secs(&dt);

	if (time.tv_sec == 0) {
		/*
		 * Believe the time in the file system for lack of
		 * anything better, resetting the clock.
		 */
		if (base < 35 * SECYR) {/* this port did not exist until 2005 */
			/*
			 * If base is 0, assume filesystem time is just unknown
			 * in stead of preposterous. Don't bark.
			 */
			if (base != 0)
				printf("WARNING: preposterous time in file system\n");
			/* not going to use it anyway, if the chip is readable */
			time.tv_sec = 35 * SECYR + 90 * SECDAY + SECDAY / 2;
		} else {
			printf("WARNING: bad date in battery clock");
			time.tv_sec = base;
			resettodr();
		}
	} else {
		int deltat = time.tv_sec - base;

		if (deltat < 0)
			deltat = -deltat;
		if (deltat < 2 * SECDAY)
			return;

#ifndef SMALL_KERNEL
		printf("WARNING: clock %s %d days",
		    time.tv_sec < base ? "lost" : "gained", deltat / SECDAY);
#endif
	}
	printf(" -- CHECK AND RESET THE DATE!\n");
}

void
resettodr()
{
	struct clock_ymdhms dt;

	if (time.tv_sec == 0 || tod_regs == NULL)
		return;

	clock_secs_to_ymdhms(time.tv_sec, &dt);

	/*
	 * Since we don't know if the clock is in AM/PM or 24 hour mode,
	 * we need to reset it and force one mode. Being an evil european
	 * person, I'll force 24 hour mode, of course.
	 */
	msm_write(MSM_F, MSM_F_RESET | MSM_F_24HR);
	msm_write(MSM_F, MSM_F_STOP);	/* leave reset mode, but stop clock */

	dt.dt_year -= CLOCK_YEAR_BASE;
	msm_write(MSM_YEAR_TENS, dt.dt_year / 10);
	msm_write(MSM_YEAR_UNITS, dt.dt_year % 10);
	msm_write(MSM_MONTH_TENS, dt.dt_mon / 10);
	msm_write(MSM_MONTH_UNITS, dt.dt_mon % 10);
	msm_write(MSM_DAY_TENS, dt.dt_day / 10);
	msm_write(MSM_DAY_UNITS, dt.dt_day % 10);
	msm_write(MSM_HOUR_TENS, dt.dt_hour / 10);
	msm_write(MSM_HOUR_UNITS, dt.dt_hour % 10);
	msm_write(MSM_MIN_TENS, dt.dt_min / 10);
	msm_write(MSM_MIN_UNITS, dt.dt_min % 10);
	msm_write(MSM_SEC_TENS, dt.dt_sec / 10);
	msm_write(MSM_SEC_UNITS, dt.dt_sec % 10);

	msm_write(MSM_F, 0);	/* restart clock */
}


code:
/*	$OpenBSD: todreg.h,v 1.1 2005/04/20 01:00:16 miod Exp $	*/
/*
 * Copyright (c) 2005, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Oki MSM62X42BRS registers.
 *
 * A datasheet for this chip is available from:
 *   http://www.datasheetarchive.com/datasheet/pdf/19/196099.html
 */

#define	MSM_REG(x)		((x) << 3)

#define	MSM_SEC_UNITS		MSM_REG(0)	/* seconds, low digit */
#define	MSM_SEC_TENS		MSM_REG(1)	/* seconds, high digit */
#define	MSM_MIN_UNITS		MSM_REG(2)	/* minutes, low digit */
#define	MSM_MIN_TENS		MSM_REG(3)	/* minutes, high digit */
#define	MSM_HOUR_UNITS		MSM_REG(4)	/* hours, low digit */
#define	MSM_HOUR_TENS		MSM_REG(5)	/* hours, high digit */
#define	MSM_HOUR_PM		0x04		/* PM bit if PM mode */
#define	MSM_DAY_UNITS		MSM_REG(6)	/* day, low digit */
#define	MSM_DAY_TENS		MSM_REG(7)	/* day, high digit */
#define	MSM_MONTH_UNITS		MSM_REG(8)	/* month, low digit */
#define	MSM_MONTH_TENS		MSM_REG(9)	/* month, high digit */
#define	MSM_YEAR_UNITS		MSM_REG(10)	/* year, low digit */
#define	MSM_YEAR_TENS		MSM_REG(11)	/* year, high digit */
#define	CLOCK_YEAR_BASE		1968
#define	MSM_DOW			MSM_REG(12)	/* day of week, 0 = sunday */

#define	MSM_D			MSM_REG(13)	/* control register D */
#define	MSM_D_HOLD		0x01	/* hold clock for access */
#define	MSM_D_BUSY		0x02	/* clock is busy */
#define	MSM_D_INTR		0x04	/* interrupt pending */
#define	MSM_D_30		0x08	/* 30 seconds adjustment */

#define	MSM_E			MSM_REG(14)	/* control register E */
#define	MSM_E_MASK		0x01	/* output mask (set to disable) */
#define	MSM_E_INTR		0x02	/* output interrupts (1) or pulse (0) */
#define	MSM_E_PERIOD		0x04	/* interrupt (or pulse) period - needs
					   to be written twice! (2 bits) */
#define	MSM_PERIOD_64HZ		0x00
#define	MSM_PERIOD_1HZ		0x01
#define	MSM_PERIOD_1MIN		0x10
#define	MSM_PERIOD_1HOUR	0x11

#define	MSM_F			MSM_REG(15)	/* control register F */
#define	MSM_F_RESET		0x01	/* reset clock */
#define	MSM_F_STOP		0x02	/* stop clock */
#define	MSM_F_24HR		0x04	/* 24 hour mode (valid on reset only) */
#define	MSM_F_TEST		0x08	/* assert test signal */


code:
/*	$OpenBSD: zsclock.c,v 1.4 2014/11/18 20:51:01 krw Exp $	*/
/*	$NetBSD: clock.c,v 1.11 1995/05/16 07:30:46 phil Exp $	*/

/*-
 * Copyright (c) 1990 The Regents of the University of California.
 * All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * William Jolitz and Don Ahn.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Berkeley and its contributors.
 * 4. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)clock.c	7.2 (Berkeley) 5/12/91
 *
 */

/*
 * Primitive clock interrupt routines.
 *
 * Improved by Phil Budne ... 10/17/94.
 * Pulled over code from i386/isa/clock.c (Matthias Pfaller 12/03/94).
 */

#include <sys/param.h>
#include <sys/time.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <sys/proc.h>
#include <sys/device.h>
#include <sys/conf.h>
#include <sys/ioctl.h>

#include <dev/ic/z8530reg.h>
#include <machine/z8530var.h>

#include <machine/autoconf.h>
#include <machine/cpu.h>

/*
 * Zilog Z8530 Dual UART driver (clock interface)
 */

/* Clock state.  */
struct zsclock_softc {
	struct device zsc_dev;
	struct zs_chanstate *zsc_cs;
};

int	zsclock_match(struct device *, void *, void *);
void	zsclock_attach(struct device *, struct device *, void *);

struct cfattach zsclock_ca = {
	sizeof(struct zsclock_softc), zsclock_match, zsclock_attach
};

struct cfdriver zsclock_cd = {
	NULL, "zsclock", DV_DULL
};

void	zsclock_stint(struct zs_chanstate *, int);

struct zsops zsops_clock = {
	NULL,
	zsclock_stint,
	NULL,
	NULL
};

static int zsclock_attached;

/*
 * clock_match: how is this zs channel configured?
 */
int
zsclock_match(struct device *parent, void *match, void *aux)
{
	struct cfdata *cf = match;
	struct zsc_attach_args *args = aux;

	/* only attach one instance */
	if (zsclock_attached)
		return (0);

	/* make sure we'll win a probe over zstty or zskbd */
	if (cf->cf_loc[ZSCCF_CHANNEL] == args->channel)
		return (2 + 2);

	if (cf->cf_loc[ZSCCF_CHANNEL] == ZSCCF_CHANNEL_DEFAULT)
		return (2 + 1);

	return (0);
}

/*
 * The Solbourne IDT systems provide a 4.9152 MHz clock to the ZS chips.
 */
#define	PCLK	(9600 * 512)	/* PCLK pin input clock rate */

void
zsclock_attach(struct device *parent, struct device *self, void *aux)
{
	struct zsc_softc *zsc = (void *)parent;
	struct zsclock_softc *sc = (void *)self;
	struct zsc_attach_args *args = aux;
	struct zs_chanstate *cs;
	int channel;
	int reset, s, tconst;

	channel = args->channel;

	cs = &zsc->zsc_cs[channel];
	cs->cs_private = zsc;
	cs->cs_ops = &zsops_clock;

	sc->zsc_cs = cs;

	printf("\n");

	hz = 100;
	tconst = ((PCLK / 2) / hz) - 2;

	s = splclock();

	reset = (channel == 0) ?  ZSWR9_A_RESET : ZSWR9_B_RESET;
	zs_write_reg(cs, 9, reset);

	cs->cs_preg[1] = 0;
	cs->cs_preg[3] = ZSWR3_RX_8 | ZSWR3_RX_ENABLE;
	cs->cs_preg[4] = ZSWR4_CLK_X1 | ZSWR4_ONESB | ZSWR4_PARENB;
	cs->cs_preg[5] = ZSWR5_TX_8 | ZSWR5_TX_ENABLE;
	cs->cs_preg[9] = ZSWR9_MASTER_IE;
	cs->cs_preg[10] = 0;
	cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC |
	    ZSWR11_TRXC_OUT_ENA | ZSWR11_TRXC_BAUD;
	cs->cs_preg[12] = tconst;
	cs->cs_preg[13] = tconst >> 8;
	cs->cs_preg[14] = ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA;
	cs->cs_preg[15] = ZSWR15_ZERO_COUNT_IE;

	zs_loadchannelregs(cs);

	splx(s);

	/* enable interrupts */
	cs->cs_preg[1] |= ZSWR1_SIE;
	zs_write_reg(cs, 1, cs->cs_preg[1]);

	zsclock_attached = 1;
}

void
zsclock_stint(struct zs_chanstate *cs, int force)
{
	u_char rr0;

	rr0 = zs_read_csr(cs);
	cs->cs_rr0 = rr0;

	/*
	 * Retrigger the interrupt as a soft interrupt, because we need
	 * a trap frame for hardclock().
	 */
	ienab_bis(IE_L10);

	zs_write_csr(cs, ZSWR0_RESET_STATUS);
}


path: sys/arch/solbourne/include/CVS/Entries


path: sys/arch/solbourne/include/CVS/Tag


code:
/*	$OpenBSD: _float.h,v 1.1 2012/06/26 16:12:45 deraadt Exp $ */

#include <sparc/_float.h>


code:
/*	$OpenBSD: _types.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $	*/

#include <sparc/_types.h>


code:
/* $OpenBSD: asm.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
/* public domain */
#include <sparc/asm.h>


code:
/*	$OpenBSD: atomic.h,v 1.3 2011/03/23 16:54:37 pirofti Exp $	*/

/* Public Domain */

#ifndef _MACHINE_ATOMIC_H_
#define _MACHINE_ATOMIC_H_

#include <sparc/atomic.h>

#endif /* _MACHINE_ATOMIC_H_ */


code:
/*	$OpenBSD: autoconf.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/autoconf.h>


code:
/*	$OpenBSD: bppioctl.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/bppioctl.h>


code:
/*	$OpenBSD: bsd_openprom.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/bsd_openprom.h>


code:
/*	$OpenBSD: bus.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/bus.h>


code:
/*	$OpenBSD: cdefs.h,v 1.3 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/cdefs.h>


code:
/*	$OpenBSD: conf.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/conf.h>


code:
/*	$OpenBSD: cpu.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/cpu.h>


code:
/*	$OpenBSD: ctlreg.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/ctlreg.h>


code:
/*	$OpenBSD: db_machdep.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/db_machdep.h>


code:
/*	$OpenBSD: disklabel.h,v 1.3 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/disklabel.h>


code:
/*	$OpenBSD: eeprom.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/eeprom.h>


code:
/*	$OpenBSD: endian.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/endian.h>


code:
/*	$OpenBSD: exec.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/exec.h>


code:
/*	$OpenBSD: fbvar.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/fbvar.h>


code:
/*	$OpenBSD: fenv.h,v 1.2 2013/06/01 21:20:54 jasper Exp $	*/
/* public domain */
#include <sparc/fenv.h>


code:
/*	$OpenBSD: frame.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/frame.h>


code:
/*	$OpenBSD: fsr.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/fsr.h>


code:
/*	$OpenBSD: idprom.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/idprom.h>


code:
/*	$OpenBSD: idt.h,v 1.3 2013/03/21 02:10:37 deraadt Exp $	*/

/*
 * Copyright (c) 2005, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef	_MACHINE_IDT_H_
#define	_MACHINE_IDT_H_

/*
 * Definitions for the core chips found on the IDT motherboard.
 *
 * All addresses are physical.
 */

/*
 * iGLU: GLUE Logic
 */

#define	GLU_BASE	0x60000000

/* profiling timer (level 14) */
#define	GLU_L14_DIVISOR	0x60000000
#define	GLU_L14_RESOLUTION	(256 / 5)	/* in microseconds */
#define	GLU_L14_ENABLE	0x60000008
#define	GLU_L14_IACK	0x6000000c

/* scheduling timer (level 10) */
#define	GLU_L10_IACK	0x60000800

/* board status register */
#define	GLU_BSR		0x60001800
#define	GBSR_LED_MASK		0x07
#define	GBSR_LED_OFF		00
#define	GBSR_LED_AMBER		02
#define	GBSR_LED_AMBER_BLINK	03
#define	GBSR_LED_GREEN		04
#define	GBSR_LED_GREEN_BLINK	05
#define	GBSR_LED_BOTH_BLINK	07
#define	GBSR_DIAG		0x08
#define	GBSR_WARM		0x10
#define	GBSR_NMI		0x20

/* board diagnostic register */
#define	GLU_DIAG	0x60001808
#define	GD_EXTRA_MEMORY		0x10
#define	GD_36MHZ		0x20
#define	GD_L2_CACHE		0x40

/* interrupt control register */
#define	GLU_ICR		0x60002000
#define	GICR_DISPATCH_MASK	0x0000000f	/* post a software interrupt */
#define	GICR_DISABLE_ALL	0x00000010

/* programmable interrupt levels for sbus and onboard audio */
#define	GLU_SBUS1	0x60002008
#define	GLU_SBUS2	0x60002010
#define	GLU_SBUS3	0x60002018
#define	GLU_SBUS4	0x60002020
#define	GLU_SBUS5	0x60002028
#define	GLU_SBUS6	0x60002030
#define	GLU_SBUS7	0x60002038
#define	GLU_AUDIO	0x60002040

/* reset register */
#define	GLU_RESET	0x60002800

/* programmable base for on-board i/o devices */
#define	GLU_IOBASE	0x60003800

/*
 * iMC: Memory Controller
 */

#define	MC_BASE		0x70000000

#define	MC0_MCR		0x70000001
#define	MC1_MCR		0x71000001	/* may be missing */
#define	MCR_BANK1_AVAIL		0x08
#define	MCR_BANK0_AVAIL		0x04
#define	MCR_BANK1_32M		0x02
#define	MCR_BANK0_32M		0x01

/*
 * iCU: DMA and Interrupt Controller
 */

#define	ICU_BASE	0x50000000

/* interrupt status register */
#define	ICU_ISR		0x50000000
#define	ISR_S0_DMA_SECC		0x00000001
#define	ISR_S0_DMA_MECC		0x00000002
#define	ISR_S0_DMA_SERR		0x00000004
#define	ISR_S1_DMA_SECC		0x00000008
#define	ISR_S1_DMA_MECC		0x00000010
#define	ISR_S1_DMA_SERR		0x00000020
#define	ISR_S2_DMA_SECC		0x00000040
#define	ISR_S2_DMA_MECC		0x00000080
#define	ISR_S2_DMA_SERR		0x00000100
#define	ISR_EN_DMA_SECC		0x00000200
#define	ISR_EN_DMA_MECC		0x00000400
#define	ISR_EN_DMA_SERR		0x00000800
#define	ISR_SCSI_DMA_SECC	0x00001000
#define	ISR_SCSI_DMA_MECC	0x00002000
#define	ISR_SCSI_DMA_SERR	0x00004000
#define	ISR_RIO_NMI_ENABLE	0x00008000
#define	ISR_DMA_NMI_ENABLE	0x00010000
#define	ISR_ICU_INT_ENABLE	0x00020000
#define	ISR_SECC_COUNT		0x003c0000
#define	ISR_SECC_OVERFLOW	0x00400000
#define	ISR_MEMDEC_MISS		0x00800000
#define	ISR_XLAT_INVALID	0x01000000
#define	ISR_WIN_MISS		0x02000000
#define	ISR_FAULT		0x04000000
#define	ISR_S0_RIO_ERR		0x08000000
#define	ISR_S1_RIO_ERR		0x10000000
#define	ISR_S2_RIO_ERR		0x20000000
#define	ISR_EN_RIO_ERR		0x40000000
#define	ISR_RIO_RETRY_TMO	0x80000000

#define	ISR_BITS	"\020" \
	"\01S0_SECC\02S0_MECC\03S0_SERR\04S1_SECC\05S1_MECC\06S1_SERR" \
	"\07S2_SECC\10S2_MECC\11S2_SERR\12EN_SECC\13EN_MECC\14EN_SERR" \
	"\15SCSI_SECC\16SCSSI_MECC\17SCSI_SERR\20RIO_NMIE\21DMA_NMIE\22ICU_IE" \
	"\27SECC_OVERFLOW\30MEMDEC_MISS\31XLAT_INVALID\32WIN_MISS\33FAULT" \
	"\34S0_RIO\35S1_RIO\36S2_RIO\37RIO_TMO"

#define	ICU_TIR		0x50000008

#define	ICU_TER		0x5000000c
#define	TER_S0			0x00000002
#define	TER_S1			0x00000004
#define	TER_S2			0x00000008
#define	TER_ETHERNET		0x00000010
#define	TER_SCSI		0x00000020
#define	TER_IO_DISABLE		0x00000040
#define	TER_W_COMP_DIS		0x00000080

#define	ICU_TWR		0x50000010

#define	ICU_TRR		0x50000014

#define	ICU_CONF	0x50000018
#define	CONF_ECC_ENABLE		0x00000004
#define	CONF_NO_EXTRA_MEMORY	0x00000008
#define	CONF_SBUS_25MHZ		0x00000020
#define	CONF_SLOW_DMA_WRITE	0x00000080
#define	CONF_SLOW_DMA_READ	0x00000100
#define	CONF_ICACHE_DISABLE	0x00000400

/*
 * Onboard devices
 */

#define	SE_BASE		0x40000000	/* scsi and ethernet */
#define	NVRAM_BASE	0x80000000
#define	ZS1_BASE	0x80004000
#define	ZS0_BASE	0x80008000
#define	FDC_BASE	0x8000c000
#define	AUDIO_BASE	0x80010000
#define	TODCLOCK_BASE	0x80014000

/* we map the following range 1:1 in kernel space */
#define	OBIO_PA_START	0x80000000
#define	OBIO_PA_END	0x80018000

#endif	/* _MACHINE_IDT_H_ */


code:
/*	$OpenBSD: ieee.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/ieee.h>


code:
/*	$OpenBSD: ieeefp.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/ieeefp.h>


code:
/*	$OpenBSD: instr.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/instr.h>


code:
/*	$OpenBSD: ioctl_fd.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/ioctl_fd.h>


code:
/*	$OpenBSD: kap.h,v 1.4 2013/03/21 02:10:37 deraadt Exp $	*/

/*
 * Copyright (c) 2005, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_KAP_H_
#define _MACHINE_KAP_H_

/*
 * KAP specific control registers
 */

#ifdef _KERNEL

/* TLB handling - write only */
#define	ASI_GTLB_RANDOM		0xc0	/* random TLB drop-in */
#define	ASI_GTLB_DROPIN		0xc1	/* TLB drop-in */
#define	ASI_GTLB_INVAL_ENTRY	0xc2	/* invalidate entry */
#define	ASI_GTLB_INVAL_PID	0xc3	/* invalidate PID */
#define	ASI_GTLB_INVALIDATE	0xc4	/* invalidate entire TLB */
#define	ASI_ITLB_DROPIN		0xc8	/* iTLB drop-in */

/* TLB position addressing */
#define	TLB_SLOT(x)		((x) << 3)
#define	TLB_INCR		(1 << 3)
#define	GTLB_SLOTS		(128 + 8)	/* XXX unsure */
#define	ITLB_SLOTS		8		/* XXX unsure */

/* data cache handling - read only except ASI_DCACHE_RW */
#define	ASI_DCACHE_FLUSH	0xd0	/* flush dcache block */
#define	ASI_DCACHE_LOOKUP	0xd1	/* check for dcache hit */
#define	ASI_DCACHE_RW		0xd2	/* read/write dcache */
#define	ASI_DCACHE_INVAL	0xd3	/* invalidate dcache */

/* cache line addressing (for D flushes) */
#define	DCACHE_LINE(x)		((x) << 2)
#define	DCACHE_INCR		(1 << 2)
#define	DCACHE_LINES		256

/* bus access - read/write */
#define	ASI_PHYS_IO		0xd4	/* not cached */
#define	ASI_PHYS_CACHED		0xd5	/* cached */
#define	ASI_PHYS_NBW		0xd6	/* non byte writeable shared */
#define	ASI_PHYS_BW		0xd7	/* byte writeable shared */

/* inst cache handling - read only except ASI_ICACHE_RW */
#define	ASI_ICACHE_LOOKUP	0xd9	/* check for icache hit */
#define	ASI_ICACHE_RW		0xda	/* read/write icache */
#define	ASI_ICACHE_INVAL	0xdb	/* invalidate icache */

/* MMU registers */
#define	ASI_MMCR		0xe0	/* control register, rw */
#define	ASI_PDBR		0xe1	/* page directory base address, rw */
#define	ASI_FVAR		0xe2	/* fault va, rw */
#define	ASI_PDER		0xe3	/* page directory entry pointer, ro */
#define	ASI_PTOR		0xe4	/* page table offset, ro */
#define	ASI_FPAR		0xe5	/* fault pa, rw */
#define	ASI_FPSR		0xe6	/* fault ASI, rw */
#define	ASI_PIID		0xe7	/* process ID invalidation, rw */
#define	ASI_PID			0xe8	/* process ID, rw */
#define	ASI_BCR			0xe9	/* bus control, rw */
#define	ASI_FCR			0xea	/* fault cause, rw */
#define	ASI_PTW0		0xeb	/* translation window #0, rw */
#define	ASI_PTW1		0xec	/* translation window #0, rw */
#define	ASI_PTW2		0xed	/* translation window #0, rw */

/* Hardware watchdog */
#define	ASI_WAR0		0xee	/* watchpoint address 0, rw */
#define	ASI_WAR1		0xef	/* watchpoint address 1, rw */
#define	ASI_WCR			0xf0	/* watchpoint control register, rw */

/* MMCR fields */
#define	MMCR_ENABLE		0x00000001	/* MMU enable */
#define	MMCR_MATCH_PTW		0x00000002	/* lookup matches PTW */
#define	MMCR_MATCH_ITLB		0x00000004	/* lookup matches ITLB */
#define	MMCR_MATCH_GTLB		0x00000008	/* lookup matches GTLB */
#define	MMCR_ISET0		0x00000080	/* icache set 0 */
#define	MMCR_ISET1		0x00000100	/* icache set 1 */
#define	MMCR_ISET2		0x00000200	/* icache set 2 */
#define	MMCR_DSET0		0x00000400	/* dcache set 0 */
#define	MMCR_DSET1		0x00000800	/* dcache set 1 */

/* BCR fields */
#define	BCR_FAULT_SYNDROME	0x000000ff	/* ECC syndrome byte */
#define	BCR_ECC			0x00000100	/* ECC enable */
#define	BCR_FAULT_DISABLE	0x00000200	/* disable ECC faults */

/* FCR fields */
#define	FCR_PROTMASK		0x0000000f
#define	FCR_V			0x00000001	/* page not valid */
#define	FCR_RO			0x00000002	/* write access on read only */
#define	FCR_S			0x00000004	/* user access on sup. only */
#define	FCR_EXTERNAL		0x00000100	/* external fault */
#define	FCR_ECC_SINGLE		0x00000200	/* single bit ECC */
#define	FCR_ECC_MULTIPLE	0x00000400	/* multiple bit ECC */

#define	FCR_BITS	"\020\01V\02RO\03S\011EXTERNAL\012ECCS\013ECCM"

/* PTW fields */
#define	PTW_V			0x00000001	/* valid */
#define	PTW_RO			0x00000002	/* read only */
#define	PTW_RW			0x00000000
#define	PTW_S			0x00000004	/* supervisor only */
#define	PTW_CACHEABLE		0x00000008
#define	PTW_BYTE_SHARED		0x00000010
#define	PTW_SHARED		0x00000018
#define	PTW_MASK_MASK		0x0000ff00	/* window address mask */
#define	PTW_MASK_SHIFT		8
#define	PTW_PA_MASK		0x00ff0000	/* physical window */
#define	PTW_PA_SHIFT		16
#define	PTW_VA_MASK		0xff000000	/* virtual window */
#define	PTW_VA_SHIFT		24

#define	PTW_WINDOW_SIZE		0x01000000
#define	PTW_WINDOW_MASK		0xff000000
#define	PTW_WINDOW_SHIFT	24

#define	PTW_TEMPLATE(va,pa,size) \
	(((va) << PTW_VA_SHIFT) | ((pa) << PTW_PA_SHIFT) | \
	 (((~((size) - 1) >> 24) << PTW_MASK_SHIFT) & PTW_MASK_MASK))

/*
 * Initial virtual memory settings
 */

#define	ROM_WINDOW	0x00
#define	PTW0_BASE	(vaddr_t)(ROM_WINDOW << PTW_WINDOW_SHIFT)
#define	PHYSMEM_WINDOW	0xf0
#define	PHYSMEM_BASE	(vaddr_t)(PHYSMEM_WINDOW << PTW_WINDOW_SHIFT)
#define	PTW1_WINDOW	0xfd
#define	PTW1_BASE	(vaddr_t)(PTW1_WINDOW << PTW_WINDOW_SHIFT)
#define	PTW2_WINDOW	0xfe
#define	PTW2_BASE	(vaddr_t)(PTW2_WINDOW << PTW_WINDOW_SHIFT)
#define	PTW0_DEFAULT	\
	PTW_TEMPLATE(ROM_WINDOW, ROM_WINDOW, 0x10000000) | PTW_S | PTW_V
#define	PTW1_DEFAULT	PTW_CACHEABLE | \
	PTW_TEMPLATE(PTW1_WINDOW, PHYSMEM_WINDOW, 0x01000000) | PTW_S | PTW_V
#define	PTW2_DEFAULT	PTW_SHARED | \
	PTW_TEMPLATE(PTW2_WINDOW, PHYSMEM_WINDOW, 0x01000000) | PTW_S | PTW_V

#define	PTW0_TO_PHYS(va)	(paddr_t)(va)
#define	PTW1_TO_PHYS(va)	(paddr_t)((va) - PTW1_BASE + PHYSMEM_BASE)
#define	PTW2_TO_PHYS(va)	(paddr_t)((va) - PTW2_BASE + PHYSMEM_BASE)

#define	PHYS_TO_PTW0(pa)	(vaddr_t)(pa)
#define	PHYS_TO_PTW1(pa)	(vaddr_t)((pa) - PHYSMEM_BASE + PTW1_BASE)
#define	PHYS_TO_PTW2(pa)	(vaddr_t)((pa) - PHYSMEM_BASE + PTW2_BASE)

#endif	/* _KERNEL */

#endif /* _MACHINE_KAP_H_ */


code:
/*	$OpenBSD: kcore.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/kcore.h>


code:
/*	$OpenBSD: limits.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/limits.h>


code:
/*	$OpenBSD: lock.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/lock.h>


code:
/*	$OpenBSD: mutex.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/mutex.h>


code:
/*	$OpenBSD: oldmon.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/oldmon.h>


code:
/*	$OpenBSD: openpromio.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/openpromio.h>


code:
/*	$OpenBSD: param.h,v 1.14 2013/11/20 23:57:07 miod Exp $	*/

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

#ifndef	_MACHINE_PARAM_H_
#define	_MACHINE_PARAM_H_

#ifdef _KERNEL				/* XXX */
#ifndef _LOCORE				/* XXX */
#include <machine/cpu.h>		/* XXX */
#endif					/* XXX */
#endif					/* XXX */

#define	_MACHINE	solbourne
#define	MACHINE		"solbourne"
#define	_MACHINE_ARCH	sparc
#define	MACHINE_ARCH	"sparc"
#define	MID_MACHINE	MID_SPARC

#define SUN4_PGSHIFT	13			/* for a sun4 machine */
#define	SUN4CM_PGSHIFT	12			/* for a sun4c or sun4m machine */
#define	PAGE_SHIFT	SUN4_PGSHIFT
#define	PAGE_SIZE	(1 << PAGE_SHIFT)
#define	PAGE_MASK	(PAGE_SIZE - 1)

#define	KERNBASE	0xfd080000

#ifdef _KERNEL

#define	KERNTEXTOFF	0xfd084000	/* start of kernel text */
#define	MSGBUF_PA	PTW1_TO_PHYS(KERNBASE)	/* msgbuf physical address */

#define	NBPG		PAGE_SIZE		/* bytes/page */
#define	PGSHIFT		PAGE_SHIFT		/* LOG2(PAGE_SIZE) */
#define	PGOFSET		PAGE_MASK		/* byte offset into page */

#define UPAGES		1
#define	USPACE		8192		/* total size of u-area */
#define	USPACE_ALIGN	0		/* u-area alignment 0-none */

#define	NMBCLUSTERS	2048		/* map size, max cluster allocation */

#define	MSGBUFSIZE	(1 * PAGE_SIZE)		/* larger than on sparc! */

/*
 * Maximum size of the kernel malloc arena in PAGE_SIZE-sized
 * logical pages.
 */
#define	NKMEMPAGES_MAX_DEFAULT	((64 * 1024 * 1024) >> PAGE_SHIFT)

/*
 * dvmamap manages a range of DVMA addresses intended to create double
 * mappings of physical memory. In a way, `dvmamap' is a submap of the
 * VM map `phys_map'. The difference is the use of the `extent'
 * routines to manage page allocation, allowing DVMA addresses to be
 * allocated and freed from within interrupt routines.
 *
 * Note that `phys_map' can still be used to allocate memory-backed pages
 * in DVMA space.
 */
#ifndef _LOCORE
extern vaddr_t		dvma_base;
extern vaddr_t		dvma_end;
extern struct extent	*dvmamap_extent;

extern caddr_t	kdvma_mapin(caddr_t, int, int);
extern caddr_t	dvma_malloc_space(size_t, void *, int, int);
extern void	dvma_free(caddr_t, size_t, void *);
#define		dvma_malloc(len,kaddr,flags)	dvma_malloc_space(len,kaddr,flags,0)

extern void	delay(unsigned int);
#define	DELAY(n)	delay(n)

extern int cputyp;

#endif /* _LOCORE */

/*
 * Values for the cputyp variable.
 */
#define	CPU_KAP		5

/*
 * Shorthand CPU-type macros.
 * Let compiler optimize away code conditional on constants.
 */
#define CPU_ISSUN4M	(0)
#define CPU_ISSUN4C	(0)
#define CPU_ISSUN4	(0)
#define CPU_ISSUN4OR4C	(0)
#define CPU_ISSUN4COR4M	(0)
#define	CPU_ISKAP	(1)

#endif /* _KERNEL */

#endif /* _MACHINE_PARAM_H_ */


code:
/*	$OpenBSD: pcb.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/pcb.h>


code:
/*	$OpenBSD: pmap.h,v 1.10 2015/02/15 21:34:33 miod Exp $	*/

/*
 * Copyright (c) 2005, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef	_MACHINE_PMAP_H_
#define _MACHINE_PMAP_H_

#include <machine/pte.h>

/*
 * PMAP structure
 */
struct pmap {
	pd_entry_t		*pm_segtab;	/* first level table */
	paddr_t			pm_psegtab;	/* pa of above */

	int			pm_refcount;	/* reference count */
	struct pmap_statistics	pm_stats;	/* pmap statistics */
};

typedef struct pmap *pmap_t;

/*
 * Extra constants passed in the low bits of pa in pmap_enter() to
 * request specific memory attributes.
 */

#define	PMAP_NC		1
#define	PMAP_OBIO	PMAP_NC
#define	PMAP_BWS	2

/*
 * Macro to pass iospace bits in the low bits of pa in pmap_enter().
 * Provided for source code compatibility - we don't need such bits.
 */

#define	PMAP_IOENC(x)	0

#ifdef _KERNEL

extern struct pmap kernel_pmap_store;

#define	kvm_recache(addr, npages) 	kvm_setcache(addr, npages, 1)
#define	kvm_uncache(addr, npages) 	kvm_setcache(addr, npages, 0)
#define	pmap_copy(a,b,c,d,e)		do { /* nothing */ } while (0)
#define	pmap_deactivate(p)		do { /* nothing */ } while (0)
#define	pmap_kernel()			(&kernel_pmap_store)
#define	pmap_resident_count(p)		((p)->pm_stats.resident_count)
#define	pmap_update(p)			do { /* nothing */ } while (0)
#define	pmap_wired_count(p)		((p)->pm_stats.wired_count)
#define	pmap_remove_holes(vm)		do { /* nothing */ } while (0)

#define PMAP_PREFER(fo, ap)		pmap_prefer((fo), (ap))

struct proc;
void		kvm_setcache(caddr_t, int, int);
void		switchexit(struct proc *);		/* locore.s */
void		pmap_bootstrap(size_t);
void		pmap_cache_enable(void);
void		pmap_changeprot(pmap_t, vaddr_t, vm_prot_t, int);
vaddr_t		pmap_map(vaddr_t, paddr_t, paddr_t, int);
int		pmap_pa_exists(paddr_t);
vaddr_t		pmap_prefer(vaddr_t, vaddr_t);
void		pmap_release(pmap_t);
void		pmap_redzone(void);
void		pmap_virtual_space(vaddr_t *, vaddr_t *);
void		pmap_writetext(unsigned char *, int);

#endif /* _KERNEL */

struct pvlist {
	struct		pvlist *pv_next;	/* next pvlist, if any */
	struct		pmap *pv_pmap;		/* pmap of this va */
	vaddr_t		pv_va;			/* virtual address */
	int		pv_flags;		/* flags (below) */
};

struct vm_page_md {
	struct pvlist pv_head;
};

#define VM_MDPAGE_INIT(pg) do {			\
	(pg)->mdpage.pv_head.pv_next = NULL;	\
	(pg)->mdpage.pv_head.pv_pmap = NULL;	\
	(pg)->mdpage.pv_head.pv_va = 0;		\
	(pg)->mdpage.pv_head.pv_flags = 0;	\
} while (0)

#endif /* _MACHINE_PMAP_H_ */


code:
/*	$OpenBSD: proc.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/proc.h>


code:
/*	$OpenBSD: profile.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/profile.h>


code:
/*	$OpenBSD: prom.h,v 1.3 2013/03/21 02:10:37 deraadt Exp $	*/

/*
 * Copyright (c) 2005, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef	_MACHINE_PROM_H_
#define	_MACHINE_PROM_H_

/*
 * The following describes the PROM communication structure,
 * which appears at the beginning of physical memory.
 */

#define	PROM_CODE_PA		0x00000000
#define	PROM_CODE_VA		PTW0_BASE
#define	PROM_DATA_PA		PHYSMEM_BASE
#define	PROM_DATA_VA		PTW1_BASE

struct sb_prom {
	int	sp_interface;			/* interface version */
	int	(*sp_interp)(const char *);	/* prom commands */
	char	sp_version[128];		/* prom version */
	int	(*sp_eval)(const char *);	/* forth commands */
	int	sp_ramdisk;			/* ramdisk size if any in MB */
	int	sp_promend;			/* first available va */
	int	sp_memsize;			/* memory size in pages... */
	int	sp_memsize_mb;			/* ...and in MB */
	int	sp_reserve_start;		/* reserved area (in pages) */
	int	sp_reserve_len;			/* and length (in pages) */
	vaddr_t	sp_msgbufp;			/* PROM msgbuf pointer */
	int	sp_sash_usrtrap;
	int	sp_rootnode;
	int	sp_validregs;			/* nonzero if registers... */
	int	sp_regs[100];			/* ...array is valid */
	int	sp_revision;			/* prom revision */
};

#define	PROM_INTERFACE		4

/*
 * Reset strings
 */

#define	PROM_RESET_COLD		"cold"
#define	PROM_RESET_WARM		"warm"
#define	PROM_RESET_HALT		"halt"

/*
 * Environment variables (all upper-case)
 */

#define	ENV_ETHERADDR		"ENETADDR"
#define	ENV_INPUTDEVICE		"INPUT-DEVICE"
#define	ENV_MODEL		"MODEL"
#define	ENV_OUTPUTDEVICE	"OUTPUT-DEVICE"
#define	ENV_TTYA		"TTYA_MODE"
#define	ENV_TTYB		"TTYB_MODE"

/*
 * Node structures
 */

struct prom_node {
	int	pn_sibling;
	int	pn_child;
	vaddr_t	pn_props;
	char	*pn_name;
};

struct prom_prop {
	struct prom_prop *pp_next;
	size_t	pp_size;
	char	pp_data[0];
};

/*
 * System model
 */

extern int sysmodel;

#define	SYS_S4000	0xf4
#define	SYS_S4100	0xf5

const char *prom_getenv(const char *);

#endif	/* _MACHINE_PROM_H_ */


code:
/*	$OpenBSD: psl.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/psl.h>


code:
/*	$OpenBSD: pte.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $	*/

/*
 * Copyright (c) 2005, Miodrag Vallat
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * KAP page table entries.
 *
 * Ref/Mod bits are handled in software.
 */

/*
 * First-level : Page Directory Tables (topmost 9 bits of a va)
 *
 * Page directory entries contain both the pa and the va of the page
 * tables they point to.
 */

#define	PDT_INDEX_SIZE		9
#define	PDT_INDEX_SHIFT		23
#define	PDT_INDEX_MASK		0xff800000

/*
 * Second-level: Page Table Entries (middle 10 bits of a va)
 */

#define	PT_INDEX_SIZE		10
#define	PT_INDEX_SHIFT		13
#define	PT_INDEX_MASK		0x007fe000

#define	PG_V			0x00000001
#define	PG_NV			0x00000000
#define	PG_RO			0x00000002	/* read only */
#define	PG_RW			0x00000000
#define	PG_PROT			(PG_RO | PG_S)
#define	PG_S			0x00000004	/* supervisor only */
#define	PG_MA			0x00000018	/* memory attributes mask */
#define	PG_G			0x00000020	/* global */
/* software bits from now on... */
#define	PG_W			0x00000040	/* wired */
#define	PG_M			0x00000080	/* modified */
#define	PG_U			0x00000100	/* referenced */
			/*	0x00001e00	unused */
#define	PG_FRAME		0xffffe000	/* PFN mask */

/* memory attributes */
#define	PG_IO			0x00000000	/* not cached */
#define	PG_CACHE		0x00000008	/* cached */
#define	PG_BYTE_SHARED		0x00000010	/* byte-writeable shared */
#define	PG_SHARED		0x00000018	/* non byte-writeable shared */

/*
 * Page directory constants
 */

#define	PDT_SIZE		4096	/* size of a page directory table */
#define	PT_SIZE			4096	/* size of a page table */

#define	NBR_PDE			(PDT_SIZE / 8)
#define	NBR_PTE			(PT_SIZE / 4)

#define	NBSEG			(1 << PDT_INDEX_SHIFT)

#if !defined(_LOCORE)

typedef	u_int32_t	pt_entry_t;

typedef struct {
	u_int32_t	pde_pa;
	pt_entry_t*	pde_va;
} pd_entry_t;

#endif


code:
/*	$OpenBSD: ptrace.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/ptrace.h>


code:
/* $OpenBSD: reg.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/reg.h>


code:
/* $OpenBSD: reloc.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/reloc.h>


code:
/* $OpenBSD: setjmp.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/setjmp.h>


code:
/* $OpenBSD: signal.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/signal.h>


code:
/*	$OpenBSD: spinlock.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/spinlock.h>


code:
/*	$OpenBSD: stdarg.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/stdarg.h>


code:
/*	$OpenBSD: sun_disklabel.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/sun_disklabel.h>


code:
/*	$OpenBSD: tcb.h,v 1.2 2013/06/01 21:20:54 jasper Exp $	*/
/* public domain */
#include <sparc/tcb.h>


code:
/*	$OpenBSD: trap.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/trap.h>


code:
/*	$OpenBSD: varargs.h,v 1.2 2013/03/21 02:10:37 deraadt Exp $ */

#include <sparc/varargs.h>


code:
/*	$OpenBSD: vmparam.h,v 1.4 2013/03/21 02:10:37 deraadt Exp $ */
/* public domain */

#ifndef _MACHINE_VMPARAM_H_
#define _MACHINE_VMPARAM_H_

#include <sparc/vmparam.h>

/*
 * User/kernel map constants. We slightly differ from sparc here.
 */
#undef	VM_MIN_KERNEL_ADDRESS
#define	VM_MIN_KERNEL_ADDRESS	((vaddr_t)0xf8000000)
#undef	VM_MAX_KERNEL_ADDRESS
#define VM_MAX_KERNEL_ADDRESS	((vaddr_t)0xfd000000)

#undef	IOSPACE_BASE
#define	IOSPACE_BASE		((vaddr_t)0xff000000)
#undef	IOSPACE_LEN
#define	IOSPACE_LEN		0x00f00000		/* 15 MB of iospace */

#undef	VM_PHYSSEG_MAX
#define	VM_PHYSSEG_MAX		2
#undef	VM_PHYSSEG_STRAT
#define	VM_PHYSSEG_STRAT	VM_PSTRAT_BIGFIRST

#endif /* _MACHINE_VMPARAM_H_ */


path: sys/arch/solbourne/solbourne/CVS/Tag


code:
/*	$OpenBSD: autoconf.c,v 1.12 2010/11/18 21:13:19 miod Exp $	*/
/*	OpenBSD: autoconf.c,v 1.64 2005/03/23 17:10:24 miod Exp 	*/

/*
 * Copyright (c) 1996
 *    The President and Fellows of Harvard College. All rights reserved.
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by Harvard University.
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)autoconf.c	8.4 (Berkeley) 10/1/93
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/disklabel.h>
#include <sys/device.h>
#include <sys/disk.h>
#include <sys/conf.h>
#include <sys/reboot.h>
#include <sys/socket.h>
#include <sys/malloc.h>
#include <sys/queue.h>

#include <net/if.h>

#include <dev/cons.h>

#include <uvm/uvm_extern.h>

#include <machine/autoconf.h>
#include <machine/bsd_openprom.h>
#include <machine/cpu.h>
#include <machine/ctlreg.h>
#include <machine/pmap.h>
#include <sparc/sparc/asm.h>
#include <sparc/sparc/cpuvar.h>
#include <sparc/sparc/timerreg.h>

#ifdef DDB
#include <machine/db_machdep.h>
#include <ddb/db_sym.h>
#include <ddb/db_extern.h>
#endif

#include <machine/idt.h>
#include <machine/kap.h>
#include <machine/prom.h>

/*
 * The following several variables are related to
 * the configuration process, and are used in initializing
 * the machine.
 */
int	fbnode;		/* node ID of ROM's console frame buffer */

#ifdef KGDB
extern	int kgdb_debug_panic;
#endif

static	int mbprint(void *, const char *);
void	sync_crash(void);
int	mainbus_match(struct device *, void *, void *);
static	void mainbus_attach(struct device *, struct device *, void *);

struct	bootpath bootpath[8];
int	nbootpath;
static	void bootpath_build(void);
char	mainbus_model[30];

u_int	prom_argc;
char  **prom_argv;
char  **prom_environ;
vaddr_t	prom_data;

/*
 * locore.s code calls bootstrap() just before calling main(), after double
 * mapping the kernel to high memory and setting up the trap base register.
 * We must finish mapping the kernel properly and glean any bootstrap info.
 */
void
bootstrap()
{
	char **old_argv, **old_environ;
	u_int i, nenv;
	size_t asize;
	char *dst;

	bzero(&cpuinfo, sizeof(struct cpu_softc));
	cpuinfo.master = 1;
	getcpuinfo(&cpuinfo, 0);

	/*
	 * Compute how much memory is used by the PROM arguments.
	 */
	asize = prom_argc * sizeof(const char *);
	for (i = 0; i < prom_argc; i++)
		asize += 1 + strlen(prom_argv[i]);
	asize = roundup(asize, 4);

	for (nenv = 0; prom_environ[nenv] != NULL; nenv++)
		asize += 1 + strlen(prom_environ[i]);
	asize = roundup(asize, 4);
	asize += (1 + nenv) * sizeof(const char *);

	/*
	 * Setup the initial mappings.
	 */
	pmap_bootstrap(asize);

	/*
	 * Now that we have allocated memory for the commandline arguments
	 * and the environment, save them.
	 */
	old_argv = prom_argv;
	prom_argv = (char **)prom_data;
	dst = (char *)(prom_data + prom_argc * sizeof(char *));
	for (i = 0; i < prom_argc; i++) {
		prom_argv[i] = dst;
		asize = 1 + strlen(old_argv[i]);
		bcopy(old_argv[i], dst, asize);
		dst += asize;
	}
	old_environ = prom_environ;
	prom_environ = (char **)roundup((vaddr_t)dst, 4);
	dst = (char *)((vaddr_t)prom_environ + (1 + nenv) * sizeof(char *));
	for (i = 0; i < nenv; i++) {
		prom_environ[i] = dst;
		asize = 1 + strlen(old_environ[i]);
		bcopy(old_environ[i], dst, asize);
		dst += asize;
	}
	prom_environ[nenv] = NULL;

	/* Moved zs_kgdb_init() to zs.c:consinit() */
#ifdef DDB
	db_machine_init();
	ddb_init();
#endif
}

/*
 * bootpath_build: build a bootpath. Used when booting a generic
 * kernel to find our root device.  Newer proms give us a bootpath,
 * for older proms we have to create one.  An element in a bootpath
 * has 4 fields: name (device name), val[0], val[1], and val[2]. Note that:
 * Interpretation of val[] is device-dependent. Some examples:
 *
 * if (val[0] == -1) {
 *	val[1] is a unit number    (happens most often with old proms)
 * } else {
 *	[sbus device] val[0] is a sbus slot, and val[1] is an sbus offset
 *	[scsi disk] val[0] is target, val[1] is lun, val[2] is partition
 *	[scsi tape] val[0] is target, val[1] is lun, val[2] is file #
 * }
 *
 */

static void
bootpath_build()
{
	u_int i;
	char *cp;

/* XXX needs a rewrite for S4000 - we do not need to do things that way */

	bzero(bootpath, sizeof(bootpath));

	/*
	 * The boot path is contained in argv[0] only.
	 * It has the form:
	 * [subdevice.]device([[ctrl],[unit],[partition]])[/]path
	 */

	printf("bootpath: %s\n", prom_argv[0]);

	/*
	 * Remaining arguments are interpreted as options, with or without
	 * leading dashes.
	 */
	for (i = 1; i < prom_argc; i++) {
		for (cp = prom_argv[i]; *cp != '\0'; cp++)
			switch (*cp) {
			case 'a':
				boothowto |= RB_ASKNAME;
				break;

			case 'c':
				boothowto |= RB_CONFIG;
				break;

#ifdef DDB
			case 'd':
				Debugger();
				break;
#endif

			case 's':
				boothowto |= RB_SINGLE;
				break;
			}
	}
}

/*
 * save or read a bootpath pointer from the boothpath store.
 *
 * XXX. required because of SCSI... we don't have control over the "sd"
 * device, so we can't set boot device there.   we patch in with
 * device_register(), and use this to recover the bootpath.
 */

struct bootpath *
bootpath_store(storep, bp)
	int storep;
	struct bootpath *bp;
{
	static struct bootpath *save;
	struct bootpath *retval;

	retval = save;
	if (storep)
		save = bp;

	return (retval);
}

/*
 * Determine mass storage and memory configuration for a machine.
 * We get the PROM's root device and make sure we understand it, then
 * attach it as `mainbus0'.  We also set up to handle the PROM `sync'
 * command.
 */
void
cpu_configure()
{
	struct confargs oca;
	register int node = 0;
	register char *cp;
	int s;
	extern struct user *proc0paddr;

	/* build the bootpath */
	bootpath_build();

	if (boothowto & RB_CONFIG) {
#ifdef BOOT_CONFIG
		user_config();
#else
		printf("kernel does not support -c; continuing..\n");
#endif
	}

	node = findroot();

	oca.ca_ra.ra_node = node;
	oca.ca_ra.ra_name = cp = "mainbus";
	if (config_rootfound(cp, (void *)&oca) == NULL)
		panic("mainbus not configured");

	/* Enable device interrupts */
	sta(GLU_ICR, ASI_PHYS_IO,
	    ((lda(GLU_ICR, ASI_PHYS_IO) >> 24) & ~GICR_DISABLE_ALL) << 24);
	(void)spl0();

	cold = 0;

	/*
	 * Re-zero proc0's user area, to nullify the effect of the
	 * stack running into it during auto-configuration.
	 * XXX - should fix stack usage.
	 */
	s = splhigh();
	bzero(proc0paddr, sizeof(struct user));

	pmap_redzone();
	splx(s);
}

void
diskconf(void)
{
	struct bootpath *bp;
	struct device *bootdv;
	int bootpart;

	/*
	 * Configure swap area and related system
	 * parameter based on device(s) used.
	 */
	bp = nbootpath == 0 ? NULL : &bootpath[nbootpath-1];
	bootdv = (bp == NULL) ? NULL : bp->dev;
	bootpart = (bp == NULL) ? 0 : bp->val[2];

	setroot(bootdv, bootpart, RB_USERREQ | RB_HALT);
	dumpconf();
}

/*
 * Console `sync' command.  SunOS just does a `panic: zero' so I guess
 * no one really wants anything fancy...
 */
void
sync_crash()
{

	panic("PROM sync command");
}

char *
clockfreq(freq)
	register int freq;
{
	register char *p;
	static char buf[10];

	freq /= 1000;
	snprintf(buf, sizeof buf, "%d", freq / 1000);
	freq %= 1000;
	if (freq) {
		freq += 1000;	/* now in 1000..1999 */
		p = buf + strlen(buf);
		snprintf(p, buf + sizeof buf - p, "%d", freq);
		*p = '.';	/* now buf = %d.%3d */
	}
	return (buf);
}

/* ARGSUSED */
static int
mbprint(aux, name)
	void *aux;
	const char *name;
{
	register struct confargs *ca = aux;

	if (name)
		printf("%s at %s", ca->ca_ra.ra_name, name);
	if (ca->ca_ra.ra_paddr)
		printf(" %saddr 0x%x", ca->ca_ra.ra_iospace ? "io" : "",
		    (int)ca->ca_ra.ra_paddr);
	return (UNCONF);
}

/*
 * Given a `first child' node number, locate the node with the given name.
 * Return the node number, or 0 if not found.
 */
int
findnode(first, name)
	int first;
	register const char *name;
{
	register int node;

	for (node = first; node; node = nextsibling(node))
		if (strcmp(getpropstring(node, "name"), name) == 0)
			return (node);
	return (0);
}

int
mainbus_match(parent, self, aux)
	struct device *parent;
	void *self;
	void *aux;
{
	struct cfdata *cf = self;
	register struct confargs *ca = aux;
	register struct romaux *ra = &ca->ca_ra;

	return (strcmp(cf->cf_driver->cd_name, ra->ra_name) == 0);
}

/*
 * Attach the mainbus.
 *
 * Our main job is to attach the CPU (the root node we got in cpu_configure())
 * and iterate down the list of `mainbus devices' (children of that node).
 * We also record the `node id' of the default frame buffer, if any.
 */
static void
mainbus_attach(parent, dev, aux)
	struct device *parent, *dev;
	void *aux;
{
	struct confargs oca;
	struct confargs *ca = aux;
	int node0;
	const char *model;

	node0 = ca->ca_ra.ra_node;	/* i.e., the root node */

	model = getpropstring(node0, "model");
	if (model == NULL)
		model = sysmodel == SYS_S4000 ? "S4000" : "S4100";
	strlcpy(mainbus_model, model, sizeof mainbus_model);
	printf(": %s\n", mainbus_model);

	/*
	 * Locate and configure the ``early'' devices.  These must be
	 * configured before we can do the rest.  For instance, the
	 * EEPROM contains the Ethernet address for the LANCE chip.
	 * If the device cannot be located or configured, panic.
	 */

	/* Configure the CPU. */
	bzero(&oca, sizeof(oca));
	oca.ca_bustype = BUS_MAIN;
	oca.ca_ra.ra_node = node0;
	oca.ca_ra.ra_name = "cpu";
	(void)config_found(dev, (void *)&oca, mbprint);

	/*
	 * XXX we don't support frame buffers, yet
	 */
	fbnode = 0;

	bzero(&oca, sizeof(oca));
	oca.ca_bustype = BUS_MAIN;
	oca.ca_ra.ra_node = node0;
	oca.ca_ra.ra_name = "obio";
	(void)config_found(dev, (void *)&oca, mbprint);
}

struct cfattach mainbus_ca = {
	sizeof(struct device), mainbus_match, mainbus_attach
};

struct cfdriver mainbus_cd = {
	NULL, "mainbus", DV_DULL
};

/*
 * findzs() is called from the zs driver (which is, at least in theory,
 * generic to any machine with a Zilog ZSCC chip).  It should return the
 * address of the corresponding zs channel.  It may not fail, and it
 * may be called before the VM code can be used.  Here we count on the
 * FORTH PROM to map in the required zs chips.
 */
void *
findzs(zs)
	int zs;
{

	if (CPU_ISKAP) {
		struct rom_reg rr;
		register void *vaddr;

		switch (zs) {
		case 0:
			rr.rr_paddr = (void *)ZS0_BASE;
			break;
		case 1:
			rr.rr_paddr = (void *)ZS1_BASE;
			break;
		default:
			panic("findzs: unknown zs device %d", zs);
		}

		rr.rr_iospace = PMAP_OBIO;
		rr.rr_len = PAGE_SIZE;
		vaddr = mapiodev(&rr, 0, PAGE_SIZE);
		if (vaddr != NULL)
			return (vaddr);
	}

	panic("findzs: cannot find zs%d", zs);
	/* NOTREACHED */
}

/*
 * Return a string property.  There is a (small) limit on the length;
 * the string is fetched into a static buffer which is overwritten on
 * subsequent calls.
 */
char *
getpropstring(node, name)
	int node;
	char *name;
{
	register int len;
	static char stringbuf[32];

	len = getprop(node, name, (void *)stringbuf, sizeof stringbuf - 1);
	if (len == -1)
		len = 0;
	stringbuf[len] = '\0';	/* usually unnecessary */
	return (stringbuf);
}

/*
 * Fetch an integer (or pointer) property.
 * The return value is the property, or the default if there was none.
 */
int
getpropint(node, name, deflt)
	int node;
	char *name;
	int deflt;
{
	register int len;
	char intbuf[16];

	len = getprop(node, name, (void *)intbuf, sizeof intbuf);
	if (len != 4)
		return (deflt);
	return (*(int *)intbuf);
}

int
node_has_property(node, prop)	/* returns 1 if node has given property */
	register int node;
	register const char *prop;
{

	return (getproplen(node, (char *)prop) != -1);
}

void
callrom()
{

#ifdef notyet
	promvec->pv_abort();
#endif
}

/*
 * find a device matching "name" and unit number
 */
struct device *
getdevunit(name, unit)
	char *name;
	int unit;
{
	struct device *dev = TAILQ_FIRST(&alldevs);
	char num[10], fullname[16];
	int lunit;

	/* compute length of name and decimal expansion of unit number */
	snprintf(num, sizeof num, "%d", unit);
	lunit = strlen(num);
	if (strlen(name) + lunit >= sizeof(fullname) - 1)
		panic("config_attach: device name too long");

	strlcpy(fullname, name, sizeof fullname);
	strlcat(fullname, num, sizeof fullname);

	while (strcmp(dev->dv_xname, fullname) != 0) {
		if ((dev = TAILQ_NEXT(dev, dv_list)) == NULL)
			return NULL;
	}
	return dev;
}

void
device_register(struct device *dev, void *aux)
{
}

struct nam2blk nam2blk[] = {
	{ "sd",		 7 },
	{ "st",		11 },
	{ "fd",		16 },
	{ "rd",		17 },
	{ "cd",		18 },
	{ NULL,		-1 }
};


code:
/*	$OpenBSD: clock.c,v 1.1 2005/04/19 21:30:18 miod Exp $	*/
/*	OpenBSD: clock.c,v 1.19 2004/04/08 01:11:21 deraadt Exp 	*/

/*
 * Copyright (c) 1992, 1993
 *	The Regents of the University of California.  All rights reserved.
 * Copyright (c) 1994 Gordon W. Ross
 * Copyright (c) 1993 Adam Glass
 * Copyright (c) 1996 Paul Kranenburg
 * Copyright (c) 1996
 * 	The President and Fellows of Harvard College. All rights reserved.
 *
 * This software was developed by the Computer Systems Engineering group
 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
 * contributed to Berkeley.
 *
 * All advertising materials mentioning features or use of this software
 * must display the following acknowledgement:
 *	This product includes software developed by Harvard University.
 *	This product includes software developed by the University of
 *	California, Lawrence Berkeley Laboratory.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Berkeley and its contributors.
 *	This product includes software developed by Paul Kranenburg.
 *	This product includes software developed by Harvard University.
 * 4. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)clock.c	8.1 (Berkeley) 6/11/93
 *
 */

/*
 * Clock driver.  This is the id prom and eeprom driver as well
 * and includes the timer register functions too.
 */

#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <sys/systm.h>

#include <uvm/uvm_extern.h>

#include <machine/autoconf.h>
#include <machine/cpu.h>

#include <sparc/sparc/asm.h>
#include <machine/idt.h>
#include <machine/kap.h>

/*
 * Statistics clock interval and variance, in usec.  Variance must be a
 * power of two.  Since this gives us an even number, not an odd number,
 * we discard one case and compensate.  That is, a variance of 1024 would
 * give us offsets in [0..1023].  Instead, we take offsets in [1..1023].
 * This is symmetric about the point 512, or statvar/2, and thus averages
 * to that value (assuming uniform random numbers).
 */
/* XXX fix comment to match value */
int statvar = 8192;
int statmin;			/* statclock interval - 1/2*variance */

int timerblurb = 10; /* Guess a value; used before clock is attached */

/*
 * Set up the real-time and statistics clocks.  Leave stathz 0 only if
 * no alternative timer is available.
 *
 * The frequencies of these clocks must be an even number of microseconds.
 */
void
cpu_initclocks()
{
	profhz = hz;
	tick = 1000000 / hz;
}

/*
 * Dummy setstatclockrate(), since we know profhz==hz.
 */
/* ARGSUSED */
void
setstatclockrate(newhz)
	int newhz;
{
	/* nothing */
}

/*
 * Level 10 (clock) interrupts.
 */
int
clockintr(cap)
	void *cap;
{
	hardclock((struct clockframe *)cap);

	return (1);
}

/*
 * Level 14 (stat clock) interrupt handler.
 */
int
statintr(cap)
	void *cap;
{
#if 1
	panic("level 14 interrupt");
#else
	statclock((struct clockframe *)cap);
#endif

	return (1);
}

/*
 * Return the best possible estimate of the time in the timeval
 * to which tvp points.  We do this by returning the current time
 * plus the amount of time since the last clock interrupt.
 *
 * Check that this time is no less than any previously-reported time,
 * which could happen around the time of a clock adjustment.  Just for
 * fun, we guarantee that the time will be greater than the value
 * obtained by a previous call.
 */
void
microtime(tvp)
	struct timeval *tvp;
{
	int s;
	static struct timeval lasttime;
	static struct timeval oneusec = {0, 1};

	s = splhigh();
	*tvp = time;
	splx(s);

	if (timercmp(tvp, &lasttime, <=))
		timeradd(&lasttime, &oneusec, tvp);

	lasttime = *tvp;
}


code:
#	$OpenBSD: genassym.cf,v 1.3 2015/02/09 09:21:30 miod Exp $
#
# Copyright (c) 2005, Miodrag Vallat
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# 1. Redistributions of source code must retain the above copyright
#    notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
#    notice, this list of conditions and the following disclaimer in the
#    documentation and/or other materials provided with the distribution.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#

include <sys/param.h>
include <sys/syscall.h>
include <sys/user.h>

include <uvm/uvm_extern.h>

include <machine/cpu.h>
include <machine/frame.h>
include <machine/kap.h>
include <machine/pmap.h>
include <machine/prom.h>

include <sparc/sparc/cpuvar.h>

#
# Solbourne PROM specific constants
#

struct	frame
member	FRAME_ARGC	fr_argx

export	PROM_DATA_PA

struct	sb_prom		SB_
member	REGS		sp_regs

#
# Sparc general constants and structures
#

export	VM_MIN_KERNEL_ADDRESS

export	SYS_exit
export	SYS_sigreturn

export	EFAULT
export	ENAMETOOLONG

struct	fpstate
member	fs_fsr
member	fs_qsize
member	fs_queue
member	fs_regs
export	FSR_QNE

# intrhand fields.
struct	intrhand
member	ih_arg
member	IH_COUNT	ih_count.ec_count
member	ih_fun
member	ih_ipl
member	ih_next

struct	pcb
member	pcb_nsaved
member	pcb_onfault
member	pcb_psr
member	pcb_rw
member	pcb_sp
member	pcb_uw
member	pcb_wim
member	pcb_wcookie

struct	pmap
member	PMAP_PSEGTAB	pm_psegtab
define	VM_PMAP		offsetof(struct vmspace, vm_map.pmap)

struct	proc
member	p_addr
member	p_stat
member	p_vmspace
member	p_wchan

export	SRUN
export	SONPROC

struct	uvmexp		V_
member	INTR		intrs
member	swtch

# CPU info structure
struct cpu_softc
member CPUINFO_CURPROC ci.ci_curproc