code:
/*	$OpenBSD: ar5416.c,v 1.15 2014/12/19 22:44:58 guenther Exp $	*/

/*-
 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
 * Copyright (c) 2008-2009 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

/*
 * Driver for Atheros 802.11a/g/n chipsets.
 * Routines for AR5416, AR5418 and AR9160 chipsets.
 */

#include "bpfilter.h"

#include <sys/param.h>
#include <sys/sockio.h>
#include <sys/mbuf.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/queue.h>
#include <sys/timeout.h>
#include <sys/conf.h>
#include <sys/device.h>
#include <sys/endian.h>

#include <machine/bus.h>
#include <machine/intr.h>

#if NBPFILTER > 0
#include <net/bpf.h>
#endif
#include <net/if.h>
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_media.h>
#include <net/if_types.h>

#include <netinet/in.h>
#include <netinet/if_ether.h>

#include <net80211/ieee80211_var.h>
#include <net80211/ieee80211_amrr.h>
#include <net80211/ieee80211_radiotap.h>

#include <dev/ic/athnreg.h>
#include <dev/ic/athnvar.h>

#include <dev/ic/ar5008reg.h>
#include <dev/ic/ar5416reg.h>

int	ar5416_attach(struct athn_softc *);
void	ar5416_setup(struct athn_softc *);
void	ar5416_swap_rom(struct athn_softc *);
const struct ar_spur_chan *
	ar5416_get_spur_chans(struct athn_softc *, int);
int	ar5416_set_synth(struct athn_softc *, struct ieee80211_channel *,
	    struct ieee80211_channel *);
uint8_t	ar5416_reverse_bits(uint8_t, int);
uint8_t	ar5416_get_rf_rev(struct athn_softc *);
void	ar5416_init_from_rom(struct athn_softc *, struct ieee80211_channel *,
	    struct ieee80211_channel *);
int	ar5416_init_calib(struct athn_softc *, struct ieee80211_channel *,
	    struct ieee80211_channel *);
void	ar5416_set_power_calib(struct athn_softc *,
	    struct ieee80211_channel *);
void	ar5416_set_txpower(struct athn_softc *, struct ieee80211_channel *,
	    struct ieee80211_channel *);
void	ar5416_spur_mitigate(struct athn_softc *, struct ieee80211_channel *,
	    struct ieee80211_channel *);
void	ar5416_rw_rfbits(uint32_t *, int, int, uint32_t, int);
void	ar5416_rw_bank6tpc(struct athn_softc *, struct ieee80211_channel *,
	    uint32_t *);
void	ar5416_rf_reset(struct athn_softc *, struct ieee80211_channel *);
void	ar5416_reset_bb_gain(struct athn_softc *, struct ieee80211_channel *);
void	ar5416_force_bias(struct athn_softc *, struct ieee80211_channel *);
void	ar9160_rw_addac(struct athn_softc *, struct ieee80211_channel *,
	    uint32_t *);
void	ar5416_reset_addac(struct athn_softc *, struct ieee80211_channel *);
void	ar5416_get_pdadcs(struct athn_softc *, struct ieee80211_channel *,
	    int, int, uint8_t, uint8_t *, uint8_t *);

/* Extern functions. */
uint8_t	athn_chan2fbin(struct ieee80211_channel *);
void	athn_get_pier_ival(uint8_t, const uint8_t *, int, int *, int *);
int	ar5008_attach(struct athn_softc *);
void	ar5008_write_txpower(struct athn_softc *, int16_t power[]);
void	ar5008_get_pdadcs(struct athn_softc *, uint8_t, struct athn_pier *,
	    struct athn_pier *, int, int, uint8_t, uint8_t *, uint8_t *);
void	ar5008_set_viterbi_mask(struct athn_softc *, int);
void	ar5008_get_lg_tpow(struct athn_softc *, struct ieee80211_channel *,
	    uint8_t, const struct ar_cal_target_power_leg *, int, uint8_t[]);
void	ar5008_get_ht_tpow(struct athn_softc *, struct ieee80211_channel *,
	    uint8_t, const struct ar_cal_target_power_ht *, int, uint8_t[]);
void	ar9280_olpc_get_pdadcs(struct athn_softc *, struct ieee80211_channel *,
	    int, uint8_t *, uint8_t *, uint8_t *);

int
ar5416_attach(struct athn_softc *sc)
{
	sc->eep_base = AR5416_EEP_START_LOC;
	sc->eep_size = sizeof(struct ar5416_eeprom);
	sc->def_nf = AR5416_PHY_CCA_MAX_GOOD_VALUE;
	sc->ngpiopins = 14;
	sc->led_pin = 1;
	sc->workaround = AR5416_WA_DEFAULT;
	sc->ops.setup = ar5416_setup;
	sc->ops.swap_rom = ar5416_swap_rom;
	sc->ops.init_from_rom = ar5416_init_from_rom;
	sc->ops.set_txpower = ar5416_set_txpower;
	sc->ops.set_synth = ar5416_set_synth;
	sc->ops.spur_mitigate = ar5416_spur_mitigate;
	sc->ops.get_spur_chans = ar5416_get_spur_chans;
	if (AR_SREV_9160_10_OR_LATER(sc))
		sc->ini = &ar9160_ini;
	else
		sc->ini = &ar5416_ini;
	sc->serdes = &ar5416_serdes;

	return (ar5008_attach(sc));
}

void
ar5416_setup(struct athn_softc *sc)
{
	/* Select ADDAC programming. */
	if (AR_SREV_9160_11(sc))
		sc->addac = &ar9160_1_1_addac;
	else if (AR_SREV_9160_10_OR_LATER(sc))
		sc->addac = &ar9160_1_0_addac;
	else if (AR_SREV_5416_22_OR_LATER(sc))
		sc->addac = &ar5416_2_2_addac;
	else
		sc->addac = &ar5416_2_1_addac;
}

void
ar5416_swap_rom(struct athn_softc *sc)
{
	struct ar5416_eeprom *eep = sc->eep;
	struct ar5416_modal_eep_header *modal;
	int i, j;

	for (i = 0; i < 2; i++) {	/* Dual-band. */
		modal = &eep->modalHeader[i];

		modal->antCtrlCommon = swap32(modal->antCtrlCommon);
		for (j = 0; j < AR5416_MAX_CHAINS; j++) {
			modal->antCtrlChain[j] =
			    swap32(modal->antCtrlChain[j]);
		}
		for (j = 0; j < AR_EEPROM_MODAL_SPURS; j++) {
			modal->spurChans[j].spurChan =
			    swap16(modal->spurChans[j].spurChan);
		}
	}
}

const struct ar_spur_chan *
ar5416_get_spur_chans(struct athn_softc *sc, int is2ghz)
{
	const struct ar5416_eeprom *eep = sc->eep;

	return (eep->modalHeader[is2ghz].spurChans);
}

int
ar5416_set_synth(struct athn_softc *sc, struct ieee80211_channel *c,
    struct ieee80211_channel *extc)
{
	uint32_t phy, reg;
	uint32_t freq = c->ic_freq;
	uint8_t chansel;

	phy = 0;
	if (IEEE80211_IS_CHAN_2GHZ(c)) {
		if (((freq - 2192) % 5) == 0) {
			chansel = ((freq - 672) * 2 - 3040) / 10;
		} else if (((freq - 2224) % 5) == 0) {
			chansel = ((freq - 704) * 2 - 3040) / 10;
			phy |= AR5416_BMODE_SYNTH;
		} else
			return (EINVAL);
		chansel <<= 2;

		reg = AR_READ(sc, AR_PHY_CCK_TX_CTRL);
		if (freq == 2484)	/* Channel 14. */
			reg |= AR_PHY_CCK_TX_CTRL_JAPAN;
		else
			reg &= ~AR_PHY_CCK_TX_CTRL_JAPAN;
		AR_WRITE(sc, AR_PHY_CCK_TX_CTRL, reg);

		/* Fix for orientation sensitivity issue. */
		if (AR_SREV_5416(sc))
			ar5416_force_bias(sc, c);
	} else {
		if (freq >= 5120 && (freq % 20) == 0) {
			chansel = (freq - 4800) / 20;
			chansel <<= 2;
			phy |= SM(AR5416_AMODE_REFSEL, 2);
		} else if ((freq % 10) == 0) {
			chansel = (freq - 4800) / 10;
			chansel <<= 1;
			if (AR_SREV_9160_10_OR_LATER(sc))
				phy |= SM(AR5416_AMODE_REFSEL, 1);
			else
				phy |= SM(AR5416_AMODE_REFSEL, 2);
		} else if ((freq % 5) == 0) {
			chansel = (freq - 4800) / 5;
			phy |= SM(AR5416_AMODE_REFSEL, 2);
		} else
			return (EINVAL);
	}
	chansel = ar5416_reverse_bits(chansel, 8);
	phy |= chansel << 8 | 1 << 5 | 1;
	DPRINTFN(4, ("AR_PHY(0x37)=0x%08x\n", phy));
	AR_WRITE(sc, AR_PHY(0x37), phy);
	return (0);
}

void
ar5416_init_from_rom(struct athn_softc *sc, struct ieee80211_channel *c,
    struct ieee80211_channel *extc)
{
	static const uint32_t chainoffset[] = { 0x0000, 0x2000, 0x1000 };
	const struct ar5416_eeprom *eep = sc->eep;
	const struct ar5416_modal_eep_header *modal;
	uint32_t reg, offset;
	uint8_t txRxAtten;
	int i;

	modal = &eep->modalHeader[IEEE80211_IS_CHAN_2GHZ(c)];

	AR_WRITE(sc, AR_PHY_SWITCH_COM, modal->antCtrlCommon);

	for (i = 0; i < AR5416_MAX_CHAINS; i++) {
		if (AR_SREV_5416_20_OR_LATER(sc) &&
		    (sc->rxchainmask == 0x5 || sc->txchainmask == 0x5))
			offset = chainoffset[i];
		else
			offset = i * 0x1000;

		AR_WRITE(sc, AR_PHY_SWITCH_CHAIN_0 + offset,
		    modal->antCtrlChain[i]);

		reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0 + offset);
		reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,
		    modal->iqCalICh[i]);
		reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,
		    modal->iqCalQCh[i]);
		AR_WRITE(sc, AR_PHY_TIMING_CTRL4_0 + offset, reg);

		if (i > 0 && !AR_SREV_5416_20_OR_LATER(sc))
			continue;

		if (sc->eep_rev >= AR_EEP_MINOR_VER_3) {
			reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);
			reg = RW(reg, AR_PHY_GAIN_2GHZ_BSW_MARGIN,
			    modal->bswMargin[i]);
			reg = RW(reg, AR_PHY_GAIN_2GHZ_BSW_ATTEN,
			    modal->bswAtten[i]);
			AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);
		}
		if (sc->eep_rev >= AR_EEP_MINOR_VER_3)
			txRxAtten = modal->txRxAttenCh[i];
		else	/* Workaround for ROM versions < 14.3. */
			txRxAtten = IEEE80211_IS_CHAN_2GHZ(c) ? 23 : 44;
		reg = AR_READ(sc, AR_PHY_RXGAIN + offset);
		reg = RW(reg, AR_PHY_RXGAIN_TXRX_ATTEN, txRxAtten);
		AR_WRITE(sc, AR_PHY_RXGAIN + offset, reg);

		reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);
		reg = RW(reg, AR_PHY_GAIN_2GHZ_RXTX_MARGIN,
		    modal->rxTxMarginCh[i]);
		AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);
	}
	reg = AR_READ(sc, AR_PHY_SETTLING);
	reg = RW(reg, AR_PHY_SETTLING_SWITCH, modal->switchSettling);
	AR_WRITE(sc, AR_PHY_SETTLING, reg);

	reg = AR_READ(sc, AR_PHY_DESIRED_SZ);
	reg = RW(reg, AR_PHY_DESIRED_SZ_ADC, modal->adcDesiredSize);
	reg = RW(reg, AR_PHY_DESIRED_SZ_PGA, modal->pgaDesiredSize);
	AR_WRITE(sc, AR_PHY_DESIRED_SZ, reg);

	reg =  SM(AR_PHY_RF_CTL4_TX_END_XPAA_OFF, modal->txEndToXpaOff);
	reg |= SM(AR_PHY_RF_CTL4_TX_END_XPAB_OFF, modal->txEndToXpaOff);
	reg |= SM(AR_PHY_RF_CTL4_FRAME_XPAA_ON, modal->txFrameToXpaOn);
	reg |= SM(AR_PHY_RF_CTL4_FRAME_XPAB_ON, modal->txFrameToXpaOn);
	AR_WRITE(sc, AR_PHY_RF_CTL4, reg);

	reg = AR_READ(sc, AR_PHY_RF_CTL3);
	reg = RW(reg, AR_PHY_TX_END_TO_A2_RX_ON, modal->txEndToRxOn);
	AR_WRITE(sc, AR_PHY_RF_CTL3, reg);

	reg = AR_READ(sc, AR_PHY_CCA(0));
	reg = RW(reg, AR_PHY_CCA_THRESH62, modal->thresh62);
	AR_WRITE(sc, AR_PHY_CCA(0), reg);

	reg = AR_READ(sc, AR_PHY_EXT_CCA(0));
	reg = RW(reg, AR_PHY_EXT_CCA_THRESH62, modal->thresh62);
	AR_WRITE(sc, AR_PHY_EXT_CCA(0), reg);

	if (sc->eep_rev >= AR_EEP_MINOR_VER_2) {
		reg = AR_READ(sc, AR_PHY_RF_CTL2);
		reg = RW(reg, AR_PHY_TX_END_DATA_START,
		    modal->txFrameToDataStart);
		reg = RW(reg, AR_PHY_TX_END_PA_ON, modal->txFrameToPaOn);
		AR_WRITE(sc, AR_PHY_RF_CTL2, reg);
	}
#ifndef IEEE80211_NO_HT
	if (sc->eep_rev >= AR_EEP_MINOR_VER_3 && extc != NULL) {
		/* Overwrite switch settling with HT-40 value. */
		reg = AR_READ(sc, AR_PHY_SETTLING);
		reg = RW(reg, AR_PHY_SETTLING_SWITCH, modal->swSettleHt40);
		AR_WRITE(sc, AR_PHY_SETTLING, reg);
	}
#endif
}

int
ar5416_init_calib(struct athn_softc *sc, struct ieee80211_channel *c,
    struct ieee80211_channel *extc)
{
	int ntries;

	if (AR_SREV_9280_10_OR_LATER(sc)) {
		/* XXX Linux tests AR9287?! */
		AR_CLRBITS(sc, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
		AR_SETBITS(sc, AR_PHY_AGC_CONTROL,
		    AR_PHY_AGC_CONTROL_FLTR_CAL);
	}
	/* Calibrate the AGC. */
	AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
	/* Poll for offset calibration completion. */
	for (ntries = 0; ntries < 10000; ntries++) {
		if (!(AR_READ(sc, AR_PHY_AGC_CONTROL) &
		    AR_PHY_AGC_CONTROL_CAL))
			break;
		DELAY(10);
	}
	if (ntries == 10000)
		return (ETIMEDOUT);
	if (AR_SREV_9280_10_OR_LATER(sc)) {
		AR_SETBITS(sc, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
		AR_CLRBITS(sc, AR_PHY_AGC_CONTROL,
		    AR_PHY_AGC_CONTROL_FLTR_CAL);
	}
	return (0);
}

void
ar5416_get_pdadcs(struct athn_softc *sc, struct ieee80211_channel *c,
    int chain, int nxpdgains, uint8_t overlap, uint8_t *boundaries,
    uint8_t *pdadcs)
{
	const struct ar5416_eeprom *eep = sc->eep;
	const struct ar5416_cal_data_per_freq *pierdata;
	const uint8_t *pierfreq;
	struct athn_pier lopier, hipier;
	int16_t delta;
	uint8_t fbin, pwroff;
	int i, lo, hi, npiers;

	if (IEEE80211_IS_CHAN_2GHZ(c)) {
		pierfreq = eep->calFreqPier2G;
		pierdata = eep->calPierData2G[chain];
		npiers = AR5416_NUM_2G_CAL_PIERS;
	} else {
		pierfreq = eep->calFreqPier5G;
		pierdata = eep->calPierData5G[chain];
		npiers = AR5416_NUM_5G_CAL_PIERS;
	}
	/* Find channel in ROM pier table. */
	fbin = athn_chan2fbin(c);
	athn_get_pier_ival(fbin, pierfreq, npiers, &lo, &hi);

	lopier.fbin = pierfreq[lo];
	hipier.fbin = pierfreq[hi];
	for (i = 0; i < nxpdgains; i++) {
		lopier.pwr[i] = pierdata[lo].pwrPdg[i];
		lopier.vpd[i] = pierdata[lo].vpdPdg[i];
		hipier.pwr[i] = pierdata[lo].pwrPdg[i];
		hipier.vpd[i] = pierdata[lo].vpdPdg[i];
	}
	ar5008_get_pdadcs(sc, fbin, &lopier, &hipier, nxpdgains,
	    AR5416_PD_GAIN_ICEPTS, overlap, boundaries, pdadcs);

	if (!AR_SREV_9280_20_OR_LATER(sc))
		return;

	if (sc->eep_rev >= AR_EEP_MINOR_VER_21)
		pwroff = eep->baseEepHeader.pwrTableOffset;
	else
		pwroff = AR_PWR_TABLE_OFFSET_DB;
	delta = (pwroff - AR_PWR_TABLE_OFFSET_DB) * 2;	/* In half dB. */

	/* Change the original gain boundaries setting. */
	for (i = 0; i < nxpdgains; i++) {
		/* XXX Possible overflows? */
		boundaries[i] -= delta;
		if (boundaries[i] > AR_MAX_RATE_POWER - overlap)
			boundaries[i] = AR_MAX_RATE_POWER - overlap;
	}
	if (delta != 0) {
		/* Shift the PDADC table to start at the new offset. */
		for (i = 0; i < AR_NUM_PDADC_VALUES; i++)
			pdadcs[i] = pdadcs[MIN(i + delta,
			    AR_NUM_PDADC_VALUES - 1)];
	}
}

void
ar5416_set_power_calib(struct athn_softc *sc, struct ieee80211_channel *c)
{
	static const uint32_t chainoffset[] = { 0x0000, 0x2000, 0x1000 };
	const struct ar5416_eeprom *eep = sc->eep;
	const struct ar5416_modal_eep_header *modal;
	uint8_t boundaries[AR_PD_GAINS_IN_MASK];
	uint8_t pdadcs[AR_NUM_PDADC_VALUES];
	uint8_t xpdgains[AR5416_NUM_PD_GAINS];
	uint8_t overlap, txgain;
	uint32_t reg, offset;
	int i, j, nxpdgains;

	modal = &eep->modalHeader[IEEE80211_IS_CHAN_2GHZ(c)];

	if (sc->eep_rev < AR_EEP_MINOR_VER_2) {
		overlap = MS(AR_READ(sc, AR_PHY_TPCRG5),
		    AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
	} else
		overlap = modal->pdGainOverlap;

	if ((sc->flags & ATHN_FLAG_OLPC) && IEEE80211_IS_CHAN_2GHZ(c)) {
		/* XXX not here. */
		sc->pdadc =
		    ((const struct ar_cal_data_per_freq_olpc *)
		     eep->calPierData2G[0])->vpdPdg[0][0];
	}

	nxpdgains = 0;
	memset(xpdgains, 0, sizeof(xpdgains));
	for (i = AR5416_PD_GAINS_IN_MASK - 1; i >= 0; i--) {
		if (nxpdgains >= AR5416_NUM_PD_GAINS)
			break;	/* Can't happen. */
		if (modal->xpdGain & (1 << i))
			xpdgains[nxpdgains++] = i;
	}
	reg = AR_READ(sc, AR_PHY_TPCRG1);
	reg = RW(reg, AR_PHY_TPCRG1_NUM_PD_GAIN, nxpdgains - 1);
	reg = RW(reg, AR_PHY_TPCRG1_PD_GAIN_1, xpdgains[0]);
	reg = RW(reg, AR_PHY_TPCRG1_PD_GAIN_2, xpdgains[1]);
	reg = RW(reg, AR_PHY_TPCRG1_PD_GAIN_3, xpdgains[2]);
	AR_WRITE(sc, AR_PHY_TPCRG1, reg);

	for (i = 0; i < AR5416_MAX_CHAINS; i++) {
		if (!(sc->txchainmask & (1 << i)))
			continue;

		if (AR_SREV_5416_20_OR_LATER(sc) &&
		    (sc->rxchainmask == 0x5 || sc->txchainmask == 0x5))
			offset = chainoffset[i];
		else
			offset = i * 0x1000;

		if (sc->flags & ATHN_FLAG_OLPC) {
			ar9280_olpc_get_pdadcs(sc, c, i, boundaries,
			    pdadcs, &txgain);

			reg = AR_READ(sc, AR_PHY_TX_PWRCTRL6_0);
			reg = RW(reg, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3);
			AR_WRITE(sc, AR_PHY_TX_PWRCTRL6_0, reg);

			reg = AR_READ(sc, AR_PHY_TX_PWRCTRL6_1);
			reg = RW(reg, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3);
			AR_WRITE(sc, AR_PHY_TX_PWRCTRL6_1, reg);

			reg = AR_READ(sc, AR_PHY_TX_PWRCTRL7);
			reg = RW(reg, AR_PHY_TX_PWRCTRL_INIT_TX_GAIN, txgain);
			AR_WRITE(sc, AR_PHY_TX_PWRCTRL7, reg);

			overlap = 6;
		} else {
			ar5416_get_pdadcs(sc, c, i, nxpdgains, overlap,
			    boundaries, pdadcs);
		}
		/* Write boundaries. */
		if (i == 0 || AR_SREV_5416_20_OR_LATER(sc)) {
			reg  = SM(AR_PHY_TPCRG5_PD_GAIN_OVERLAP,
			    overlap);
			reg |= SM(AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1,
			    boundaries[0]);
			reg |= SM(AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2,
			    boundaries[1]);
			reg |= SM(AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3,
			    boundaries[2]);
			reg |= SM(AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4,
			    boundaries[3]);
			AR_WRITE(sc, AR_PHY_TPCRG5 + offset, reg);
		}
		/* Write PDADC values. */
		for (j = 0; j < AR_NUM_PDADC_VALUES; j += 4) {
			AR_WRITE(sc, AR_PHY_PDADC_TBL_BASE + offset + j,
			    pdadcs[j + 0] <<  0 |
			    pdadcs[j + 1] <<  8 |
			    pdadcs[j + 2] << 16 |
			    pdadcs[j + 3] << 24);
		}
	}
}

void
ar5416_set_txpower(struct athn_softc *sc, struct ieee80211_channel *c,
    struct ieee80211_channel *extc)
{
	const struct ar5416_eeprom *eep = sc->eep;
	const struct ar5416_modal_eep_header *modal;
	uint8_t tpow_cck[4], tpow_ofdm[4];
#ifndef IEEE80211_NO_HT
	uint8_t tpow_cck_ext[4], tpow_ofdm_ext[4];
	uint8_t tpow_ht20[8], tpow_ht40[8];
	uint8_t ht40inc;
#endif
	int16_t pwr = 0, pwroff, max_ant_gain, power[ATHN_POWER_COUNT];
	uint8_t cckinc;
	int i;

	ar5416_set_power_calib(sc, c);

	modal = &eep->modalHeader[IEEE80211_IS_CHAN_2GHZ(c)];

	/* Compute transmit power reduction due to antenna gain. */
	max_ant_gain = MAX(modal->antennaGainCh[0], modal->antennaGainCh[1]);
	max_ant_gain = MAX(modal->antennaGainCh[2], max_ant_gain);
	/* XXX */

	/*
	 * Reduce scaled power by number of active chains to get per-chain
	 * transmit power level.
	 */
	if (sc->ntxchains == 2)
		pwr -= AR_PWR_DECREASE_FOR_2_CHAIN;
	else if (sc->ntxchains == 3)
		pwr -= AR_PWR_DECREASE_FOR_3_CHAIN;
	if (pwr < 0)
		pwr = 0;

	if (IEEE80211_IS_CHAN_2GHZ(c)) {
		/* Get CCK target powers. */
		ar5008_get_lg_tpow(sc, c, AR_CTL_11B, eep->calTargetPowerCck,
		    AR5416_NUM_2G_CCK_TARGET_POWERS, tpow_cck);

		/* Get OFDM target powers. */
		ar5008_get_lg_tpow(sc, c, AR_CTL_11G, eep->calTargetPower2G,
		    AR5416_NUM_2G_20_TARGET_POWERS, tpow_ofdm);

#ifndef IEEE80211_NO_HT
		/* Get HT-20 target powers. */
		ar5008_get_ht_tpow(sc, c, AR_CTL_2GHT20,
		    eep->calTargetPower2GHT20, AR5416_NUM_2G_20_TARGET_POWERS,
		    tpow_ht20);

		if (extc != NULL) {
			/* Get HT-40 target powers. */
			ar5008_get_ht_tpow(sc, c, AR_CTL_2GHT40,
			    eep->calTargetPower2GHT40,
			    AR5416_NUM_2G_40_TARGET_POWERS, tpow_ht40);

			/* Get secondary channel CCK target powers. */
			ar5008_get_lg_tpow(sc, extc, AR_CTL_11B,
			    eep->calTargetPowerCck,
			    AR5416_NUM_2G_CCK_TARGET_POWERS, tpow_cck_ext);

			/* Get secondary channel OFDM target powers. */
			ar5008_get_lg_tpow(sc, extc, AR_CTL_11G,
			    eep->calTargetPower2G,
			    AR5416_NUM_2G_20_TARGET_POWERS, tpow_ofdm_ext);
		}
#endif
	} else {
		/* Get OFDM target powers. */
		ar5008_get_lg_tpow(sc, c, AR_CTL_11A, eep->calTargetPower5G,
		    AR5416_NUM_5G_20_TARGET_POWERS, tpow_ofdm);

#ifndef IEEE80211_NO_HT
		/* Get HT-20 target powers. */
		ar5008_get_ht_tpow(sc, c, AR_CTL_5GHT20,
		    eep->calTargetPower5GHT20, AR5416_NUM_5G_20_TARGET_POWERS,
		    tpow_ht20);

		if (extc != NULL) {
			/* Get HT-40 target powers. */
			ar5008_get_ht_tpow(sc, c, AR_CTL_5GHT40,
			    eep->calTargetPower5GHT40,
			    AR5416_NUM_5G_40_TARGET_POWERS, tpow_ht40);

			/* Get secondary channel OFDM target powers. */
			ar5008_get_lg_tpow(sc, extc, AR_CTL_11A,
			    eep->calTargetPower5G,
			    AR5416_NUM_5G_20_TARGET_POWERS, tpow_ofdm_ext);
		}
#endif
	}

	/* Compute CCK/OFDM delta. */
	cckinc = (sc->flags & ATHN_FLAG_OLPC) ? -2 : 0;

	memset(power, 0, sizeof(power));
	/* Shuffle target powers accross transmit rates. */
	power[ATHN_POWER_OFDM6 ] =
	power[ATHN_POWER_OFDM9 ] =
	power[ATHN_POWER_OFDM12] =
	power[ATHN_POWER_OFDM18] =
	power[ATHN_POWER_OFDM24] = tpow_ofdm[0];
	power[ATHN_POWER_OFDM36] = tpow_ofdm[1];
	power[ATHN_POWER_OFDM48] = tpow_ofdm[2];
	power[ATHN_POWER_OFDM54] = tpow_ofdm[3];
	power[ATHN_POWER_XR    ] = tpow_ofdm[0];
	if (IEEE80211_IS_CHAN_2GHZ(c)) {
		power[ATHN_POWER_CCK1_LP ] = tpow_cck[0] + cckinc;
		power[ATHN_POWER_CCK2_LP ] =
		power[ATHN_POWER_CCK2_SP ] = tpow_cck[1] + cckinc;
		power[ATHN_POWER_CCK55_LP] =
		power[ATHN_POWER_CCK55_SP] = tpow_cck[2] + cckinc;
		power[ATHN_POWER_CCK11_LP] =
		power[ATHN_POWER_CCK11_SP] = tpow_cck[3] + cckinc;
	}
#ifndef IEEE80211_NO_HT
	for (i = 0; i < nitems(tpow_ht20); i++)
		power[ATHN_POWER_HT20(i)] = tpow_ht20[i];
	if (extc != NULL) {
		/* Correct PAR difference between HT40 and HT20/Legacy. */
		if (sc->eep_rev >= AR_EEP_MINOR_VER_2)
			ht40inc = modal->ht40PowerIncForPdadc;
		else
			ht40inc = AR_HT40_POWER_INC_FOR_PDADC;
		for (i = 0; i < nitems(tpow_ht40); i++)
			power[ATHN_POWER_HT40(i)] = tpow_ht40[i] + ht40inc;
		power[ATHN_POWER_OFDM_DUP] = tpow_ht40[0];
		power[ATHN_POWER_CCK_DUP ] = tpow_ht40[0] + cckinc;
		power[ATHN_POWER_OFDM_EXT] = tpow_ofdm_ext[0];
		if (IEEE80211_IS_CHAN_2GHZ(c))
			power[ATHN_POWER_CCK_EXT] = tpow_cck_ext[0] + cckinc;
	}
#endif

	if (AR_SREV_9280_10_OR_LATER(sc)) {
		if (sc->eep_rev >= AR_EEP_MINOR_VER_21)
			pwroff = eep->baseEepHeader.pwrTableOffset;
		else
			pwroff = AR_PWR_TABLE_OFFSET_DB;
		for (i = 0; i < ATHN_POWER_COUNT; i++)
			power[i] -= pwroff * 2;	/* In half dB. */
	}
	for (i = 0; i < ATHN_POWER_COUNT; i++) {
		if (power[i] > AR_MAX_RATE_POWER)
			power[i] = AR_MAX_RATE_POWER;
	}

	/* Write transmit power values to hardware. */
	ar5008_write_txpower(sc, power);

	/*
	 * Write transmit power substraction for dynamic chain changing
	 * and per-packet transmit power.
	 */
	AR_WRITE(sc, AR_PHY_POWER_TX_SUB,
	    (modal->pwrDecreaseFor3Chain & 0x3f) << 6 |
	    (modal->pwrDecreaseFor2Chain & 0x3f));
}

void
ar5416_spur_mitigate(struct athn_softc *sc, struct ieee80211_channel *c,
    struct ieee80211_channel *extc)
{
	const struct ar_spur_chan *spurchans;
	int i, spur, bin, spur_delta_phase, spur_freq_sd;

	spurchans = sc->ops.get_spur_chans(sc, IEEE80211_IS_CHAN_2GHZ(c));
	for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
		spur = spurchans[i].spurChan;
		if (spur == AR_NO_SPUR)
			return; /* XXX disable if it was enabled! */
		spur -= c->ic_freq * 10;
		/* Verify range +/-9.5MHz */
		if (abs(spur) < 95)
			break;
	}
	if (i == AR_EEPROM_MODAL_SPURS)
		return; /* XXX disable if it was enabled! */
	DPRINTFN(2, ("enabling spur mitigation\n"));

	AR_SETBITS(sc, AR_PHY_TIMING_CTRL4_0,
	    AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
	    AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
	    AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
	    AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);

	AR_WRITE(sc, AR_PHY_SPUR_REG,
	    AR_PHY_SPUR_REG_MASK_RATE_CNTL |
	    AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
	    AR_PHY_SPUR_REG_MASK_RATE_SELECT |
	    AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
	    SM(AR_PHY_SPUR_REG_SPUR_RSSI_THRESH, AR_SPUR_RSSI_THRESH));

	spur_delta_phase = (spur * 524288) / 100;
	if (IEEE80211_IS_CHAN_2GHZ(c))
		spur_freq_sd = (spur * 2048) / 440;
	else
		spur_freq_sd = (spur * 2048) / 400;

	AR_WRITE(sc, AR_PHY_TIMING11,
	    AR_PHY_TIMING11_USE_SPUR_IN_AGC |
	    SM(AR_PHY_TIMING11_SPUR_FREQ_SD, spur_freq_sd) |
	    SM(AR_PHY_TIMING11_SPUR_DELTA_PHASE, spur_delta_phase));

	bin = spur * 32;
	ar5008_set_viterbi_mask(sc, bin);
}

uint8_t
ar5416_reverse_bits(uint8_t v, int nbits)
{
	KASSERT(nbits <= 8);
	v = ((v >> 1) & 0x55) | ((v & 0x55) << 1);
	v = ((v >> 2) & 0x33) | ((v & 0x33) << 2);
	v = ((v >> 4) & 0x0f) | ((v & 0x0f) << 4);
	return (v >> (8 - nbits));
}

uint8_t
ar5416_get_rf_rev(struct athn_softc *sc)
{
	uint8_t rev, reg;
	int i;

	/* Allow access to analog chips. */
	AR_WRITE(sc, AR_PHY(0), 0x00000007);

	AR_WRITE(sc, AR_PHY(0x36), 0x00007058);
	for (i = 0; i < 8; i++)
		AR_WRITE(sc, AR_PHY(0x20), 0x00010000);
	reg = (AR_READ(sc, AR_PHY(256)) >> 24) & 0xff;
	reg = (reg & 0xf0) >> 4 | (reg & 0x0f) << 4;

	rev = ar5416_reverse_bits(reg, 8);
	if ((rev & AR_RADIO_SREV_MAJOR) == 0)
		rev = AR_RAD5133_SREV_MAJOR;
	return (rev);
}

/*
 * Replace bits "off" to "off+nbits-1" in column "col" with the specified
 * value.
 */
void
ar5416_rw_rfbits(uint32_t *buf, int col, int off, uint32_t val, int nbits)
{
	int idx, bit;

	KASSERT(off >= 1 && col < 4 && nbits <= 32);

	off--;	/* Starts at 1. */
	while (nbits-- > 0) {
		idx = off / 8;
		bit = off % 8;
		buf[idx] &= ~(1 << (bit + col * 8));
		buf[idx] |= ((val >> nbits) & 1) << (bit + col * 8);
		off++;
	}
}

/*
 * Overwrite db and ob based on ROM settings.
 */
void
ar5416_rw_bank6tpc(struct athn_softc *sc, struct ieee80211_channel *c,
    uint32_t *rwbank6tpc)
{
	const struct ar5416_eeprom *eep = sc->eep;
	const struct ar5416_modal_eep_header *modal;

	if (IEEE80211_IS_CHAN_5GHZ(c)) {
		modal = &eep->modalHeader[0];
		/* 5GHz db in column 0, bits [200-202]. */
		ar5416_rw_rfbits(rwbank6tpc, 0, 200, modal->db, 3);
		/* 5GHz ob in column 0, bits [203-205]. */
		ar5416_rw_rfbits(rwbank6tpc, 0, 203, modal->ob, 3);
	} else {
		modal = &eep->modalHeader[1];
		/* 2GHz db in column 0, bits [194-196]. */
		ar5416_rw_rfbits(rwbank6tpc, 0, 194, modal->db, 3);
		/* 2GHz ob in column 0, bits [197-199]. */
		ar5416_rw_rfbits(rwbank6tpc, 0, 197, modal->ob, 3);
	}
}

/*
 * Program analog RF.
 */
void
ar5416_rf_reset(struct athn_softc *sc, struct ieee80211_channel *c)
{
	const uint32_t *bank6tpc;
	int i;

	/* Bank 0. */
	AR_WRITE(sc, 0x98b0, 0x1e5795e5);
	AR_WRITE(sc, 0x98e0, 0x02008020);

	/* Bank 1. */
	AR_WRITE(sc, 0x98b0, 0x02108421);
	AR_WRITE(sc, 0x98ec, 0x00000008);

	/* Bank 2. */
	AR_WRITE(sc, 0x98b0, 0x0e73ff17);
	AR_WRITE(sc, 0x98e0, 0x00000420);

	/* Bank 3. */
	if (IEEE80211_IS_CHAN_5GHZ(c))
		AR_WRITE(sc, 0x98f0, 0x01400018);
	else
		AR_WRITE(sc, 0x98f0, 0x01c00018);

	/* Select the Bank 6 TPC values to use. */
	if (AR_SREV_9160_10_OR_LATER(sc))
		bank6tpc = ar9160_bank6tpc_vals;
	else
		bank6tpc = ar5416_bank6tpc_vals;
	if (sc->eep_rev >= AR_EEP_MINOR_VER_2) {
		uint32_t *rwbank6tpc = sc->rwbuf;

		/* Copy values from .rodata to writable buffer. */
		memcpy(rwbank6tpc, bank6tpc, 32 * sizeof(uint32_t));
		ar5416_rw_bank6tpc(sc, c, rwbank6tpc);
		bank6tpc = rwbank6tpc;
	}
	/* Bank 6 TPC. */
	for (i = 0; i < 32; i++)
		AR_WRITE(sc, 0x989c, bank6tpc[i]);
	if (IEEE80211_IS_CHAN_5GHZ(c))
		AR_WRITE(sc, 0x98d0, 0x0000000f);
	else
		AR_WRITE(sc, 0x98d0, 0x0010000f);

	/* Bank 7. */
	AR_WRITE(sc, 0x989c, 0x00000500);
	AR_WRITE(sc, 0x989c, 0x00000800);
	AR_WRITE(sc, 0x98cc, 0x0000000e);
}

void
ar5416_reset_bb_gain(struct athn_softc *sc, struct ieee80211_channel *c)
{
	const uint32_t *pvals;
	int i;

	if (IEEE80211_IS_CHAN_2GHZ(c))
		pvals = ar5416_bb_rfgain_vals_2g;
	else
		pvals = ar5416_bb_rfgain_vals_5g;
	for (i = 0; i < 64; i++)
		AR_WRITE(sc, AR_PHY_BB_RFGAIN(i), pvals[i]);
}

/*
 * Fix orientation sensitivity issue on AR5416/2GHz by increasing
 * rf_pwd_icsyndiv.
 */
void
ar5416_force_bias(struct athn_softc *sc, struct ieee80211_channel *c)
{
	uint32_t *rwbank6 = sc->rwbuf;
	uint8_t bias;
	int i;

	KASSERT(IEEE80211_IS_CHAN_2GHZ(c));

	/* Copy values from .rodata to writable buffer. */
	memcpy(rwbank6, ar5416_bank6_vals, sizeof(ar5416_bank6_vals));

	if (c->ic_freq < 2412)
		bias = 0;
	else if (c->ic_freq < 2422)
		bias = 1;
	else
		bias = 2;
	ar5416_reverse_bits(bias, 3);

	/* Overwrite "rf_pwd_icsyndiv" (column 3, bits [181-183].) */
	ar5416_rw_rfbits(rwbank6, 3, 181, bias, 3);

	/* Write Bank 6. */
	for (i = 0; i < 32; i++)
		AR_WRITE(sc, 0x989c, rwbank6[i]);
	AR_WRITE(sc, 0x98d0, 0x0010000f);
}

/*
 * Overwrite XPA bias level based on ROM setting.
 */
void
ar9160_rw_addac(struct athn_softc *sc, struct ieee80211_channel *c,
    uint32_t *addac)
{
	struct ar5416_eeprom *eep = sc->eep;
	struct ar5416_modal_eep_header *modal;
	uint8_t fbin, bias;
	int i;

	/* XXX xpaBiasLvlFreq values have not been endian-swapped? */

	/* Get the XPA bias level to use for the specified channel. */
	modal = &eep->modalHeader[IEEE80211_IS_CHAN_2GHZ(c)];
	if (modal->xpaBiasLvl == 0xff) {
		bias = modal->xpaBiasLvlFreq[0] >> 14;
		fbin = athn_chan2fbin(c);
		for (i = 1; i < 3; i++) {
			if (modal->xpaBiasLvlFreq[i] == 0)
				break;
			if ((modal->xpaBiasLvlFreq[i] & 0xff) < fbin)
				break;
			bias = modal->xpaBiasLvlFreq[i] >> 14;
		}
	} else
		bias = modal->xpaBiasLvl & 0x3;

	bias = ar5416_reverse_bits(bias, 2);	/* Put in host bit-order. */
	DPRINTFN(4, ("bias level=%d\n", bias));
	if (IEEE80211_IS_CHAN_2GHZ(c))
		ar5416_rw_rfbits(addac, 0, 60, bias, 2);
	else
		ar5416_rw_rfbits(addac, 0, 55, bias, 2);
}

void
ar5416_reset_addac(struct athn_softc *sc, struct ieee80211_channel *c)
{
	const struct athn_addac *addac = sc->addac;
	const uint32_t *pvals;
	int i;

	if (AR_SREV_9160(sc) && sc->eep_rev >= AR_EEP_MINOR_VER_7) {
		uint32_t *rwaddac = sc->rwbuf;

		/* Copy values from .rodata to writable buffer. */
		memcpy(rwaddac, addac->vals, addac->nvals * sizeof(uint32_t));
		ar9160_rw_addac(sc, c, rwaddac);
		pvals = rwaddac;
	} else
		pvals = addac->vals;
	for (i = 0; i < addac->nvals; i++)
		AR_WRITE(sc, 0x989c, pvals[i]);
	AR_WRITE(sc, 0x98cc, 0);	/* Finalize. */
}


code:
/*	$OpenBSD: ar5416reg.h,v 1.5 2012/10/20 09:54:20 stsp Exp $	*/

/*-
 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
 * Copyright (c) 2008-2009 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#define AR5416_MAX_CHAINS	3

#define AR5416_PHY_CCA_MAX_GOOD_VALUE	( -85)

/*
 * ROM layout used by AR5416, AR9160 and AR9280.
 */
#define AR5416_EEP_START_LOC		256
#define AR5416_NUM_5G_CAL_PIERS		8
#define AR5416_NUM_2G_CAL_PIERS		4
#define AR5416_NUM_5G_20_TARGET_POWERS	8
#define AR5416_NUM_5G_40_TARGET_POWERS	8
#define AR5416_NUM_2G_CCK_TARGET_POWERS	3
#define AR5416_NUM_2G_20_TARGET_POWERS	4
#define AR5416_NUM_2G_40_TARGET_POWERS	4
#define AR5416_NUM_CTLS			24
#define AR5416_NUM_BAND_EDGES		8
#define AR5416_NUM_PD_GAINS		4
#define AR5416_PD_GAINS_IN_MASK		4
#define AR5416_PD_GAIN_ICEPTS		5

struct ar5416_base_eep_header {
	uint16_t	length;
	uint16_t	checksum;
	uint16_t	version;
	uint8_t		opCapFlags;
	uint8_t		eepMisc;
	uint16_t	regDmn[2];
	uint8_t		macAddr[6];
	uint8_t		rxMask;
	uint8_t		txMask;
	uint16_t	rfSilent;
	uint16_t	blueToothOptions;
	uint16_t	deviceCap;
	uint32_t	binBuildNumber;
	uint8_t		deviceType;
	/* End of common header. */
	uint8_t		pwdclkind;
	uint8_t		fastClk5g;
	uint8_t		divChain;
	uint8_t		rxGainType;
#define AR5416_EEP_RXGAIN_23DB_BACKOFF	0
#define AR5416_EEP_RXGAIN_13DB_BACKOFF	1
#define AR5416_EEP_RXGAIN_ORIG		2

	uint8_t		dacHiPwrMode_5G;
	uint8_t		openLoopPwrCntl;
	uint8_t		dacLpMode;
	uint8_t		txGainType;
	uint8_t		rcChainMask;
	uint8_t		desiredScaleCCK;
	uint8_t		pwrTableOffset;
	uint8_t		frac_n_5g;
	uint8_t		futureBase[21];
} __packed;

struct ar5416_modal_eep_header {
	uint32_t	antCtrlChain[AR5416_MAX_CHAINS];
	uint32_t	antCtrlCommon;
	uint8_t		antennaGainCh[AR5416_MAX_CHAINS];
	uint8_t		switchSettling;
	uint8_t		txRxAttenCh[AR5416_MAX_CHAINS];
	uint8_t		rxTxMarginCh[AR5416_MAX_CHAINS];
	uint8_t		adcDesiredSize;
	uint8_t		pgaDesiredSize;
	uint8_t		xlnaGainCh[AR5416_MAX_CHAINS];
	uint8_t		txEndToXpaOff;
	uint8_t		txEndToRxOn;
	uint8_t		txFrameToXpaOn;
	uint8_t		thresh62;
	uint8_t		noiseFloorThreshCh[AR5416_MAX_CHAINS];
	uint8_t		xpdGain;
	uint8_t		xpd;
	uint8_t		iqCalICh[AR5416_MAX_CHAINS];
	uint8_t		iqCalQCh[AR5416_MAX_CHAINS];
	uint8_t		pdGainOverlap;
	uint8_t		ob;
	uint8_t		db;
	uint8_t		xpaBiasLvl;
	uint8_t		pwrDecreaseFor2Chain;
	uint8_t		pwrDecreaseFor3Chain;
	uint8_t		txFrameToDataStart;
	uint8_t		txFrameToPaOn;
	uint8_t		ht40PowerIncForPdadc;
	uint8_t		bswAtten[AR5416_MAX_CHAINS];
	uint8_t		bswMargin[AR5416_MAX_CHAINS];
	uint8_t		swSettleHt40;
	uint8_t		xatten2Db[AR5416_MAX_CHAINS];
	uint8_t		xatten2Margin[AR5416_MAX_CHAINS];
	uint8_t		ob_ch1;
	uint8_t		db_ch1;
	uint8_t		flagBits;
#define AR5416_EEP_FLAG_USEANT1		0x01
#define AR5416_EEP_FLAG_FORCEXPAON	0x02
#define AR5416_EEP_FLAG_LOCALBIAS	0x04
#define AR5416_EEP_FLAG_FEMBANDSELECT	0x08
#define AR5416_EEP_FLAG_XLNABUFIN	0x10
#define AR5416_EEP_FLAG_XLNAISEL_M	0x60
#define AR5416_EEP_FLAG_XLNAISEL_S	5
#define AR5416_EEP_FLAG_XLNABUFMODE	0x80

	uint8_t		miscBits;
#define AR5416_EEP_MISC_TX_DAC_SCALE_CCK_M	0x03
#define AR5416_EEP_MISC_TX_DAC_SCALE_CCK_S	0
#define AR5416_EEP_MISC_TX_CLIP_M		0xfc
#define AR5416_EEP_MISC_TX_CLIP_S		2

	uint16_t	xpaBiasLvlFreq[3];
	uint8_t		futureModal[6];
	struct		ar_spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
} __packed;

struct ar5416_cal_data_per_freq {
	uint8_t	pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
	uint8_t	vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
} __packed;

struct ar5416_cal_ctl_data {
	struct ar_cal_ctl_edges
	    ctlEdges[AR5416_MAX_CHAINS][AR5416_NUM_BAND_EDGES];
} __packed;

struct ar5416_eeprom {
	struct	ar5416_base_eep_header baseEepHeader;
	uint8_t custData[64];
	struct	ar5416_modal_eep_header modalHeader[2];
	uint8_t calFreqPier5G[AR5416_NUM_5G_CAL_PIERS];
	uint8_t calFreqPier2G[AR5416_NUM_2G_CAL_PIERS];
	struct	ar5416_cal_data_per_freq
	    calPierData5G[AR5416_MAX_CHAINS][AR5416_NUM_5G_CAL_PIERS];
	struct	ar5416_cal_data_per_freq
	    calPierData2G[AR5416_MAX_CHAINS][AR5416_NUM_2G_CAL_PIERS];
	struct	ar_cal_target_power_leg
	    calTargetPower5G[AR5416_NUM_5G_20_TARGET_POWERS];
	struct	ar_cal_target_power_ht
	    calTargetPower5GHT20[AR5416_NUM_5G_20_TARGET_POWERS];
	struct	ar_cal_target_power_ht
	    calTargetPower5GHT40[AR5416_NUM_5G_40_TARGET_POWERS];
	struct	ar_cal_target_power_leg
	    calTargetPowerCck[AR5416_NUM_2G_CCK_TARGET_POWERS];
	struct	ar_cal_target_power_leg
	    calTargetPower2G[AR5416_NUM_2G_20_TARGET_POWERS];
	struct	ar_cal_target_power_ht
	    calTargetPower2GHT20[AR5416_NUM_2G_20_TARGET_POWERS];
	struct	ar_cal_target_power_ht
	    calTargetPower2GHT40[AR5416_NUM_2G_40_TARGET_POWERS];
	uint8_t	ctlIndex[AR5416_NUM_CTLS];
	struct	ar5416_cal_ctl_data ctlData[AR5416_NUM_CTLS];
	uint8_t padding;
} __packed;

/* Macro to "pack" registers to 16-bit to save some .rodata space. */
#define P(x)	(x)

/*
 * AR5416 initialization values.
 */
static const uint16_t ar5416_regs[] = {
	P(0x01030), P(0x01070), P(0x010b0), P(0x010f0), P(0x08014),
	P(0x0801c), P(0x08120), P(0x081d0), P(0x09804), P(0x09820),
	P(0x09824), P(0x09828), P(0x09834), P(0x09838), P(0x09844),
	P(0x09848), P(0x0a848), P(0x0b848), P(0x09850), P(0x09858),
	P(0x0985c), P(0x09860), P(0x09864), P(0x09868), P(0x0986c),
	P(0x09914), P(0x09918), P(0x09924), P(0x09944), P(0x09960),
	P(0x0a960), P(0x0b960), P(0x09964), P(0x099bc), P(0x099c0),
	P(0x099c4), P(0x099c8), P(0x099cc), P(0x099d0), P(0x099d4),
	P(0x099d8), P(0x0a204), P(0x0a208), P(0x0a20c), P(0x0b20c),
	P(0x0c20c), P(0x0a21c), P(0x0a230), P(0x0a274), P(0x0a300),
	P(0x0a304), P(0x0a308), P(0x0a30c), P(0x0a310), P(0x0a314),
	P(0x0a318), P(0x0a31c), P(0x0a320), P(0x0a324), P(0x0a328),
	P(0x0a32c), P(0x0a330), P(0x0a334)
};

static const uint32_t ar5416_vals_5g20[] = {
	0x00000230, 0x00000168, 0x00000e60, 0x0000a000, 0x03e803e8,
	0x128d93a7, 0x08f04800, 0x00003210, 0x00000300, 0x02020200,
	0x00000e0e, 0x0a020001, 0x00000e0e, 0x00000007, 0x1372161e,
	0x001a6a65, 0x001a6a65, 0x001a6a65, 0x6c48b4e0, 0x7ec82d2e,
	0x31395d5e, 0x00049d18, 0x0001ce00, 0x409a4190, 0x050cb081,
	0x000007d0, 0x000001b8, 0xd0058a0b, 0xffb81020, 0x00000900,
	0x00000900, 0x00000900, 0x00000000, 0x001a0a00, 0x038919be,
	0x06336f77, 0x6af6532c, 0x08f186c8, 0x00046384, 0x00000000,
	0x00000000, 0x00000880, 0xd6be4788, 0x002ec1e0, 0x002ec1e0,
	0x002ec1e0, 0x1883800a, 0x00000000, 0x0a1a9caa, 0x18010000,
	0x30032602, 0x48073e06, 0x560b4c0a, 0x641a600f, 0x7a4f6e1b,
	0x8c5b7e5a, 0x9d0f96cf, 0xb51fa69f, 0xcb3fbd07, 0x0000d7bf,
	0x00000000, 0x00000000, 0x00000000
};

#ifndef IEEE80211_NO_HT
static const uint32_t ar5416_vals_5g40[] = {
	0x00000460, 0x000002d0, 0x00001cc0, 0x00014000, 0x07d007d0,
	0x128d93cf, 0x08f04800, 0x00003210, 0x000003c4, 0x02020200,
	0x00000e0e, 0x0a020001, 0x00000e0e, 0x00000007, 0x1372161e,
	0x001a6a65, 0x001a6a65, 0x001a6a65, 0x6d48b4e0, 0x7ec82d2e,
	0x3139605e, 0x00049d18, 0x0001ce00, 0x409a4190, 0x050cb081,
	0x00000fa0, 0x00000370, 0xd0058a0b, 0xffb81020, 0x00000900,
	0x00000900, 0x00000900, 0x00000000, 0x001a0a00, 0x038919be,
	0x06336f77, 0x6af6532c, 0x08f186c8, 0x00046384, 0x00000000,
	0x00000000, 0x00000880, 0xd6be4788, 0x002ec1e0, 0x002ec1e0,
	0x002ec1e0, 0x1883800a, 0x00000000, 0x0a1a9caa, 0x18010000,
	0x30032602, 0x48073e06, 0x560b4c0a, 0x641a600f, 0x7a4f6e1b,
	0x8c5b7e5a, 0x9d0f96cf, 0xb51fa69f, 0xcb3fbcbf, 0x0000d7bf,
	0x00000000, 0x00000000, 0x00000000
};

static const uint32_t ar5416_vals_2g40[] = {
	0x000002c0, 0x00000318, 0x00007c70, 0x00016000, 0x10801600,
	0x12e013d7, 0x08f04810, 0x0000320a, 0x000003c4, 0x02020200,
	0x00000e0e, 0x0a020001, 0x00000e0e, 0x00000007, 0x137216a0,
	0x00197a68, 0x00197a68, 0x00197a68, 0x6d48b0de, 0x7ec82d2e,
	0x3139605e, 0x00049d18, 0x0001ce00, 0x409a4190, 0x050cb081,
	0x00001130, 0x00000268, 0xd0058a0b, 0xffb81020, 0x00012d80,
	0x00012d80, 0x00012d80, 0x00001120, 0x001a0a00, 0x038919be,
	0x06336f77, 0x6af6532c, 0x08f186c8, 0x00046384, 0x00000000,
	0x00000000, 0x00000880, 0xd03e4788, 0x002ac120, 0x002ac120,
	0x002ac120, 0x1883800a, 0x00000210, 0x0a1a7caa, 0x18010000,
	0x2e032402, 0x4a0a3c06, 0x621a540b, 0x764f6c1b, 0x845b7a5a,
	0x950f8ccf, 0xa5cf9b4f, 0xbddfaf1f, 0xd1ffc93f, 0x00000000,
	0x00000000, 0x00000000, 0x00000000
};
#endif

static const uint32_t ar5416_vals_2g20[] = {
	0x00000160, 0x0000018c, 0x00003e38, 0x0000b000, 0x08400b00,
	0x12e013ab, 0x08f04810, 0x0000320a, 0x00000300, 0x02020200,
	0x00000e0e, 0x0a020001, 0x00000e0e, 0x00000007, 0x137216a0,
	0x00197a68, 0x00197a68, 0x00197a68, 0x6c48b0de, 0x7ec82d2e,
	0x31395d5e, 0x00049d18, 0x0001ce00, 0x409a4190, 0x050cb081,
	0x00000898, 0x00000134, 0xd0058a0b, 0xffb81020, 0x00012d80,
	0x00012d80, 0x00012d80, 0x00001120, 0x001a0a00, 0x038919be,
	0x06336f77, 0x6af6532c, 0x08f186c8, 0x00046384, 0x00000000,
	0x00000000, 0x00000880, 0xd03e4788, 0x002ac120, 0x002ac120,
	0x002ac120, 0x1883800a, 0x00000108, 0x0a1a7caa, 0x18010000,
	0x2e032402, 0x4a0a3c06, 0x621a540b, 0x764f6c1b, 0x845b7a5a,
	0x950f8ccf, 0xa5cf9b4f, 0xbddfaf1f, 0xd1ffc93f, 0x00000000,
	0x00000000, 0x00000000, 0x00000000
};

static const uint16_t ar5416_cm_regs[] = {
	P(0x0000c), P(0x00030), P(0x00034), P(0x00040), P(0x00044),
	P(0x00048), P(0x0004c), P(0x00050), P(0x00054), P(0x00800),
	P(0x00804), P(0x00808), P(0x0080c), P(0x00810), P(0x00814),
	P(0x00818), P(0x0081c), P(0x00820), P(0x00824), P(0x01040),
	P(0x01044), P(0x01048), P(0x0104c), P(0x01050), P(0x01054),
	P(0x01058), P(0x0105c), P(0x01060), P(0x01064), P(0x01230),
	P(0x01270), P(0x01038), P(0x01078), P(0x010b8), P(0x010f8),
	P(0x01138), P(0x01178), P(0x011b8), P(0x011f8), P(0x01238),
	P(0x01278), P(0x012b8), P(0x012f8), P(0x01338), P(0x01378),
	P(0x013b8), P(0x013f8), P(0x01438), P(0x01478), P(0x014b8),
	P(0x014f8), P(0x01538), P(0x01578), P(0x015b8), P(0x015f8),
	P(0x01638), P(0x01678), P(0x016b8), P(0x016f8), P(0x01738),
	P(0x01778), P(0x017b8), P(0x017f8), P(0x0103c), P(0x0107c),
	P(0x010bc), P(0x010fc), P(0x0113c), P(0x0117c), P(0x011bc),
	P(0x011fc), P(0x0123c), P(0x0127c), P(0x012bc), P(0x012fc),
	P(0x0133c), P(0x0137c), P(0x013bc), P(0x013fc), P(0x0143c),
	P(0x0147c), P(0x04030), P(0x0403c), P(0x07010), P(0x07038),
	P(0x08004), P(0x08008), P(0x0800c), P(0x08018), P(0x08020),
	P(0x08038), P(0x0803c), P(0x08048), P(0x08054), P(0x08058),
	P(0x0805c), P(0x08060), P(0x08064), P(0x080c0), P(0x080c4),
	P(0x080c8), P(0x080cc), P(0x080d0), P(0x080d4), P(0x080d8),
	P(0x080e0), P(0x080e4), P(0x080e8), P(0x080ec), P(0x080f0),
	P(0x080f4), P(0x080f8), P(0x080fc), P(0x08100), P(0x08104),
	P(0x08108), P(0x0810c), P(0x08110), P(0x08118), P(0x0811c),
	P(0x08124), P(0x08128), P(0x0812c), P(0x08130), P(0x08134),
	P(0x08138), P(0x0813c), P(0x08144), P(0x08168), P(0x0816c),
	P(0x08170), P(0x08174), P(0x08178), P(0x0817c), P(0x081c4),
	P(0x081ec), P(0x081f0), P(0x081f4), P(0x081f8), P(0x081fc),
	P(0x08200), P(0x08204), P(0x08208), P(0x0820c), P(0x08210),
	P(0x08214), P(0x08218), P(0x0821c), P(0x08220), P(0x08224),
	P(0x08228), P(0x0822c), P(0x08230), P(0x08234), P(0x08238),
	P(0x0823c), P(0x08240), P(0x08244), P(0x08248), P(0x0824c),
	P(0x08250), P(0x08254), P(0x08258), P(0x0825c), P(0x08260),
	P(0x08264), P(0x08270), P(0x08274), P(0x08278), P(0x0827c),
	P(0x08284), P(0x08288), P(0x0828c), P(0x08294), P(0x08298),
	P(0x08300), P(0x08304), P(0x08308), P(0x0830c), P(0x08310),
	P(0x08314), P(0x08318), P(0x08328), P(0x0832c), P(0x08330),
	P(0x08334), P(0x08338), P(0x0833c), P(0x08340), P(0x09808),
	P(0x0980c), P(0x09810), P(0x09814), P(0x0981c), P(0x0982c),
	P(0x09830), P(0x0983c), P(0x09840), P(0x0984c), P(0x09854),
	P(0x09900), P(0x09904), P(0x09908), P(0x0990c), P(0x0991c),
	P(0x09920), P(0x0a920), P(0x0b920), P(0x09928), P(0x0992c),
	P(0x09934), P(0x09938), P(0x0993c), P(0x09948), P(0x0994c),
	P(0x09954), P(0x09958), P(0x0c95c), P(0x0c968), P(0x09970),
	P(0x09974), P(0x09978), P(0x0997c), P(0x09980), P(0x09984),
	P(0x09988), P(0x0998c), P(0x09990), P(0x09994), P(0x09998),
	P(0x0999c), P(0x099a0), P(0x099a4), P(0x099a8), P(0x099ac),
	P(0x099b0), P(0x099dc), P(0x099e0), P(0x099e4), P(0x099e8),
	P(0x099ec), P(0x099fc), P(0x09b00), P(0x09b04), P(0x09b08),
	P(0x09b0c), P(0x09b10), P(0x09b14), P(0x09b18), P(0x09b1c),
	P(0x09b20), P(0x09b24), P(0x09b28), P(0x09b2c), P(0x09b30),
	P(0x09b34), P(0x09b38), P(0x09b3c), P(0x09b40), P(0x09b44),
	P(0x09b48), P(0x09b4c), P(0x09b50), P(0x09b54), P(0x09b58),
	P(0x09b5c), P(0x09b60), P(0x09b64), P(0x09b68), P(0x09b6c),
	P(0x09b70), P(0x09b74), P(0x09b78), P(0x09b7c), P(0x09b80),
	P(0x09b84), P(0x09b88), P(0x09b8c), P(0x09b90), P(0x09b94),
	P(0x09b98), P(0x09b9c), P(0x09ba0), P(0x09ba4), P(0x09ba8),
	P(0x09bac), P(0x09bb0), P(0x09bb4), P(0x09bb8), P(0x09bbc),
	P(0x09bc0), P(0x09bc4), P(0x09bc8), P(0x09bcc), P(0x09bd0),
	P(0x09bd4), P(0x09bd8), P(0x09bdc), P(0x09be0), P(0x09be4),
	P(0x09be8), P(0x09bec), P(0x09bf0), P(0x09bf4), P(0x09bf8),
	P(0x09bfc), P(0x0a210), P(0x0a214), P(0x0a218), P(0x0a220),
	P(0x0a224), P(0x0a228), P(0x0a22c), P(0x0a234), P(0x0a238),
	P(0x0a23c), P(0x0a240), P(0x0a244), P(0x0a248), P(0x0a24c),
	P(0x0a250), P(0x0a254), P(0x0a258), P(0x0a25c), P(0x0a260),
	P(0x0a268), P(0x0a26c), P(0x0b26c), P(0x0c26c), P(0x0d270),
	P(0x0a278), P(0x0a27c), P(0x0a338), P(0x0a33c), P(0x0a340),
	P(0x0a344), P(0x0a348), P(0x0a34c), P(0x0a350), P(0x0a354),
	P(0x0a358), P(0x0d35c), P(0x0d360), P(0x0d364), P(0x0d368),
	P(0x0d36c), P(0x0d370), P(0x0d374), P(0x0d378), P(0x0d37c),
	P(0x0d380), P(0x0d384), P(0x0a388), P(0x0a38c), P(0x0a390),
	P(0x0a394), P(0x0a398), P(0x0a39c), P(0x0a3a0), P(0x0a3a4),
	P(0x0a3a8), P(0x0a3ac), P(0x0a3b0), P(0x0a3b4), P(0x0a3b8),
	P(0x0a3bc), P(0x0a3c0), P(0x0a3c4), P(0x0a3c8), P(0x0a3cc),
	P(0x0a3d0), P(0x0a3d4), P(0x0a3dc), P(0x0a3e0)
};

static const uint32_t ar5416_cm_vals[] = {
	0x00000000, 0x00020015, 0x00000005, 0x00000000, 0x00000008,
	0x00000008, 0x00000010, 0x00000000, 0x0000001f, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x002ffc0f,
	0x002ffc0f, 0x002ffc0f, 0x002ffc0f, 0x002ffc0f, 0x002ffc0f,
	0x002ffc0f, 0x002ffc0f, 0x002ffc0f, 0x002ffc0f, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000002, 0x00000002, 0x00000000, 0x000004c2,
	0x00000000, 0x00000000, 0x00000000, 0x00000700, 0x00000000,
	0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x00000000,
	0x000fc78f, 0x0000000f, 0x00000000, 0x2a82301a, 0x05dc01e0,
	0x1f402710, 0x01f40000, 0x00001e00, 0x00000000, 0x00400000,
	0xffffffff, 0x0000ffff, 0x003f3f3f, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00020000, 0x00020000, 0x00000001,
	0x00000052, 0x00000000, 0x00000168, 0x000100aa, 0x00003210,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0xffffffff, 0x00000000, 0x00000000,
	0x32143320, 0xfaa4fa50, 0x00000100, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00100000, 0x0010f400, 0x00000100, 0x0001e800,
	0x00000000, 0x00000000, 0x00000000, 0x400000ff, 0x00080922,
	0x88000010, 0x00000000, 0x40000000, 0x003e4180, 0x00000000,
	0x0000002c, 0x0000002c, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000007, 0x00000302,
	0x00000e00, 0x00070000, 0x00000000, 0x000107ff, 0x00000000,
	0xad848e19, 0x7d14e000, 0x9c0a9f6b, 0x00000000, 0x0000a000,
	0x00000000, 0x00200400, 0x206a002e, 0x1284233c, 0x00000859,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000fff,
	0x05100000, 0x05100000, 0x05100000, 0x00000001, 0x00000004,
	0x1e1f2022, 0x0a0b0c0d, 0x00000000, 0x9280b212, 0x00020028,
	0x5d50e188, 0x00081fff, 0x004b6a8e, 0x000003ce, 0x190fb515,
	0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000001, 0x001fff00, 0x00000000,
	0x03051000, 0x00000000, 0x00000200, 0xaaaaaaaa, 0x3c466478,
	0x000000aa, 0x00001042, 0x00000000, 0x00000001, 0x00000002,
	0x00000003, 0x00000004, 0x00000005, 0x00000008, 0x00000009,
	0x0000000a, 0x0000000b, 0x0000000c, 0x0000000d, 0x00000010,
	0x00000011, 0x00000012, 0x00000013, 0x00000014, 0x00000015,
	0x00000018, 0x00000019, 0x0000001a, 0x0000001b, 0x0000001c,
	0x0000001d, 0x00000020, 0x00000021, 0x00000022, 0x00000023,
	0x00000024, 0x00000025, 0x00000028, 0x00000029, 0x0000002a,
	0x0000002b, 0x0000002c, 0x0000002d, 0x00000030, 0x00000031,
	0x00000032, 0x00000033, 0x00000034, 0x00000035, 0x00000035,
	0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035,
	0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035,
	0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035,
	0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000010,
	0x0000001a, 0x40806333, 0x00106c10, 0x009c4060, 0x018830c6,
	0x00000400, 0x00000bb5, 0x00000011, 0x20202020, 0x20202020,
	0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 0x00000001,
	0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 0xdfa91f01,
	0x00000000, 0x0e79e5c6, 0x0e79e5c6, 0x0e79e5c6, 0x00820820,
	0x1ce739ce, 0x051701ce, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff,
	0x79a8aa1f, 0x07ffffef, 0x0fffffe7, 0x17ffffe5, 0x1fffffe4,
	0x37ffffe3, 0x3fffffe3, 0x57ffffe3, 0x5fffffe2, 0x7fffffe2,
	0x7f3c7bba, 0xf3307ff0, 0x08000000, 0x20202020, 0x20202020,
	0x1ce739ce, 0x000001ce, 0x00000001, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000246, 0x20202020,
	0x20202020, 0x20202020, 0x1ce739ce, 0x000001ce
};

static const struct athn_ini ar5416_ini = {
	nitems(ar5416_regs),
	ar5416_regs,
	ar5416_vals_5g20,
#ifndef IEEE80211_NO_HT
	ar5416_vals_5g40,
	ar5416_vals_2g40,
#endif
	ar5416_vals_2g20,
	nitems(ar5416_cm_regs),
	ar5416_cm_regs,
	ar5416_cm_vals
};

/*
 * AR9160 initialization values.
 */
static const uint16_t ar9160_regs[] = {
	P(0x01030), P(0x01070), P(0x010b0), P(0x010f0), P(0x08014),
	P(0x0801c), P(0x08120), P(0x081d0), P(0x09804), P(0x09820),
	P(0x09824), P(0x09828), P(0x09834), P(0x09838), P(0x09844),
	P(0x09848), P(0x0a848), P(0x0b848), P(0x09850), P(0x09858),
	P(0x0985c), P(0x09860), P(0x09864), P(0x09868), P(0x0986c),
	P(0x09914), P(0x09918), P(0x09924), P(0x09944), P(0x09960),
	P(0x0a960), P(0x0b960), P(0x09964), P(0x0c968), P(0x099bc),
	P(0x099c0), P(0x099c4), P(0x099c8), P(0x099cc), P(0x099d0),
	P(0x099d4), P(0x099d8), P(0x0a204), P(0x0a208), P(0x0a20c),
	P(0x0b20c), P(0x0c20c), P(0x0a21c), P(0x0a230), P(0x0a274),
	P(0x0a300), P(0x0a304), P(0x0a308), P(0x0a30c), P(0x0a310),
	P(0x0a314), P(0x0a318), P(0x0a31c), P(0x0a320), P(0x0a324),
	P(0x0a328), P(0x0a32c), P(0x0a330), P(0x0a334)
};

static const uint32_t ar9160_vals_5g20[] = {
	0x00000230, 0x00000168, 0x00000e60, 0x0000a000, 0x03e803e8,
	0x128d93a7, 0x08f04800, 0x00003210, 0x00000300, 0x02020200,
	0x00000e0e, 0x0a020001, 0x00000e0e, 0x00000007, 0x0372161e,
	0x001a6a65, 0x001a6a65, 0x001a6a65, 0x6c48b4e2, 0x7ec82d2e,
	0x31395d5e, 0x00048d18, 0x0001ce00, 0x409a40d0, 0x050cb081,
	0x000007d0, 0x0000000a, 0xd00a8a07, 0xffb81020, 0x00009b40,
	0x00009b40, 0x00009b40, 0x00001120, 0x000003b5, 0x001a0600,
	0x038919be, 0x06336f77, 0x6af65329, 0x08f186c8, 0x00046384,
	0x00000000, 0x00000000, 0x00000880, 0xd6be4788, 0x002fc160,
	0x002fc160, 0x002fc160, 0x1883800a, 0x00000000, 0x0a1a9caa,
	0x18010000, 0x30032602, 0x48073e06, 0x560b4c0a, 0x641a600f,
	0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 0xb51fa69f, 0xcb3fbd07,
	0x0000d7bf, 0x00000000, 0x00000000, 0x00000000
};

#ifndef IEEE80211_NO_HT
static const uint32_t ar9160_vals_5g40[] = {
	0x00000460, 0x000002d0, 0x00001cc0, 0x00014000, 0x07d007d0,
	0x128d93cf, 0x08f04800, 0x00003210, 0x000003c4, 0x02020200,
	0x00000e0e, 0x0a020001, 0x00000e0e, 0x00000007, 0x0372161e,
	0x001a6a65, 0x001a6a65, 0x001a6a65, 0x6d48b4e2, 0x7ec82d2e,
	0x3139605e, 0x00048d18, 0x0001ce00, 0x409a40d0, 0x050cb081,
	0x00000fa0, 0x00000014, 0xd00a8a07, 0xffb81020, 0x00009b40,
	0x00009b40, 0x00009b40, 0x00001120, 0x000003b5, 0x001a0600,
	0x038919be, 0x06336f77, 0x6af65329, 0x08f186c8, 0x00046384,
	0x00000000, 0x00000000, 0x00000880, 0xd6be4788, 0x002fc160,
	0x002fc160, 0x002fc160, 0x1883800a, 0x00000000, 0x0a1a9caa,
	0x18010000, 0x30032602, 0x48073e06, 0x560b4c0a, 0x641a600f,
	0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 0xb51fa69f, 0xcb3fbcbf,
	0x0000d7bf, 0x00000000, 0x00000000, 0x00000000
};

static const uint32_t ar9160_vals_2g40[] = {
	0x000002c0, 0x00000318, 0x00007c70, 0x00016000, 0x10801600,
	0x12e013d7, 0x08f04810, 0x0000320a, 0x000003c4, 0x02020200,
	0x00000e0e, 0x0a020001, 0x00000e0e, 0x00000007, 0x037216a0,
	0x00197a68, 0x00197a68, 0x00197a68, 0x6d48b0e2, 0x7ec82d2e,
	0x3139605e, 0x00048d20, 0x0001ce00, 0x409a40d0, 0x050cb081,
	0x00001130, 0x00000016, 0xd00a8a0d, 0xffb81020, 0x00009b40,
	0x00009b40, 0x00009b40, 0x00001120, 0x000003ce, 0x001a0c00,
	0x038919be, 0x06336f77, 0x6af65329, 0x08f186c8, 0x00046384,
	0x00000000, 0x00000000, 0x00000880, 0xd03e4788, 0x002ac120,
	0x002ac120, 0x002ac120, 0x1883800a, 0x00000210, 0x0a1a7caa,
	0x18010000, 0x2e032402, 0x4a0a3c06, 0x621a540b, 0x764f6c1b,
	0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 0xbddfaf1f, 0xd1ffc93f,
	0x00000000, 0x00000000, 0x00000000, 0x00000000
};
#endif

static const uint32_t ar9160_vals_2g20[] = {
	0x00000160, 0x0000018c, 0x00003e38, 0x0000b000, 0x08400b00,
	0x12e013ab, 0x08f04810, 0x0000320a, 0x00000300, 0x02020200,
	0x00000e0e, 0x0a020001, 0x00000e0e, 0x00000007, 0x037216a0,
	0x00197a68, 0x00197a68, 0x00197a68, 0x6c48b0e2, 0x7ec82d2e,
	0x31395d5e, 0x00048d20, 0x0001ce00, 0x409a40d0, 0x050cb081,
	0x00000898, 0x0000000b, 0xd00a8a0d, 0xffb81020, 0x00009b40,
	0x00009b40, 0x00009b40, 0x00001120, 0x000003ce, 0x001a0c00,
	0x038919be, 0x06336f77, 0x6af65329, 0x08f186c8, 0x00046384,
	0x00000000, 0x00000000, 0x00000880, 0xd03e4788, 0x002ac120,
	0x002ac120, 0x002ac120, 0x1883800a, 0x00000108, 0x0a1a7caa,
	0x18010000, 0x2e032402, 0x4a0a3c06, 0x621a540b, 0x764f6c1b,
	0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 0xbddfaf1f, 0xd1ffc93f,
	0x00000000, 0x00000000, 0x00000000, 0x00000000
};

static const uint16_t ar9160_cm_regs[] = {
	P(0x0000c), P(0x00030), P(0x00034), P(0x00040), P(0x00044),
	P(0x00048), P(0x0004c), P(0x00050), P(0x00054), P(0x00800),
	P(0x00804), P(0x00808), P(0x0080c), P(0x00810), P(0x00814),
	P(0x00818), P(0x0081c), P(0x00820), P(0x00824), P(0x01040),
	P(0x01044), P(0x01048), P(0x0104c), P(0x01050), P(0x01054),
	P(0x01058), P(0x0105c), P(0x01060), P(0x01064), P(0x01230),
	P(0x01270), P(0x01038), P(0x01078), P(0x010b8), P(0x010f8),
	P(0x01138), P(0x01178), P(0x011b8), P(0x011f8), P(0x01238),
	P(0x01278), P(0x012b8), P(0x012f8), P(0x01338), P(0x01378),
	P(0x013b8), P(0x013f8), P(0x01438), P(0x01478), P(0x014b8),
	P(0x014f8), P(0x01538), P(0x01578), P(0x015b8), P(0x015f8),
	P(0x01638), P(0x01678), P(0x016b8), P(0x016f8), P(0x01738),
	P(0x01778), P(0x017b8), P(0x017f8), P(0x0103c), P(0x0107c),
	P(0x010bc), P(0x010fc), P(0x0113c), P(0x0117c), P(0x011bc),
	P(0x011fc), P(0x0123c), P(0x0127c), P(0x012bc), P(0x012fc),
	P(0x0133c), P(0x0137c), P(0x013bc), P(0x013fc), P(0x0143c),
	P(0x0147c), P(0x04030), P(0x0403c), P(0x07010), P(0x07038),
	P(0x08004), P(0x08008), P(0x0800c), P(0x08018), P(0x08020),
	P(0x08038), P(0x0803c), P(0x08048), P(0x08054), P(0x08058),
	P(0x0805c), P(0x08060), P(0x08064), P(0x080c0), P(0x080c4),
	P(0x080c8), P(0x080cc), P(0x080d0), P(0x080d4), P(0x080d8),
	P(0x080e0), P(0x080e4), P(0x080e8), P(0x080ec), P(0x080f0),
	P(0x080f4), P(0x080f8), P(0x080fc), P(0x08100), P(0x08104),
	P(0x08108), P(0x0810c), P(0x08110), P(0x08118), P(0x0811c),
	P(0x08124), P(0x08128), P(0x0812c), P(0x08130), P(0x08134),
	P(0x08138), P(0x0813c), P(0x08144), P(0x08168), P(0x0816c),
	P(0x08170), P(0x08174), P(0x08178), P(0x0817c), P(0x081c4),
	P(0x081ec), P(0x081f0), P(0x081f4), P(0x081f8), P(0x081fc),
	P(0x08200), P(0x08204), P(0x08208), P(0x0820c), P(0x08210),
	P(0x08214), P(0x08218), P(0x0821c), P(0x08220), P(0x08224),
	P(0x08228), P(0x0822c), P(0x08230), P(0x08234), P(0x08238),
	P(0x0823c), P(0x08240), P(0x08244), P(0x08248), P(0x0824c),
	P(0x08250), P(0x08254), P(0x08258), P(0x0825c), P(0x08260),
	P(0x08264), P(0x08270), P(0x08274), P(0x08278), P(0x0827c),
	P(0x08284), P(0x08288), P(0x0828c), P(0x08294), P(0x08298),
	P(0x08300), P(0x08304), P(0x08308), P(0x0830c), P(0x08310),
	P(0x08314), P(0x08318), P(0x08328), P(0x0832c), P(0x08330),
	P(0x08334), P(0x08338), P(0x0833c), P(0x08340), P(0x09808),
	P(0x0980c), P(0x09810), P(0x09814), P(0x0981c), P(0x0982c),
	P(0x09830), P(0x0983c), P(0x09840), P(0x0984c), P(0x09854),
	P(0x09900), P(0x09904), P(0x09908), P(0x0990c), P(0x0991c),
	P(0x09920), P(0x0a920), P(0x0b920), P(0x09928), P(0x0992c),
	P(0x09934), P(0x09938), P(0x0993c), P(0x09948), P(0x0994c),
	P(0x09954), P(0x09958), P(0x09940), P(0x0c95c), P(0x09970),
	P(0x09974), P(0x09978), P(0x0997c), P(0x09980), P(0x09984),
	P(0x09988), P(0x0998c), P(0x09990), P(0x09994), P(0x09998),
	P(0x0999c), P(0x099a0), P(0x099a4), P(0x099a8), P(0x099ac),
	P(0x099b0), P(0x099dc), P(0x099e0), P(0x099e4), P(0x099e8),
	P(0x099ec), P(0x099fc), P(0x09b00), P(0x09b04), P(0x09b08),
	P(0x09b0c), P(0x09b10), P(0x09b14), P(0x09b18), P(0x09b1c),
	P(0x09b20), P(0x09b24), P(0x09b28), P(0x09b2c), P(0x09b30),
	P(0x09b34), P(0x09b38), P(0x09b3c), P(0x09b40), P(0x09b44),
	P(0x09b48), P(0x09b4c), P(0x09b50), P(0x09b54), P(0x09b58),
	P(0x09b5c), P(0x09b60), P(0x09b64), P(0x09b68), P(0x09b6c),
	P(0x09b70), P(0x09b74), P(0x09b78), P(0x09b7c), P(0x09b80),
	P(0x09b84), P(0x09b88), P(0x09b8c), P(0x09b90), P(0x09b94),
	P(0x09b98), P(0x09b9c), P(0x09ba0), P(0x09ba4), P(0x09ba8),
	P(0x09bac), P(0x09bb0), P(0x09bb4), P(0x09bb8), P(0x09bbc),
	P(0x09bc0), P(0x09bc4), P(0x09bc8), P(0x09bcc), P(0x09bd0),
	P(0x09bd4), P(0x09bd8), P(0x09bdc), P(0x09be0), P(0x09be4),
	P(0x09be8), P(0x09bec), P(0x09bf0), P(0x09bf4), P(0x09bf8),
	P(0x09bfc), P(0x0a210), P(0x0a214), P(0x0a218), P(0x0a220),
	P(0x0a224), P(0x0a228), P(0x0a22c), P(0x0a234), P(0x0a238),
	P(0x0a23c), P(0x0a240), P(0x0a244), P(0x0a248), P(0x0a24c),
	P(0x0a250), P(0x0a254), P(0x0a258), P(0x0a25c), P(0x0a260),
	P(0x0a268), P(0x0a26c), P(0x0b26c), P(0x0c26c), P(0x0d270),
	P(0x0a278), P(0x0a27c), P(0x0a338), P(0x0a33c), P(0x0a340),
	P(0x0a344), P(0x0a348), P(0x0a34c), P(0x0a350), P(0x0a354),
	P(0x0a358), P(0x0d35c), P(0x0d360), P(0x0d364), P(0x0d368),
	P(0x0d36c), P(0x0d370), P(0x0d374), P(0x0d378), P(0x0d37c),
	P(0x0d380), P(0x0d384), P(0x0a388), P(0x0a38c), P(0x0a390),
	P(0x0a394), P(0x0a398), P(0x0a39c), P(0x0a3a0), P(0x0a3a4),
	P(0x0a3a8), P(0x0a3ac), P(0x0a3b0), P(0x0a3b4), P(0x0a3b8),
	P(0x0a3bc), P(0x0a3c0), P(0x0a3c4), P(0x0a3c8), P(0x0a3cc),
	P(0x0a3d0), P(0x0a3d4), P(0x0a3dc), P(0x0a3e0)
};

static const uint32_t ar9160_cm_vals[] = {
	0x00000000, 0x00020015, 0x00000005, 0x00000000, 0x00000008,
	0x00000008, 0x00000010, 0x00000000, 0x0000001f, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x002ffc0f,
	0x002ffc0f, 0x002ffc0f, 0x002ffc0f, 0x002ffc0f, 0x002ffc0f,
	0x002ffc0f, 0x002ffc0f, 0x002ffc0f, 0x002ffc0f, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000002, 0x00000002, 0x00000020, 0x000004c2,
	0x00000000, 0x00000000, 0x00000000, 0x00000700, 0x00000000,
	0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x00000000,
	0x000fc78f, 0x0000000f, 0x00000000, 0x2a82301a, 0x05dc01e0,
	0x1f402710, 0x01f40000, 0x00001e00, 0x00000000, 0x00400000,
	0xffffffff, 0x0000ffff, 0x003f3f3f, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00020000, 0x00020000, 0x00000001,
	0x00000052, 0x00000000, 0x00000168, 0x000100aa, 0x00003210,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0xffffffff, 0x00000000, 0x00000000,
	0x32143320, 0xfaa4fa50, 0x00000100, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00100000, 0x0010f400, 0x00000100, 0x0001e800,
	0x00000000, 0x00000000, 0x00000000, 0x400000ff, 0x00080922,
	0x88a00010, 0x00000000, 0x40000000, 0x003e4180, 0x00000000,
	0x0000002c, 0x0000002c, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000007, 0x00000302,
	0x00000e00, 0x00ff0000, 0x00000000, 0x000107ff, 0x00000000,
	0xad848e19, 0x7d14e000, 0x9c0a9f6b, 0x00000000, 0x0000a000,
	0x00000000, 0x00200400, 0x206a01ae, 0x1284233c, 0x00000859,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000fff,
	0x05100000, 0x05100000, 0x05100000, 0x00000001, 0x00000004,
	0x1e1f2022, 0x0a0b0c0d, 0x00000000, 0x9280b212, 0x00020028,
	0x5f3ca3de, 0x2108ecff, 0x00750604, 0x004b6a8e, 0x190fb515,
	0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000001, 0x201fff00, 0x006f0000,
	0x03051000, 0x00000000, 0x00000200, 0xaaaaaaaa, 0x3c466478,
	0x0cc80caa, 0x00001042, 0x00000000, 0x00000001, 0x00000002,
	0x00000003, 0x00000004, 0x00000005, 0x00000008, 0x00000009,
	0x0000000a, 0x0000000b, 0x0000000c, 0x0000000d, 0x00000010,
	0x00000011, 0x00000012, 0x00000013, 0x00000014, 0x00000015,
	0x00000018, 0x00000019, 0x0000001a, 0x0000001b, 0x0000001c,
	0x0000001d, 0x00000020, 0x00000021, 0x00000022, 0x00000023,
	0x00000024, 0x00000025, 0x00000028, 0x00000029, 0x0000002a,
	0x0000002b, 0x0000002c, 0x0000002d, 0x00000030, 0x00000031,
	0x00000032, 0x00000033, 0x00000034, 0x00000035, 0x00000035,
	0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035,
	0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035,
	0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035,
	0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000010,
	0x0000001a, 0x40806333, 0x00106c10, 0x009c4060, 0x018830c6,
	0x00000400, 0x001a0bb5, 0x00000000, 0x20202020, 0x20202020,
	0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 0x00000001,
	0x0000e000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 0xdfa91f01,
	0x00000001, 0x0e79e5c6, 0x0e79e5c6, 0x0e79e5c6, 0x00820820,
	0x1ce739ce, 0x050701ce, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff,
	0x79bfaa03, 0x07ffffef, 0x0fffffe7, 0x17ffffe5, 0x1fffffe4,
	0x37ffffe3, 0x3fffffe3, 0x57ffffe3, 0x5fffffe2, 0x7fffffe2,
	0x7f3c7bba, 0xf3307ff0, 0x0c000000, 0x20202020, 0x20202020,
	0x1ce739ce, 0x000001ce, 0x00000001, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000246, 0x20202020,
	0x20202020, 0x20202020, 0x1ce739ce, 0x000001ce
};

static const struct athn_ini ar9160_ini = {
	nitems(ar9160_regs),
	ar9160_regs,
	ar9160_vals_5g20,
#ifndef IEEE80211_NO_HT
	ar9160_vals_5g40,
	ar9160_vals_2g40,
#endif
	ar9160_vals_2g20,
	nitems(ar9160_cm_regs),
	ar9160_cm_regs,
	ar9160_cm_vals
};

/*
 * BB/RF Gains common to AR5416 and AR9160.
 */
static const uint32_t ar5416_bb_rfgain_vals_5g[] = {
	0x00000000, 0x00000040, 0x00000080, 0x000001a1, 0x000001e1,
	0x00000021, 0x00000061, 0x00000168, 0x000001a8, 0x000001e8,
	0x00000028, 0x00000068, 0x00000189, 0x000001c9, 0x00000009,
	0x00000049, 0x00000089, 0x00000170, 0x000001b0, 0x000001f0,
	0x00000030, 0x00000070, 0x00000191, 0x000001d1, 0x00000011,
	0x00000051, 0x00000091, 0x000001b8, 0x000001f8, 0x00000038,
	0x00000078, 0x00000199, 0x000001d9, 0x00000019, 0x00000059,
	0x00000099, 0x000000d9, 0x000000f9, 0x000000f9, 0x000000f9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9
};

static const uint32_t ar5416_bb_rfgain_vals_2g[] = {
	0x00000000, 0x00000040, 0x00000080, 0x00000141, 0x00000181,
	0x000001c1, 0x00000001, 0x00000041, 0x000001a8, 0x000001e8,
	0x00000028, 0x00000068, 0x000000a8, 0x00000169, 0x000001a9,
	0x000001e9, 0x00000029, 0x00000069, 0x00000190, 0x000001d0,
	0x00000010, 0x00000050, 0x00000090, 0x00000151, 0x00000191,
	0x000001d1, 0x00000011, 0x00000051, 0x00000198, 0x000001d8,
	0x00000018, 0x00000058, 0x00000098, 0x00000159, 0x00000199,
	0x000001d9, 0x00000019, 0x00000059, 0x00000099, 0x000000d9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9,
	0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9
};

static const uint32_t ar5416_2_1_addac_vals[] = {
	0x00000000, 0x00000003, 0x00000000, 0x0000000c, 0x00000000,
	0x00000030, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000060, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000
};

static const struct athn_addac ar5416_2_1_addac = {
	nitems(ar5416_2_1_addac_vals),
	ar5416_2_1_addac_vals
};

static const uint32_t ar5416_2_2_addac_vals[] = {
	0x00000000, 0x00000003, 0x00000000, 0x0000000c, 0x00000000,
	0x00000030, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000060, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000058, 0x00000000, 0x00000000, 0x00000000,
	0x00000000
};

static const struct athn_addac ar5416_2_2_addac = {
	nitems(ar5416_2_2_addac_vals),
	ar5416_2_2_addac_vals
};

static const uint32_t ar9160_1_0_addac_vals[] = {
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x000000c0, 0x00000018, 0x00000004, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x000000c0, 0x00000019, 0x00000004, 0x00000000,
	0x00000000, 0x00000000, 0x00000004, 0x00000003, 0x00000008,
	0x00000000
};

static const struct athn_addac ar9160_1_0_addac = {
	nitems(ar9160_1_0_addac_vals),
	ar9160_1_0_addac_vals
};

static const uint32_t ar9160_1_1_addac_vals[] = {
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x000000c0, 0x00000018, 0x00000004, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000, 0x000000c0, 0x00000019, 0x00000004, 0x00000000,
	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
	0x00000000
};

static const struct athn_addac ar9160_1_1_addac = {
	nitems(ar9160_1_1_addac_vals),
	ar9160_1_1_addac_vals
};

static const uint32_t ar5416_bank6tpc_vals[] = {
	0x00000000, 0x00000000, 0x00000000, 0x00e00000, 0x005e0000,
	0x00120000, 0x00620000, 0x00020000, 0x00ff0000, 0x00ff0000,
	0x00ff0000, 0x40ff0000, 0x005f0000, 0x00870000, 0x00f90000,
	0x007b0000, 0x00ff0000, 0x00f50000, 0x00dc0000, 0x00110000,
	0x006100a8, 0x00423022, 0x201400df, 0x00c40002, 0x003000f2,
	0x00440016, 0x00410040, 0x0001805e, 0x0000c0ab, 0x000000e1,
	0x00007081, 0x000000d4
};

static const uint32_t ar9160_bank6tpc_vals[] = {
	0x00000000, 0x00000000, 0x00000000, 0x00e00000, 0x005e0000,
	0x00120000, 0x00620000, 0x00020000, 0x00ff0000, 0x00ff0000,
	0x00ff0000, 0x40ff0000, 0x005f0000, 0x00870000, 0x00f90000,
	0x007b0000, 0x00ff0000, 0x00f50000, 0x00dc0000, 0x00110000,
	0x006100a8, 0x00423022, 0x2014008f, 0x00c40002, 0x003000f2,
	0x00440016, 0x00410040, 0x0001805e, 0x0000c0ab, 0x000000e1,
	0x00007080, 0x000000d4
};

static const uint32_t ar5416_bank6_vals[] = {
	0x00000000, 0x00000000, 0x00000000, 0x00e00000, 0x005e0000,
	0x00120000, 0x00620000, 0x00020000, 0x00ff0000, 0x00ff0000,
	0x00ff0000, 0x40ff0000, 0x005f0000, 0x00870000, 0x00f90000,
	0x007b0000, 0x00ff0000, 0x00f50000, 0x00dc0000, 0x00110000,
	0x006100a8, 0x004210a2, 0x0014008f, 0x00c40003, 0x003000f2,
	0x00440016, 0x00410040, 0x0001805e, 0x0000c0ab, 0x000000f1,
	0x00002081, 0x000000d4
};

/*
 * Serializer/Deserializer programming.
 */

static const uint32_t ar5416_serdes_regs[] = {
	AR_PCIE_SERDES,
	AR_PCIE_SERDES,
	AR_PCIE_SERDES,
	AR_PCIE_SERDES,
	AR_PCIE_SERDES,
	AR_PCIE_SERDES,
	AR_PCIE_SERDES,
	AR_PCIE_SERDES,
	AR_PCIE_SERDES,
	AR_PCIE_SERDES2
};

static const uint32_t ar5416_serdes_vals[] = {
	0x9248fc00,
	0x24924924,
	/* RX shut off when elecidle is asserted. */
	0x28000039,
	0x53160824,
	0xe5980579,
	0x001defff,
	0x1aaabe40,
	0xbe105554,
	0x000e3007,
	0x00000000
};

static const struct athn_serdes ar5416_serdes = {
	nitems(ar5416_serdes_vals),
	ar5416_serdes_regs,
	ar5416_serdes_vals,
};

license: unknown