code:
#	$OpenBSD: Makefile,v 1.7 2013/12/08 14:46:39 espie Exp $

S=	${.CURDIR}/../..
KFILE=	GENERIC
.if exists(conf/GENERIC.MP)
KFILE=	GENERIC.MP
.endif
TDIRS=	${_arch} include
TAGS=	${.CURDIR}/tags

NOPROG=
NOMAN=
NOOBJ=
SUBDIR=	stand

# config the fattest kernel we can find into a temporary dir
# to create a Makefile.  Then use make to pull some variables
# out and push them into the sub-shell to expand the paths,
# and finally run ctags.
tags::
	TDIR=`mktemp -d /tmp/_tagXXXXXXXXXX` || exit 1; \
	eval "S=${S}" && \
	config -s ${S} -b $${TDIR} ${.CURDIR}/conf/${KFILE} && \
	eval "_arch=\"`make -V _arch -f $${TDIR}/Makefile`\"" && \
	eval "_mach=\"`make -V _mach -f $${TDIR}/Makefile`\"" && \
	eval "_machdir=\$S/arch/$${_mach}" && \
	eval "_archdir=\$S/arch/$${_arch}" && \
	eval "HFILES=\"`find $S \( -path $S/'arch' -o -path $S/stand -o -path $S/lib/libsa -o -path $S'/lib/libkern/arch' \) -prune -o -name '*.h'; find $${_machdir} $${_archdir} $S/lib/libkern/arch/$${_mach} \( -name boot -o -name stand \) -prune -o -name '*.h'`\"" && \
	eval "SFILES=\"`make -V SFILES -f $${TDIR}/Makefile`\"" && \
	eval "CFILES=\"`make -V CFILES -f $${TDIR}/Makefile`\"" && \
	eval "AFILES=\"`make -V AFILES -f $${TDIR}/Makefile`\"" && \
	ctags -wd -f ${TAGS} $${CFILES} $${HFILES} && \
	egrep "^[_A-Z]*ENTRY[_A-Z]*\(.*\)" $${SFILES} $${AFILES} | \
	    sed "s;\\([^:]*\\):\\([^(]*\\)(\\([^, )]*\\)\\(.*\\);\\3	\\1	/^\\2(\\3\\4$$/;" \
	    >> ${TAGS} && \
	sort -o ${TAGS} ${TAGS} && \
	rm -rf $${TDIR}

links:
	-for i in conf ${TDIRS}; do \
	    (cd $$i && rm -f tags; ln -s tags tags); done

obj:	_SUBDIRUSE

.include <bsd.prog.mk>

path: sys/arch/landisk/Makefile


path: sys/arch/landisk/compile/CVS/Entries

license: unknown


code: src/sys/arch/landisk/compile

path: sys/arch/landisk/compile/CVS/Repository


code:
/GENERIC/1.49/Thu Apr 16 09:09:49 2015//TOPENBSD_5_8_BASE
/Makefile.landisk/1.53/Tue Jan 13 01:12:49 2015//TOPENBSD_5_8_BASE
/RAMDISK/1.24/Fri Jul 17 22:52:28 2015//TOPENBSD_5_8_BASE
/files.landisk/1.11/Sat Oct 18 12:21:56 2014//TOPENBSD_5_8_BASE
D

path: sys/arch/landisk/conf/CVS/Entries


code: src/sys/arch/landisk/conf

path: sys/arch/landisk/conf/CVS/Repository


code:
# $OpenBSD: GENERIC,v 1.49 2015/04/16 09:09:49 mpi Exp $
#
# For further information on compiling OpenBSD kernels, see the config(8)
# man page.
#
# For further information on hardware support for this architecture, see
# the intro(4) man page.  For further information about kernel options
# for this architecture, see the options(4) man page.  For an explanation
# of each device driver in this file see the section 4 man page for the
# device.

machine		landisk	sh
include		"../../../conf/GENERIC"
maxusers	32			# estimated number of users

option	 	SH4			# processor family; MANDATORY
option 		SH7751R			# processor type; MANDATORY

# CPU-related options.
option	 	PCLOCK=33333333		# 33.33MHz clock
option	 	DONT_INIT_BSC
#option	 	DONT_INIT_PCIBSC

option		PCIVERBOSE
option		USER_PCICONF		# user-space PCI configuration
option		USBVERBOSE

config		bsd	swap generic

mainbus0 at root
cpu0	at mainbus?

# PCI bus support
shpcic*	at mainbus?			# SH7751 PCIC
pci0	at shpcic?

# SH bus
shb*	at mainbus?

# on-board I/O bus
obio0	at mainbus?

# Serial Devices
option	SCIFCONSOLE
option	SCIFCN_SPEED=9600
scif0	at shb?

# Power switch
power0	at obio?

rsclock0 at shb?

wdc0	at obio? port 0x14000000 irq 10		# CF
wd*	at wdc? flags 0x0000

# Network Interfaces

# PCI network interfaces
re*	at pci?				# Realtek 8139C+/8169/8169S/8110S
rl*	at pci?				# Realtek 8129/8139

# MII/PHY support
acphy*	at mii?				# Altima AC101 PHYs
amphy*	at mii?				# AMD 79C873 PHYs
eephy*	at mii?				# Marvell 88E1000 series PHY
rgephy*	at mii?				# Realtek 8169S/8110S PHY
rlphy*	at mii? 			# Realtek 8139/8201L PHYs
urlphy*	at mii?				# Realtek RTL8150L internal PHYs
ukphy*	at mii?				# generic unknown PHYs

# PCIIDE
pciide*		at pci?
wd*		at pciide?
atapiscsi*	at pciide? flags 0x0000

# USB Controller and Devices

# PCI USB controllers
ehci*	at pci?				# Enhanced Host Controller
ohci*	at pci?				# Open Host Controller

# USB bus support
usb*	at ehci?
usb*	at ohci?

# USB Hubs
uhub*	at usb?
uhub*	at uhub? port ? configuration ? interface ?
ualea*	at uhub?		# Araneus Alea II TRNG
umodem*	at uhub?		# USB Modems/Serial
ucom*	at umodem?
uvisor*	at uhub?		# Handspring Visor
ucom*	at uvisor?
uvscom*	at uhub?		# SUNTAC Slipper U VS-10U serial
ucom*	at uvscom?
ubsa*	at uhub?		# Belkin serial adapter
ucom*	at ubsa?
uftdi*	at uhub?		# FTDI FT8U100AX serial adapter
ucom*	at uftdi?
uplcom* at uhub?		# I/O DATA USB-RSAQ2 serial adapter
ucom*	at uplcom?
umct*	at uhub?		# MCT USB-RS232 serial adapter
ucom*	at umct?
uslcom*	at uhub?		# Silicon Laboratories CP210x serial
ucom*	at uslcom?
uark*	at uhub?		# Arkmicro ARK3116 serial
ucom*	at uark?
moscom*	at uhub?		# MosChip MCS7703 serial
ucom*	at moscom?
umcs*	at uhub?		# MosChip MCS78x0 serial
ucom*	at umcs?
uipaq*	at uhub?		# iPAQ serial adapter
ucom*	at uipaq?
umsm*	at uhub?		# Qualcomm MSM EVDO
ucom*	at umsm?
uchcom*	at uhub?		# WinChipHead CH341/340 serial
ucom*	at uchcom?
uaudio* at uhub?		# USB Audio
audio*	at uaudio?
#umidi*	at uhub?		# USB MIDI
#midi*	at umidi?
ulpt*	at uhub?		# USB Printers
umass*	at uhub?		# USB Mass Storage devices
uhidev*	at uhub?		# Human Interface Devices
ums*	at uhidev?		# USB mouse
wsmouse* at ums? mux 0
ukbd*	at uhidev?		# USB keyboard
wskbd*	at ukbd? mux 1
ucycom*	at uhidev?		# Cypress serial
ucom*	at ucycom?
uslhcom* at uhidev?		# Silicon Labs CP2110 USB HID UART
ucom*	at uslhcom?
uhid*	at uhidev?		# USB generic HID support
upd*	at uhidev?		# USB Power Devices sensors
aue*	at uhub?		# ADMtek AN986 Pegasus Ethernet
atu*	at uhub?		# Atmel AT76c50x based 802.11b
axe*	at uhub?		# ASIX Electronics AX88172 USB Ethernet
axen*	at uhub?		# ASIX Electronics AX88179 USB Ethernet
cue*	at uhub?		# CATC USB-EL1201A based Ethernet
kue*	at uhub?		# Kawasaki KL5KUSB101B based Ethernet
smsc*	at uhub?		# SMSC LAN95xx Ethernet
cdce*	at uhub?		# CDC Ethernet
urndis*	at uhub?		# Remote NDIS Ethernet
upl*	at uhub?		# Prolific PL2301/PL2302 host-to-host `network'
ugl*	at uhub?		# Genesys Logic GL620USB-A host-to-host `network'
udav*	at uhub?		# Davicom DM9601 based Ethernet
url*	at uhub?		# Realtek RTL8150L based adapters
wi*	at uhub?		# WaveLAN IEEE 802.11DS
udsbr*	at uhub?		# D-Link DSB-R100 radio
radio*	at udsbr?		# USB radio
ugen*	at uhub?		# USB Generic driver
uath*	at uhub?		# Atheros AR5005UG/AR5005UX
athn*	at uhub?		# Atheros AR9002U
ural*	at uhub?		# Ralink RT2500USB
rum*	at uhub?		# Ralink RT2501USB/RT2601USB
run*	at uhub?		# Ralink RT2700U/RT2800U/RT3000U
rsu*	at uhub?		# Realtek RTL8188SU/RTL8191SU/RTL8192SU
urtwn*	at uhub?		# Realtek RTL8188CU/RTL8192CU
zyd*	at uhub?		# Zydas ZD1211
udcf*	at uhub?		# Gude Expert mouseCLOCK
uthum*	at uhidev?		# TEMPerHUM sensor
ugold*	at uhidev?		# gold TEMPer sensor
utwitch* at uhidev?		# YUREX BBU sensor
#uow*	at uhub?		# Maxim/Dallas DS2490 1-Wire adapter
#onewire* at uow?

udl*		at uhub?
wsdisplay*	at udl?

scsibus* at scsi?
sd*	at scsibus?			# SCSI disk drives
cd*	at scsibus?			# SCSI CD-ROM drives

pseudo-device	hotplug		1	# devices hot plugging
pseudo-device	wsmux		2	# mouse & keyboard multiplexor

path: sys/arch/landisk/conf/GENERIC


code:
#	$OpenBSD: Makefile.landisk,v 1.53 2015/01/13 01:12:49 deraadt Exp $

# For instructions on building kernels consult the config(8) and options(4)
# manual pages.
#
# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
#	IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
# DEBUG is set to -g by config if debugging is requested (config -g).
# PROF is set to -pg by config if profiling is requested (config -p).

.include <bsd.own.mk>

SIZE?=	size
STRIP?=	strip

# source tree is located via $S relative to the compilation directory
.ifndef S
S!=	cd ../../../..; pwd
.endif

_machdir?=	$S/arch/${_mach}
_archdir?=	$S/arch/${_arch}

INCLUDES=	-nostdinc -I$S -I. -I$S/arch
CPPFLAGS=	${INCLUDES} ${IDENT} ${PARAM} -D_KERNEL -D__${_mach}__ -MD -MP
CWARNFLAGS=	-Werror -Wall -Wimplicit-function-declaration \
		-Wno-main -Wno-uninitialized \
		-Wframe-larger-than=2047

CMACHFLAGS=	-m4-nofpu
CMACHFLAGS+=	-fno-builtin-printf -fno-builtin-snprintf \
		-fno-builtin-vsnprintf -fno-builtin-log \
		-fno-builtin-log2 -fno-builtin-malloc ${NOPIE_FLAGS}
.if ${IDENT:M-DNO_PROPOLICE}
CMACHFLAGS+=	-fno-stack-protector
.endif

COPTS?=		-O2
CFLAGS=		${DEBUG} ${CWARNFLAGS} ${CMACHFLAGS} ${COPTS} ${PIPE}
AFLAGS=		-D_LOCORE -x assembler-with-cpp ${CWARNFLAGS} ${CMACHFLAGS}
LINKFLAGS=	-N -Ttext 0x8c002000 -e start --warn-common -nopie

.if ${IDENT:M-DDDB_STRUCT}
DB_STRUCTINFO=	db_structinfo.h
.else
DB_STRUCTINFO=
.endif

HOSTCC?=	${CC}
HOSTED_CPPFLAGS=${CPPFLAGS:S/^-nostdinc$//}
HOSTED_CFLAGS=	${CFLAGS}
HOSTED_C=	${HOSTCC} ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} -c $<

NORMAL_C_NOP=	${CC} ${CFLAGS} ${CPPFLAGS} -c $<
NORMAL_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
NORMAL_S=	${CC} ${AFLAGS} ${CPPFLAGS} -c $<

%OBJS

%CFILES

%SFILES

# load lines for config "xxx" will be emitted as:
# xxx: ${SYSTEM_DEP} swapxxx.o
#	${SYSTEM_LD_HEAD}
#	${SYSTEM_LD} swapxxx.o
#	${SYSTEM_LD_TAIL}
SYSTEM_HEAD=	locore.o param.o ioconf.o
SYSTEM_OBJ=	${SYSTEM_HEAD} ${OBJS}
SYSTEM_DEP=	Makefile ${SYSTEM_OBJ}
SYSTEM_LD_HEAD=	@rm -f $@
SYSTEM_LD=	@echo ${LD} ${LINKFLAGS} -o $@ '$${SYSTEM_HEAD} vers.o $${OBJS}'; \
		${LD} ${LINKFLAGS} -o $@ ${SYSTEM_HEAD} vers.o ${OBJS}
SYSTEM_LD_TAIL=	@${SIZE} $@; chmod 755 $@

DEBUG?=
.if ${DEBUG} == "-g"
LINKFLAGS+=	-X
STRIPFLAGS=	-g -x
SYSTEM_LD_TAIL+=; \
		echo mv $@ $@.gdb; rm -f $@.gdb; mv $@ $@.gdb; \
		echo ${STRIP} ${STRIPFLAGS} -o $@ $@.gdb; \
		${STRIP} ${STRIPFLAGS} -o $@ $@.gdb
.else
LINKFLAGS+=	-S -x
.endif

%LOAD

# cc's -MD puts the source and output paths in the dependency file;
# since those are temp files here we need to fix it up.  It also
# puts the file in /tmp, so we use -MF to put it in the current
# directory as assym.P and then generate assym.d from it with a
# good target name
assym.h: $S/kern/genassym.sh Makefile \
	 ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf
	cat ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf | \
	    sh $S/kern/genassym.sh ${CC} ${CFLAGS} ${CPPFLAGS} -MF assym.P > assym.h.tmp
	sed '1s/.*/assym.h: \\/' assym.P > assym.d
	sort -u assym.h.tmp > assym.h

param.c: $S/conf/param.c
	rm -f param.c
	cp $S/conf/param.c .

param.o: param.c Makefile
	${NORMAL_C}

mcount.o: $S/lib/libkern/mcount.c Makefile
	${NORMAL_C_NOP}

ioconf.o: ioconf.c
	${NORMAL_C}

vers.o: ${SYSTEM_DEP} ${SYSTEM_SWAP_DEP}
	sh $S/conf/newvers.sh
	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c

clean::
	rm -f eddep *bsd *bsd.gdb tags *.[dio] [a-z]*.s \
	    [Ee]rrs linterrs assym.h ${DB_STRUCTINFO}

lint:
	@lint -hbxncez -Dvolatile= ${CPPFLAGS} -UKGDB \
	    ${CFILES} ioconf.c param.c | \
	    grep -v 'static function .* unused'

depend:
	@touch $@

tags:
	@echo "see $S/kern/Makefile for tags"

db_structinfo.h: $S/ddb/db_structinfo.c $S/ddb/parse_structinfo.pl
	${CC} ${CFLAGS} ${CPPFLAGS} -MT $@ -gstabs -c $S/ddb/db_structinfo.c
	objdump -g db_structinfo.o | perl $S/ddb/parse_structinfo.pl > $@
	rm -f db_structinfo.o

locore.o: ${_machdir}/${_mach}/locore.S assym.h
locore_subr.o vectors.o in_cksum.o: assym.h

# The install target can be redefined by putting a
# install-kernel-${MACHINE_NAME} target into /etc/mk.conf
MACHINE_NAME!=  uname -n
install: install-kernel-${MACHINE_NAME}
.if !target(install-kernel-${MACHINE_NAME}})
install-kernel-${MACHINE_NAME}:
	cmp -s bsd /bsd || ln -f /bsd /obsd
	cp bsd /nbsd
	mv /nbsd /bsd
.endif

# pull in the dependency information
.if !empty(DB_STRUCTINFO) && !exists(${DB_STRUCTINFO})
 ${SYSTEM_OBJ}: ${DB_STRUCTINFO}
.endif
.ifnmake clean
. for o in ${SYSTEM_OBJ} assym.h ${DB_STRUCTINFO}
.  if exists(${o:R}.d)
.   include "${o:R}.d"
.  elif exists($o)
    .PHONY: $o
.  endif
. endfor
.endif

%RULES


code:
#	$OpenBSD: RAMDISK,v 1.24 2015/07/17 22:52:28 tedu Exp $

machine		landisk	sh
maxusers	4

option		TIMEZONE=0
option		DST=0
option		SMALL_KERNEL
option		NO_PROPOLICE
option		BOOT_CONFIG

option		MINIROOTSIZE=5120
option		RAMDISK_HOOKS

option		PCIVERBOSE
option		USBVERBOSE

option		FFS
option		CD9660
option		MSDOSFS
option		EXT2FS
option		INET6

config		bsd root on rd0a swap on rd0b

option		SH4		# processor family; MANDATORY
option		SH7751R		# processor type; MANDATORY
option		PCLOCK=33333333	# 33.33MHz clock
option		DONT_INIT_BSC
#option		DONT_INIT_PCIBSC

mainbus0	at root
cpu0		at mainbus?

shpcic*		at mainbus?
pci0		at shpcic?
shb*		at mainbus?
obio0		at mainbus?

option		SCIFCONSOLE
option		SCIFCN_SPEED=9600
scif0		at shb?

rsclock0	at shb?

wdc0		at obio? port 0x14000000 irq 10
wd*		at wdc? flags 0x0000

re*		at pci?			# Realtek 8139C+/8169/8169S/8110S
rl*		at pci?			# Realtek 8129/8139

acphy*		at mii?			# Altima AC101 PHYs
amphy*		at mii?			# AMD 79C873 PHYs
eephy*		at mii?			# Marvell 88E1000 series PHY
rgephy*		at mii?			# Realtek 8169S/8110S PHY
rlphy*		at mii?			# Realtek 8139/8201L PHYs
urlphy*		at mii?			# Realtek RTL8150L internal PHYs
ukphy*		at mii?			# generic unknown PHYs

pciide*		at pci?
wd*		at pciide?
atapiscsi*	at pciide? flags 0x0000

ehci*		at pci?
ohci*		at pci?
usb*		at ehci?
usb*		at ohci?

uhub*		at usb?
uhub*		at uhub?
umass*		at uhub?
aue*		at uhub?		# ADMtek AN986 Pegasus Ethernet
atu*		at uhub?		# Atmel AT76c50x based 802.11b
axe*		at uhub?		# ASIX Electronics AX88172 USB Ethernet
axen*		at uhub?		# ASIX Electronics AX88179 USB Ethernet
cue*		at uhub?		# CATC USB-EL1201A based Ethernet
kue*		at uhub?		# Kawasaki KL5KUSB101B based Ethernet
smsc*		at uhub?		# SMSC LAN95xx Ethernet
cdce*		at uhub?		# CDC Ethernet
upl*		at uhub?		# Prolific PL2301/PL2302 host-to-host
ugl*		at uhub?		# Genesys Logic GL620USB-A host-to-host
udav*		at uhub?		# Davicom DM9601 based Ethernet
url*		at uhub?		# Realtek RTL8150L based adapters
wi*		at uhub?		# WaveLAN IEEE 802.11DS
ugen*		at uhub?		# USB Generic driver
ural*		at uhub?		# Ralink RT2500USB
rum*		at uhub?		# Ralink RT2501USB/RT2601USB
zyd*		at uhub?		# Zydas ZD1211

scsibus*	at scsi?
sd*		at scsibus?
cd*		at scsibus?

pseudo-device	wsmux 2
pseudo-device	loop 1
pseudo-device	bpfilter 1
pseudo-device	rd 1

path: sys/arch/landisk/conf/RAMDISK


code:
#	$OpenBSD: files.landisk,v 1.11 2014/10/18 12:21:56 miod Exp $
#	$NetBSD: files.landisk,v 1.2 2006/09/07 01:55:02 uwe Exp $

# maxpartitions must be first item in files.${MACHINE}
maxpartitions 16

maxusers 2 16 64

major {wd = 16}
major {rd = 18}
major {sd = 24}

#defparam opt_memsize.h	IOM_ROM_BEGIN IOM_ROM_SIZE IOM_RAM_BEGIN IOM_RAM_SIZE

file	arch/landisk/landisk/autoconf.c
file	arch/landisk/landisk/bus_dma.c
file	arch/landisk/landisk/clock_machdep.c
file	arch/landisk/landisk/conf.c
file	arch/landisk/landisk/consinit.c
file	arch/landisk/landisk/disksubr.c		disk
file	arch/landisk/landisk/intr.c
file	arch/landisk/landisk/machdep.c

#
# System bus types
#

define	mainbus {}
device	mainbus: pcibus, mainbus
attach	mainbus at root
file	arch/landisk/landisk/mainbus.c		mainbus

device	cpu
attach	cpu at mainbus
file	arch/sh/sh/cpu.c			cpu

#
# Machine-independent SCSI drivers
#
include "scsi/files.scsi"

#
# Machine-independent ATA drivers
#
include "dev/ata/files.ata"
include "dev/atapiscsi/files.atapiscsi"

#
# PCI bus
#
include "dev/mii/files.mii"
include "dev/pci/files.pci"
include "arch/sh/conf/files.shpcic"

file	arch/landisk/landisk/shpcic_machdep.c	shpcic

# WSCONS bits for wskbd.h
#
include "dev/wscons/files.wscons"
include "dev/wsfont/files.wsfont"
include "dev/rasops/files.rasops"

#
# USB drivers
#
include "dev/usb/files.usb"

#
# SH bus
#
include	"arch/sh/conf/files.shb"

# Ricoh RS5C313 Real Time Clock
device	rsclock
attach	rsclock at shb
file	arch/landisk/dev/rs5c313.c		rsclock

#
# on-board I/O bus
#
define obio { [port = -1], [size = 0], [iomem = -1], [iosiz = 0], [irq = -1] }

device	obio: obio
attach	obio at mainbus
file	arch/landisk/dev/obio.c		obio needs-flag

attach	wdc at obio with wdc_obio
file	arch/landisk/dev/wdc_obio.c	wdc_obio

device	power
attach	power at obio
file	arch/landisk/dev/power.c	power needs-flag

#device	led
#attach	led at obio
#file	arch/landisk/dev/led_obio.c	led needs-flag


code: src/sys/arch/landisk/dev

path: sys/arch/landisk/dev/CVS/Repository


code:
/*	$OpenBSD: obio.c,v 1.9 2014/11/16 12:30:57 deraadt Exp $	*/
/*	$NetBSD: obio.c,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/

/*-
 * Copyright (c) 1998 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Charles M. Hannum.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>

#include <uvm/uvm_extern.h>

#include <sh/devreg.h>
#include <sh/mmu.h>
#include <sh/pmap.h>
#include <sh/pte.h>

#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/intr.h>

#include <landisk/dev/obiovar.h>

int	obio_match(struct device *, void *, void *);
void	obio_attach(struct device *, struct device *, void *);
int	obio_print(void *, const char *);
int	obio_search(struct device *, void *, void *);

struct cfattach obio_ca = {
	sizeof(struct obio_softc), obio_match, obio_attach
};

struct cfdriver obio_cd = {
	0, "obio", DV_DULL
};

int
obio_match(struct device *parent, void *vcf, void *aux)
{
	struct obiobus_attach_args *oba = aux;

	if (strcmp(oba->oba_busname, obio_cd.cd_name) != 0)
		return (0);

	return (1);
}

void
obio_attach(struct device *parent, struct device *self, void *aux)
{
	struct obio_softc *sc = (struct obio_softc *)self;
	struct obiobus_attach_args *oba = aux;

	printf("\n");

	sc->sc_iot = oba->oba_iot;
	sc->sc_memt = oba->oba_memt;

	config_search(obio_search, self, NULL);
}

int
obio_search(struct device *parent, void *vcf, void *aux)
{
	struct obio_softc *sc = (struct obio_softc *)parent;
	struct cfdata *cf = vcf;
	struct obio_attach_args oa;
	struct obio_io res_io[1];
	struct obio_iomem res_mem[1];
	struct obio_irq res_irq[1];

	oa.oa_iot = sc->sc_iot;
	oa.oa_memt = sc->sc_memt;
	oa.oa_nio = oa.oa_niomem = oa.oa_nirq = 0;

	if (cf->cf_iobase != IOBASEUNK) {
		res_io[0].or_addr = cf->cf_iobase;
		res_io[0].or_size = cf->cf_iosize;
		oa.oa_io = res_io;
		oa.oa_nio = 1;
	}

	if (cf->cf_maddr != MADDRUNK) {
		res_mem[0].or_addr = cf->cf_maddr;
		res_mem[0].or_size = cf->cf_msize;
		oa.oa_iomem = res_mem;
		oa.oa_niomem = 1;
	}

	if (cf->cf_irq != IRQUNK) {
		res_irq[0].or_irq = cf->cf_irq;
		oa.oa_irq = res_irq;
		oa.oa_nirq = 1;
	}

	if ((*cf->cf_attach->ca_match)(parent, cf, &oa) == 0)
		return (0);

	config_attach(parent, cf, &oa, obio_print);
	return (1);
}

int
obio_print(void *args, const char *name)
{
	struct obio_attach_args *oa = args;
	const char *sep;
	int i;

	if (oa->oa_nio) {
		sep = "";
		printf(" port ");
		for (i = 0; i < oa->oa_nio; i++) {
			if (oa->oa_io[i].or_size == 0)
				continue;
			printf("%s0x%x", sep, oa->oa_io[i].or_addr);
			if (oa->oa_io[i].or_size > 1)
				printf("-0x%x", oa->oa_io[i].or_addr +
				    oa->oa_io[i].or_size - 1);
			sep = ",";
		}
	}

	if (oa->oa_niomem) {
		sep = "";
		printf(" iomem ");
		for (i = 0; i < oa->oa_niomem; i++) {
			if (oa->oa_iomem[i].or_size == 0)
				continue;
			printf("%s0x%x", sep, oa->oa_iomem[i].or_addr);
			if (oa->oa_iomem[i].or_size > 1)
				printf("-0x%x", oa->oa_iomem[i].or_addr +
				    oa->oa_iomem[i].or_size - 1);
			sep = ",";
		}
	}

	if (oa->oa_nirq) {
		sep = "";
		printf(" irq ");
		for (i = 0; i < oa->oa_nirq; i++) {
			if (oa->oa_irq[i].or_irq == IRQUNK)
				continue;
			printf("%s%d", sep, oa->oa_irq[i].or_irq);
			sep = ",";
		}
	}

	return (UNCONF);
}

/*
 * Set up an interrupt handler to start being called.
 */
void *
obio_intr_establish(int irq, int level, int (*ih_fun)(void *), void *ih_arg,
    const char *ih_name)
{
	return extintr_establish(irq, level, ih_fun, ih_arg, ih_name);
}

/*
 * Deregister an interrupt handler.
 */
void
obio_intr_disestablish(void *arg)
{
	extintr_disestablish(arg);
}

/*
 * on-board I/O bus space
 */
#define	OBIO_IOMEM_IO		0	/* space is i/o space */
#define	OBIO_IOMEM_MEM		1	/* space is mem space */
#define	OBIO_IOMEM_PCMCIA_IO	2	/* PCMCIA IO space */
#define	OBIO_IOMEM_PCMCIA_MEM	3	/* PCMCIA Mem space */
#define	OBIO_IOMEM_PCMCIA_ATT	4	/* PCMCIA Attr space */
#define	OBIO_IOMEM_PCMCIA_8BIT	0x8000	/* PCMCIA BUS 8 BIT WIDTH */
#define	OBIO_IOMEM_PCMCIA_IO8 \
	    (OBIO_IOMEM_PCMCIA_IO|OBIO_IOMEM_PCMCIA_8BIT)
#define	OBIO_IOMEM_PCMCIA_MEM8 \
	    (OBIO_IOMEM_PCMCIA_MEM|OBIO_IOMEM_PCMCIA_8BIT)
#define	OBIO_IOMEM_PCMCIA_ATT8 \
	    (OBIO_IOMEM_PCMCIA_ATT|OBIO_IOMEM_PCMCIA_8BIT)

int obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
    bus_space_handle_t *bshp);
void obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
int obio_iomem_subregion(void *v, bus_space_handle_t bsh,
    bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
int obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
    bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
    bus_addr_t *bpap, bus_space_handle_t *bshp);
void obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
void *obio_iomem_vaddr(void *v, bus_space_handle_t bsh);

int obio_iomem_add_mapping(bus_addr_t, bus_size_t, int,
    bus_space_handle_t *);

int
obio_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type,
    bus_space_handle_t *bshp)
{
	u_long pa, endpa;
	vaddr_t va;
	pt_entry_t *pte;
	unsigned int m = 0;
	int io_type = type & ~OBIO_IOMEM_PCMCIA_8BIT;

	pa = trunc_page(bpa);
	endpa = round_page(bpa + size);

#ifdef DIAGNOSTIC
	if (endpa <= pa)
		panic("obio_iomem_add_mapping: overflow");
#endif

	va = uvm_km_valloc(kernel_map, endpa - pa);
	if (va == 0)
		return (ENOMEM);

	*bshp = (bus_space_handle_t)(va + (bpa & PGOFSET));

#define MODE(t, s)							\
	((t) & OBIO_IOMEM_PCMCIA_8BIT) ?				\
		_PG_PCMCIA_ ## s ## 8 :					\
		_PG_PCMCIA_ ## s ## 16
	switch (io_type) {
	default:
		panic("unknown pcmcia space.");
		/* NOTREACHED */
	case OBIO_IOMEM_PCMCIA_IO:
		m = MODE(type, IO);
		break;
	case OBIO_IOMEM_PCMCIA_MEM:
		m = MODE(type, MEM);
		break;
	case OBIO_IOMEM_PCMCIA_ATT:
		m = MODE(type, ATTR);
		break;
	}
#undef MODE

	for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
		pmap_kenter_pa(va, pa, PROT_READ | PROT_WRITE);
		pte = __pmap_kpte_lookup(va);
		KDASSERT(pte);
		*pte |= m;  /* PTEA PCMCIA assistant bit */
		sh_tlb_update(0, va, *pte);
	}

	return (0);
}

int
obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size,
    int flags, bus_space_handle_t *bshp)
{
	bus_addr_t addr = SH3_PHYS_TO_P2SEG(bpa);
	int error;

	KASSERT((bpa & SH3_PHYS_MASK) == bpa);

	if (bpa < 0x14000000 || bpa >= 0x1c000000) {
		/* CS0,1,2,3,4,7 */
		*bshp = (bus_space_handle_t)addr;
		return (0);
	}

	/* CS5,6 */
	error = obio_iomem_add_mapping(addr, size, (int)(u_long)v, bshp);

	return (error);
}

void
obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size)
{
	u_long va, endva;
	bus_addr_t bpa;

	if (bsh >= SH3_P2SEG_BASE && bsh <= SH3_P2SEG_END) {
		/* maybe CS0,1,2,3,4,7 */
		return;
	}

	/* CS5,6 */
	va = trunc_page(bsh);
	endva = round_page(bsh + size);

#ifdef DIAGNOSTIC
	if (endva <= va)
		panic("obio_io_unmap: overflow");
#endif

	pmap_extract(pmap_kernel(), va, &bpa);
	bpa += bsh & PGOFSET;

	pmap_kremove(va, endva - va);

	/*
	 * Free the kernel virtual mapping.
	 */
	uvm_km_free(kernel_map, va, endva - va);
}

int
obio_iomem_subregion(void *v, bus_space_handle_t bsh,
    bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
{
	*nbshp = bsh + offset;

	return (0);
}

int
obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
    bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
    bus_addr_t *bpap, bus_space_handle_t *bshp)
{
	*bshp = *bpap = rstart;

	return (0);
}

void
obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
{
	obio_iomem_unmap(v, bsh, size);
}

void *
obio_iomem_vaddr(void *v, bus_space_handle_t bsh)
{
	return ((void *)bsh);
}

/*
 * on-board I/O bus space read/write
 */
uint8_t obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
uint16_t obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
uint32_t obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
void obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count);
void obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint16_t *addr, bus_size_t count);
void obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint32_t *addr, bus_size_t count);
void obio_iomem_read_raw_multi_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count);
void obio_iomem_read_raw_multi_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count);
void obio_iomem_read_region_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count);
void obio_iomem_read_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint16_t *addr, bus_size_t count);
void obio_iomem_read_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint32_t *addr, bus_size_t count);
void obio_iomem_read_raw_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count);
void obio_iomem_read_raw_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count);
void obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
    uint8_t value);
void obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
    uint16_t value);
void obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
    uint32_t value);
void obio_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count);
void obio_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint16_t *addr, bus_size_t count);
void obio_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint32_t *addr, bus_size_t count);
void obio_iomem_write_raw_multi_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count);
void obio_iomem_write_raw_multi_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count);
void obio_iomem_write_region_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count);
void obio_iomem_write_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint16_t *addr, bus_size_t count);
void obio_iomem_write_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint32_t *addr, bus_size_t count);
void obio_iomem_write_raw_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count);
void obio_iomem_write_raw_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count);
void obio_iomem_set_multi_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
    uint8_t val, bus_size_t count);
void obio_iomem_set_multi_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
    uint16_t val, bus_size_t count);
void obio_iomem_set_multi_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
    uint32_t val, bus_size_t count);
void obio_iomem_set_region_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t val, bus_size_t count);
void obio_iomem_set_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint16_t val, bus_size_t count);
void obio_iomem_set_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint32_t val, bus_size_t count);
void obio_iomem_copy_1(void *v, bus_space_handle_t h1, bus_size_t o1,
    bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
void obio_iomem_copy_2(void *v, bus_space_handle_t h1, bus_size_t o1,
    bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
void obio_iomem_copy_4(void *v, bus_space_handle_t h1, bus_size_t o1,
    bus_space_handle_t h2, bus_size_t o2, bus_size_t count);

struct _bus_space obio_bus_io =
{
	.bs_cookie = (void *)OBIO_IOMEM_PCMCIA_IO,

	.bs_map = obio_iomem_map,
	.bs_unmap = obio_iomem_unmap,
	.bs_subregion = obio_iomem_subregion,

	.bs_alloc = obio_iomem_alloc,
	.bs_free = obio_iomem_free,

	.bs_vaddr = obio_iomem_vaddr,

	.bs_r_1 = obio_iomem_read_1,
	.bs_r_2 = obio_iomem_read_2,
	.bs_r_4 = obio_iomem_read_4,

	.bs_rm_1 = obio_iomem_read_multi_1,
	.bs_rm_2 = obio_iomem_read_multi_2,
	.bs_rm_4 = obio_iomem_read_multi_4,

	.bs_rrm_2 = obio_iomem_read_raw_multi_2,
	.bs_rrm_4 = obio_iomem_read_raw_multi_4,

	.bs_rr_1 = obio_iomem_read_region_1,
	.bs_rr_2 = obio_iomem_read_region_2,
	.bs_rr_4 = obio_iomem_read_region_4,

	.bs_rrr_2 = obio_iomem_read_raw_region_2,
	.bs_rrr_4 = obio_iomem_read_raw_region_4,

	.bs_w_1 = obio_iomem_write_1,
	.bs_w_2 = obio_iomem_write_2,
	.bs_w_4 = obio_iomem_write_4,

	.bs_wm_1 = obio_iomem_write_multi_1,
	.bs_wm_2 = obio_iomem_write_multi_2,
	.bs_wm_4 = obio_iomem_write_multi_4,

	.bs_wrm_2 = obio_iomem_write_raw_multi_2,
	.bs_wrm_4 = obio_iomem_write_raw_multi_4,

	.bs_wr_1 = obio_iomem_write_region_1,
	.bs_wr_2 = obio_iomem_write_region_2,
	.bs_wr_4 = obio_iomem_write_region_4,

	.bs_wrr_2 = obio_iomem_write_raw_region_2,
	.bs_wrr_4 = obio_iomem_write_raw_region_4,

	.bs_sm_1 = obio_iomem_set_multi_1,
	.bs_sm_2 = obio_iomem_set_multi_2,
	.bs_sm_4 = obio_iomem_set_multi_4,

	.bs_sr_1 = obio_iomem_set_region_1,
	.bs_sr_2 = obio_iomem_set_region_2,
	.bs_sr_4 = obio_iomem_set_region_4,

	.bs_c_1 = obio_iomem_copy_1,
	.bs_c_2 = obio_iomem_copy_2,
	.bs_c_4 = obio_iomem_copy_4,
};

struct _bus_space obio_bus_mem =
{
	.bs_cookie = (void *)OBIO_IOMEM_PCMCIA_MEM,

	.bs_map = obio_iomem_map,
	.bs_unmap = obio_iomem_unmap,
	.bs_subregion = obio_iomem_subregion,

	.bs_alloc = obio_iomem_alloc,
	.bs_free = obio_iomem_free,

	.bs_vaddr = obio_iomem_vaddr,

	.bs_r_1 = obio_iomem_read_1,
	.bs_r_2 = obio_iomem_read_2,
	.bs_r_4 = obio_iomem_read_4,

	.bs_rm_1 = obio_iomem_read_multi_1,
	.bs_rm_2 = obio_iomem_read_multi_2,
	.bs_rm_4 = obio_iomem_read_multi_4,

	.bs_rrm_2 = obio_iomem_read_raw_multi_2,
	.bs_rrm_4 = obio_iomem_read_raw_multi_4,

	.bs_rr_1 = obio_iomem_read_region_1,
	.bs_rr_2 = obio_iomem_read_region_2,
	.bs_rr_4 = obio_iomem_read_region_4,

	.bs_rrr_2 = obio_iomem_read_raw_region_2,
	.bs_rrr_4 = obio_iomem_read_raw_region_4,

	.bs_w_1 = obio_iomem_write_1,
	.bs_w_2 = obio_iomem_write_2,
	.bs_w_4 = obio_iomem_write_4,

	.bs_wm_1 = obio_iomem_write_multi_1,
	.bs_wm_2 = obio_iomem_write_multi_2,
	.bs_wm_4 = obio_iomem_write_multi_4,

	.bs_wrm_2 = obio_iomem_write_raw_multi_2,
	.bs_wrm_4 = obio_iomem_write_raw_multi_4,

	.bs_wr_1 = obio_iomem_write_region_1,
	.bs_wr_2 = obio_iomem_write_region_2,
	.bs_wr_4 = obio_iomem_write_region_4,

	.bs_wrr_2 = obio_iomem_write_raw_region_2,
	.bs_wrr_4 = obio_iomem_write_raw_region_4,

	.bs_sm_1 = obio_iomem_set_multi_1,
	.bs_sm_2 = obio_iomem_set_multi_2,
	.bs_sm_4 = obio_iomem_set_multi_4,

	.bs_sr_1 = obio_iomem_set_region_1,
	.bs_sr_2 = obio_iomem_set_region_2,
	.bs_sr_4 = obio_iomem_set_region_4,

	.bs_c_1 = obio_iomem_copy_1,
	.bs_c_2 = obio_iomem_copy_2,
	.bs_c_4 = obio_iomem_copy_4,
};

/* read */
uint8_t
obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
{
	return *(volatile uint8_t *)(bsh + offset);
}

uint16_t
obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
{
	return *(volatile uint16_t *)(bsh + offset);
}

uint32_t
obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
{
	return *(volatile uint32_t *)(bsh + offset);
}

void
obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count)
{
	volatile uint8_t *p = (void *)(bsh + offset);

	while (count--) {
		*addr++ = *p;
	}
}

void
obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint16_t *addr, bus_size_t count)
{
	volatile uint16_t *p = (void *)(bsh + offset);

	while (count--) {
		*addr++ = *p;
	}
}

void
obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint32_t *addr, bus_size_t count)
{
	volatile uint32_t *p = (void *)(bsh + offset);

	while (count--) {
		*addr++ = *p;
	}
}

void
obio_iomem_read_raw_multi_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count)
{
	volatile uint16_t *p = (void *)(bsh + offset);

	count >>= 1;
	while (count--) {
		*(uint16_t *)addr = *p;
		addr += 2;
	}
}

void
obio_iomem_read_raw_multi_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count)
{
	volatile uint32_t *p = (void *)(bsh + offset);

	count >>= 2;
	while (count--) {
		*(uint32_t *)addr = *p;
		addr += 4;
	}
}

void
obio_iomem_read_region_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count)
{
	volatile uint8_t *p = (void *)(bsh + offset);

	while (count--) {
		*addr++ = *p++;
	}
}

void
obio_iomem_read_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint16_t *addr, bus_size_t count)
{
	volatile uint16_t *p = (void *)(bsh + offset);

	while (count--) {
		*addr++ = *p++;
	}
}

void
obio_iomem_read_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint32_t *addr, bus_size_t count)
{
	volatile uint32_t *p = (void *)(bsh + offset);

	while (count--) {
		*addr++ = *p++;
	}
}

void
obio_iomem_read_raw_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count)
{
	volatile uint16_t *p = (void *)(bsh + offset);

	count >>= 1;
	while (count--) {
		*(uint16_t *)addr = *p++;
		addr += 2;
	}
}

void
obio_iomem_read_raw_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t *addr, bus_size_t count)
{
	volatile uint32_t *p = (void *)(bsh + offset);

	count >>= 2;
	while (count--) {
		*(uint32_t *)addr = *p++;
		addr += 4;
	}
}

/* write */
void
obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
    uint8_t value)
{
	*(volatile uint8_t *)(bsh + offset) = value;
}

void
obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
    uint16_t value)
{
	*(volatile uint16_t *)(bsh + offset) = value;
}

void
obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
    uint32_t value)
{
	*(volatile uint32_t *)(bsh + offset) = value;
}

void
obio_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
	volatile uint8_t *p = (void *)(bsh + offset);

	while (count--) {
		*p = *addr++;
	}
}

void
obio_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint16_t *addr, bus_size_t count)
{
	volatile uint16_t *p = (void *)(bsh + offset);

	while (count--) {
		*p = *addr++;
	}
}

void
obio_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint32_t *addr, bus_size_t count)
{
	volatile uint32_t *p = (void *)(bsh + offset);

	while (count--) {
		*p = *addr++;
	}
}

void
obio_iomem_write_raw_multi_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
	volatile uint16_t *p = (void *)(bsh + offset);

	count >>= 1;
	while (count--) {
		*p = *(uint16_t *)addr;
		addr += 2;
	}
}

void
obio_iomem_write_raw_multi_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
	volatile uint32_t *p = (void *)(bsh + offset);

	count >>= 2;
	while (count--) {
		*p = *(uint32_t *)addr;
		addr += 4;
	}
}

void
obio_iomem_write_region_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
	volatile uint8_t *p = (void *)(bsh + offset);

	while (count--) {
		*p++ = *addr++;
	}
}

void
obio_iomem_write_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint16_t *addr, bus_size_t count)
{
	volatile uint16_t *p = (void *)(bsh + offset);

	while (count--) {
		*p++ = *addr++;
	}
}

void
obio_iomem_write_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint32_t *addr, bus_size_t count)
{
	volatile uint32_t *p = (void *)(bsh + offset);

	while (count--) {
		*p++ = *addr++;
	}
}

void
obio_iomem_write_raw_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
	volatile uint16_t *p = (void *)(bsh + offset);

	count >>= 1;
	while (count--) {
		*p++ = *(uint16_t *)addr;
		addr += 2;
	}
}

void
obio_iomem_write_raw_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, const uint8_t *addr, bus_size_t count)
{
	volatile uint32_t *p = (void *)(bsh + offset);

	count >>= 2;
	while (count--) {
		*p++ = *(uint32_t *)addr;
		addr += 4;
	}
}

void
obio_iomem_set_multi_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t val, bus_size_t count)
{
	volatile uint8_t *p = (void *)(bsh + offset);

	while (count--) {
		*p = val;
	}
}

void
obio_iomem_set_multi_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint16_t val, bus_size_t count)
{
	volatile uint16_t *p = (void *)(bsh + offset);

	while (count--) {
		*p = val;
	}
}

void
obio_iomem_set_multi_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint32_t val, bus_size_t count)
{
	volatile uint32_t *p = (void *)(bsh + offset);

	while (count--) {
		*p = val;
	}
}

void
obio_iomem_set_region_1(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint8_t val, bus_size_t count)
{
	volatile uint8_t *addr = (void *)(bsh + offset);

	while (count--) {
		*addr++ = val;
	}
}

void
obio_iomem_set_region_2(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint16_t val, bus_size_t count)
{
	volatile uint16_t *addr = (void *)(bsh + offset);

	while (count--) {
		*addr++ = val;
	}
}

void
obio_iomem_set_region_4(void *v, bus_space_handle_t bsh,
    bus_size_t offset, uint32_t val, bus_size_t count)
{
	volatile uint32_t *addr = (void *)(bsh + offset);

	while (count--) {
		*addr++ = val;
	}
}

void
obio_iomem_copy_1(void *v, bus_space_handle_t h1, bus_size_t o1,
    bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
{
	volatile uint8_t *addr1 = (void *)(h1 + o1);
	volatile uint8_t *addr2 = (void *)(h2 + o2);

	if (addr1 >= addr2) {	/* src after dest: copy forward */
		while (count--) {
			*addr2++ = *addr1++;
		}
	} else {		/* dest after src: copy backwards */
		addr1 += count - 1;
		addr2 += count - 1;
		while (count--) {
			*addr2-- = *addr1--;
		}
	}
}

void
obio_iomem_copy_2(void *v, bus_space_handle_t h1, bus_size_t o1,
    bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
{
	volatile uint16_t *addr1 = (void *)(h1 + o1);
	volatile uint16_t *addr2 = (void *)(h2 + o2);

	if (addr1 >= addr2) {	/* src after dest: copy forward */
		while (count--) {
			*addr2++ = *addr1++;
		}
	} else {		/* dest after src: copy backwards */
		addr1 += count - 1;
		addr2 += count - 1;
		while (count--) {
			*addr2-- = *addr1--;
		}
	}
}

void
obio_iomem_copy_4(void *v, bus_space_handle_t h1, bus_size_t o1,
    bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
{
	volatile uint32_t *addr1 = (void *)(h1 + o1);
	volatile uint32_t *addr2 = (void *)(h2 + o2);

	if (addr1 >= addr2) {	/* src after dest: copy forward */
		while (count--) {
			*addr2++ = *addr1++;
		}
	} else {		/* dest after src: copy backwards */
		addr1 += count - 1;
		addr2 += count - 1;
		while (count--) {
			*addr2-- = *addr1--;
		}
	}
}


code:
/*	$OpenBSD: obiovar.h,v 1.3 2008/06/26 05:42:11 ray Exp $	*/
/*	$NetBSD: obiovar.h,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/

/*-
 * Copyright (c) 1997 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
 * NASA Ames Research Center.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 1995 Chris G. Demetriou
 * Copyright (c) 1992 Berkeley Software Design, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Berkeley Software
 *      Design, Inc.
 * 4. The name of Berkeley Software Design must not be used to endorse
 *    or promote products derived from this software without specific
 *    prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN, INC. BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *      BSDI Id: isavar.h,v 1.5 1992/12/01 18:06:00 karels Exp
 */

#ifndef _LANDISK_OBIOVAR_H_
#define _LANDISK_OBIOVAR_H_

#include <machine/bus.h>

/* obio tag */
extern struct _bus_space obio_bus_io;
extern struct _bus_space obio_bus_mem;

/*
 * obio bus attach arguments
 */
struct obiobus_attach_args {
	const char *oba_busname;	/* XXX should be common */

	bus_space_tag_t oba_iot;	/* obio i/o space tag */
	bus_space_tag_t oba_memt;	/* obio mem space tag */
};

/*
 * obio bus resources.
 */

struct obio_io {
	int or_addr;
	int or_size;
};

struct obio_iomem {
	int or_addr;
	int or_size;
};

struct obio_irq {
	int or_irq;
};

/*
 * driver attach arguments
 */
struct obio_attach_args {
	bus_space_tag_t oa_iot;		/* i/o space tag */
	bus_space_tag_t oa_memt;	/* memory space tag */

	struct obio_io *oa_io;		/* I/O resources */
	int oa_nio;

	struct obio_iomem *oa_iomem;	/* memory resources */
	int oa_niomem;

	struct obio_irq *oa_irq;	/* IRQ resources */
	int oa_nirq;

	void	*oa_aux;		/* driver specific */
};

#define	IOBASEUNK	-1	/* i/o address is unknown */
#define	IRQUNK		-1	/* interrupt request line is unknown */
#define	MADDRUNK	-1	/* shared memory address is unknown */

/*
 * master bus
 */
struct obio_softc {
	struct device sc_dev;		/* base device */

	bus_space_tag_t sc_iot;		/* io space tag */
	bus_space_tag_t sc_memt;	/* mem space tag */
};

#define		cf_iobase		cf_loc[0]
#define		cf_iosize		cf_loc[1]
#define		cf_maddr		cf_loc[2]
#define		cf_msize		cf_loc[3]
#define		cf_irq			cf_loc[4]

void *obio_intr_establish(int, int, int (*)(void *), void *, const char *);
void obio_intr_disestablish(void *);

#endif /* _LANDISK_OBIOVAR_H_ */


code:
/*	$OpenBSD: power.c,v 1.6 2014/07/11 08:18:30 guenther Exp $	*/

/*
 * Copyright (c) 2007 Martin Reindl.
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <sys/conf.h>
#include <sys/proc.h>
#include <sys/signalvar.h>

#include <machine/bus.h>
#include <machine/autoconf.h>

#include <sh/include/devreg.h>

#include <landisk/landisk/landiskreg.h>
#include <landisk/dev/obiovar.h>

struct power_softc {
	struct device		sc_dev;
	void			*sc_ih;
};

int	power_match(struct device *, void *, void *);
void	power_attach(struct device *, struct device *, void *);
int	power_intr(void *aux);

struct cfattach power_ca = {
	sizeof(struct power_softc),
	power_match,
	power_attach
};

struct cfdriver power_cd = {
	NULL, "power", DV_DULL
};

struct power_softc *power_softc;

int
power_match(struct device *parent, void *match, void *aux)
{
	struct obio_attach_args *oa = aux;
	static struct obio_irq power_match_irq;

	oa->oa_nio = 0;
	oa->oa_niomem = 0;
	if (oa->oa_nirq == 0)
		oa->oa_irq = &power_match_irq;
	oa->oa_nirq = 1;
	oa->oa_irq[0].or_irq = LANDISK_INTR_PWRSW;

	return (1);
}

void
power_attach(struct device *parent, struct device *self, void *aux)
{
	struct power_softc *sc = (void *)self;

	power_softc = sc;

	sc->sc_ih = extintr_establish(LANDISK_INTR_PWRSW, IPL_TTY,
	    power_intr, sc, sc->sc_dev.dv_xname);
	if (sc->sc_ih == NULL) {
		printf(": couldn't map interrupt\n");
		return;
	}

	printf("\n");
}

int
power_intr(void *arg)
{
	extern int allowpowerdown;
	int status;

	status = (int8_t)_reg_read_1(LANDISK_BTNSTAT);
	if (status == -1) {
		return (0);
	}

	status = ~status;
	if (status & BTN_POWER_BIT) {
#ifdef DEBUG
		printf("%s switched\n", sc->sc_dev.dv_xname);
		Debugger();
#endif
		_reg_write_1(LANDISK_PWRSW_INTCLR, 1);
		if (allowpowerdown == 1) {
			allowpowerdown = 0;
			prsignal(initprocess, SIGUSR1);
		}
		return (1);
	}
	return (0);
}


code:
/*	$OpenBSD: rs5c313.c,v 1.3 2008/06/27 06:03:08 ray Exp $	*/
/*	$NetBSD: rs5c313.c,v 1.1 2006/09/07 01:12:00 uwe Exp $	*/
/*	$NetBSD: rs5c313_landisk.c,v 1.1 2006/09/07 01:55:03 uwe Exp $	*/

/*-
 * Copyright (c) 2002 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * RICOH RS5C313 Real Time Clock
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/kernel.h>

#include <dev/clock_subr.h>
#include <sh/clock.h>

#include <sh/devreg.h>
#include <sh/dev/scireg.h>

#include <landisk/dev/rs5c313reg.h>
#include <landisk/landisk/landiskreg.h>

struct rs5c313_softc {
	struct device sc_dev;

	int sc_valid;		/* oscillation halt sensing on init */
};

/* chip access methods */
void rtc_begin(struct rs5c313_softc *);
void rtc_ce(struct rs5c313_softc *, int);
void rtc_dir(struct rs5c313_softc *, int);
void rtc_clk(struct rs5c313_softc *, int);
int  rtc_read(struct rs5c313_softc *);
void rtc_write(struct rs5c313_softc *, int);

int rs5c313_init(struct rs5c313_softc *);
int rs5c313_read_reg(struct rs5c313_softc *, int);
void rs5c313_write_reg(struct rs5c313_softc *, int, int);
void rs5c313_gettime(void *, time_t, struct clock_ymdhms *);
void rs5c313_settime(void *, struct clock_ymdhms *);

int
rs5c313_init(struct rs5c313_softc *sc)
{
	int status = 0;
	int retry;

	rtc_ce(sc, 0);

	rtc_begin(sc);
	rtc_ce(sc, 1);

	if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_XSTP) == 0) {
		sc->sc_valid = 1;
		goto done;
	}

	sc->sc_valid = 0;
	printf("%s: time not valid\n", sc->sc_dev.dv_xname);

	rs5c313_write_reg(sc, RS5C313_TINT, 0);
	rs5c313_write_reg(sc, RS5C313_CTRL, (CTRL_BASE | CTRL_ADJ));

	for (retry = 1000; retry > 0; --retry) {
		if (rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY)
			delay(1);
		else
			break;
	}

	if (retry == 0) {
		status = EIO;
		goto done;
	}

	rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE);

done:
	rtc_ce(sc, 0);
	return status;
}

int
rs5c313_read_reg(struct rs5c313_softc *sc, int addr)
{
	int data;

	/* output */
	rtc_dir(sc, 1);

	/* control */
	rtc_write(sc, 1);		/* ignored */
	rtc_write(sc, 1);		/* R/#W = 1(READ) */
	rtc_write(sc, 1);		/* AD = 1 */
	rtc_write(sc, 0);		/* DT = 0 */

	/* address */
	rtc_write(sc, addr & 0x8);	/* A3 */
	rtc_write(sc, addr & 0x4);	/* A2 */
	rtc_write(sc, addr & 0x2);	/* A1 */
	rtc_write(sc, addr & 0x1);	/* A0 */

	/* input */
	rtc_dir(sc, 0);

	/* ignore */
	(void)rtc_read(sc);
	(void)rtc_read(sc);
	(void)rtc_read(sc);
	(void)rtc_read(sc);

	/* data */
	data = rtc_read(sc);	/* D3 */
	data <<= 1;
	data |= rtc_read(sc);	/* D2 */
	data <<= 1;
	data |= rtc_read(sc);	/* D1 */
	data <<= 1;
	data |= rtc_read(sc);	/* D0 */

	return data;
}

void
rs5c313_write_reg(struct rs5c313_softc *sc, int addr, int data)
{
	/* output */
	rtc_dir(sc, 1);

	/* control */
	rtc_write(sc, 1);		/* ignored */
	rtc_write(sc, 0);		/* R/#W = 0 (WRITE) */
	rtc_write(sc, 1);		/* AD = 1 */
	rtc_write(sc, 0);		/* DT = 0 */

	/* address */
	rtc_write(sc, addr & 0x8);	/* A3 */
	rtc_write(sc, addr & 0x4);	/* A2 */
	rtc_write(sc, addr & 0x2);	/* A1 */
	rtc_write(sc, addr & 0x1);	/* A0 */

	/* control */
	rtc_write(sc, 1);		/* ignored */
	rtc_write(sc, 0);		/* R/#W = 0(WRITE) */
	rtc_write(sc, 0);		/* AD = 0 */
	rtc_write(sc, 1);		/* DT = 1 */

	/* data */
	rtc_write(sc, data & 0x8);	/* D3 */
	rtc_write(sc, data & 0x4);	/* D2 */
	rtc_write(sc, data & 0x2);	/* D1 */
	rtc_write(sc, data & 0x1);	/* D0 */
}

void
rs5c313_gettime(void *cookie, time_t base, struct clock_ymdhms *dt)
{
	struct rs5c313_softc *sc = cookie;
	int retry;
	int s;

	/*
	 * If chip had invalid data on init, don't bother reading
	 * bogus values.
	 */
	if (sc->sc_valid == 0)
		return;

	s = splhigh();

	rtc_begin(sc);
	for (retry = 10; retry > 0; --retry) {
		rtc_ce(sc, 1);

		rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE);
		if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0)
			break;

		rtc_ce(sc, 0);
		delay(1);
	}

	if (retry == 0) {
		splx(s);
		return;
	}

#define RTCGET(x, y)							\
	do {								\
		int ones = rs5c313_read_reg(sc, RS5C313_ ## y ## 1);	\
		int tens = rs5c313_read_reg(sc, RS5C313_ ## y ## 10);	\
		dt->dt_ ## x = tens * 10 + ones;			\
	} while (/* CONSTCOND */0)

	RTCGET(sec, SEC);
	RTCGET(min, MIN);
	RTCGET(hour, HOUR);
	RTCGET(day, DAY);
	RTCGET(mon, MON);
	RTCGET(year, YEAR);
#undef	RTCGET
	dt->dt_wday = rs5c313_read_reg(sc, RS5C313_WDAY);

	rtc_ce(sc, 0);
	splx(s);

	dt->dt_year = (dt->dt_year % 100) + 1900;
	if (dt->dt_year < 1970) {
		dt->dt_year += 100;
	}
}

void
rs5c313_settime(void *cookie, struct clock_ymdhms *dt)
{
	struct rs5c313_softc *sc = cookie;
	int retry;
	int t;
	int s;

	s = splhigh();

	rtc_begin(sc);
	for (retry = 10; retry > 0; --retry) {
		rtc_ce(sc, 1);

		rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE);
		if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0)
			break;

		rtc_ce(sc, 0);
		delay(1);
	}

	if (retry == 0) {
		splx(s);
		return;
	}

#define	RTCSET(x, y)							     \
	do {								     \
		t = TOBCD(dt->dt_ ## y) & 0xff;				     \
		rs5c313_write_reg(sc, RS5C313_ ## x ## 1, t & 0x0f);	     \
		rs5c313_write_reg(sc, RS5C313_ ## x ## 10, (t >> 4) & 0x0f); \
	} while (/* CONSTCOND */0)

	RTCSET(SEC, sec);
	RTCSET(MIN, min);
	RTCSET(HOUR, hour);
	RTCSET(DAY, day);
	RTCSET(MON, mon);

#undef	RTCSET

	t = dt->dt_year % 100;
	t = TOBCD(t);
	rs5c313_write_reg(sc, RS5C313_YEAR1, t & 0x0f);
	rs5c313_write_reg(sc, RS5C313_YEAR10, (t >> 4) & 0x0f);

	rs5c313_write_reg(sc, RS5C313_WDAY, dt->dt_wday);

	rtc_ce(sc, 0);
	splx(s);

	sc->sc_valid = 1;
}

struct rtc_ops rs5c313_ops = {
	NULL,
	NULL,			/* not used */
	rs5c313_gettime,
	rs5c313_settime
};

void
rtc_begin(struct rs5c313_softc *sc)
{
	SHREG_SCSPTR = SCSPTR_SPB1IO | SCSPTR_SPB1DT
		     | SCSPTR_SPB0IO | SCSPTR_SPB0DT;
	delay(100);
}

/*
 * CE pin
 */
void
rtc_ce(struct rs5c313_softc *sc, int onoff)
{
	if (onoff)
		_reg_write_1(LANDISK_PWRMNG, PWRMNG_RTC_CE);
	else
		_reg_write_1(LANDISK_PWRMNG, 0);
	delay(600);
}

/*
 * SCLK pin is connnected to SPB0DT.
 * SPB0DT is always in output mode, we set SPB0IO in rtc_begin.
 */
void
rtc_clk(struct rs5c313_softc *sc, int onoff)
{
	uint8_t r = SHREG_SCSPTR;

	if (onoff)
		r |= SCSPTR_SPB0DT;
	else
		r &= ~SCSPTR_SPB0DT;
	SHREG_SCSPTR = r;
}

/*
 * SIO pin is connected to SPB1DT.
 * SPB1DT is output when SPB1IO is set.
 */
void
rtc_dir(struct rs5c313_softc *sc, int output)
{
	uint8_t r = SHREG_SCSPTR;

	if (output)
		r |= SCSPTR_SPB1IO;
	else
		r &= ~SCSPTR_SPB1IO;
	SHREG_SCSPTR = r;
}

/*
 * Read bit from SPB1DT pin.
 */
int
rtc_read(struct rs5c313_softc *sc)
{
	int bit;

	delay(300);

	bit = (SHREG_SCSPTR & SCSPTR_SPB1DT) ? 1 : 0;

	rtc_clk(sc, 0);
	delay(300);
	rtc_clk(sc, 1);

	return bit;
}

/*
 * Write bit via SPB1DT pin.
 */
void
rtc_write(struct rs5c313_softc *sc, int bit)
{
	uint8_t r = SHREG_SCSPTR;

	if (bit)
		r |= SCSPTR_SPB1DT;
	else
		r &= ~SCSPTR_SPB1DT;
	SHREG_SCSPTR = r;

	delay(300);

	rtc_clk(sc, 0);
	delay(300);
	rtc_clk(sc, 1);
}

/* autoconf glue */
int rs5c313_landisk_match(struct device *, void *, void *);
void rs5c313_landisk_attach(struct device *, struct device *, void *);

const struct cfattach rsclock_ca = {
	sizeof (struct rs5c313_softc),
	rs5c313_landisk_match, rs5c313_landisk_attach
};

struct cfdriver rsclock_cd = {
	0, "rsclock", DV_DULL
};

int
rs5c313_landisk_match(struct device *parent, void *vcf, void *aux)
{
	static int matched = 0;

	if (matched)
		return (0);

	return (matched = 1);
}

void
rs5c313_landisk_attach(struct device *parent, struct device *self, void *aux)
{
	struct rs5c313_softc *sc = (void *)self;

	printf(": RS5C313 real time clock\n");

	if (rs5c313_init(sc) != 0) {
		printf("%s: init failed\n", self->dv_xname);
		return;
	}

	rs5c313_ops._cookie = sc;
	sh_clock_init(SH_CLOCK_NORTC, &rs5c313_ops);
}


code:
/*	$OpenBSD: rs5c313reg.h,v 1.2 2008/06/27 06:03:08 ray Exp $	*/
/*	$NetBSD: rs5c313reg.h,v 1.1 2006/09/07 01:12:00 uwe Exp $	*/

/*-
 * Copyright (c) 2005 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * RICOH RS5C313 Real Time Clock
 */
#define	RS5C313_SEC1	0
#define	RS5C313_SEC10	1
#define	RS5C313_MIN1	2
#define	RS5C313_MIN10	3
#define	RS5C313_HOUR1	4
#define	RS5C313_HOUR10	5
#define	RS5C313_WDAY	6
#define	RS5C313_TINT	7
#define	RS5C313_DAY1	8
#define	RS5C313_DAY10	9
#define	RS5C313_MON1	10
#define	RS5C313_MON10	11
#define	RS5C313_YEAR1	12
#define	RS5C313_YEAR10	13
#define	RS5C313_CTRL	14
#define	RS5C313_TEST	15

/* TINT register */
#define	TINT_CT0		0x01
#define	TINT_CT1		0x02
#define	TINT_CT2		0x04
#define	TINT_CT3		0x08

/* CTRL register */
#define	CTRL_BSY		0x01	/* read */
#define	CTRL_ADJ		0x01	/* write */
#define	CTRL_XSTP		0x02	/* read */
#define	CTRL_WTEN		0x02	/* write */
#define	CTRL_24H		0x04	/* read/write */
#define	CTRL_CTFG		0x08	/* read/write */

#define	CTRL_BASE		CTRL_24H


code:
/*	$OpenBSD: wdc_obio.c,v 1.4 2011/05/09 22:33:53 matthew Exp $	*/
/*	$NetBSD: wdc_obio.c,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/

/*-
 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Charles M. Hannum and by Onno van der Linden.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>

#include <machine/bus.h>
#include <machine/intr.h>

#include <dev/ata/atavar.h>
#include <dev/ic/wdcvar.h>

#include <landisk/dev/obiovar.h>

struct wdc_obio_softc {
	struct	wdc_softc sc_wdcdev;
	struct	channel_softc *sc_chanptr;
	struct	channel_softc sc_channel;

	void	*sc_ih;
};

int	wdc_obio_match(struct device *, void *, void *);
void	wdc_obio_attach(struct device *, struct device *, void *);

struct cfattach wdc_obio_ca = {
	sizeof(struct wdc_obio_softc), wdc_obio_match, wdc_obio_attach
};

#define	WDC_OBIO_REG_NPORTS	WDC_NREG
#define	WDC_OBIO_REG_SIZE	(WDC_OBIO_REG_NPORTS * 2)
#define	WDC_OBIO_AUXREG_NPORTS	1
#define	WDC_OBIO_AUXREG_SIZE	(WDC_OBIO_AUXREG_NPORTS * 2)
#define	WDC_OBIO_AUXREG_OFFSET	0x2c

u_int8_t wdc_obio_read_reg(struct channel_softc *chp,  enum wdc_regs reg);
void wdc_obio_write_reg(struct channel_softc *chp,  enum wdc_regs reg,
    u_int8_t val);

struct channel_softc_vtbl wdc_obio_vtbl = {
	wdc_obio_read_reg,
	wdc_obio_write_reg,
	wdc_default_lba48_write_reg,
	wdc_default_read_raw_multi_2,
	wdc_default_write_raw_multi_2,
	wdc_default_read_raw_multi_4,
	wdc_default_write_raw_multi_4
};

int
wdc_obio_match(struct device *parent, void *vcf, void *aux)
{
	struct obio_attach_args *oa = aux;

	if (oa->oa_nio != 1)
		return (0);
	if (oa->oa_nirq != 1)
		return (0);
	if (oa->oa_niomem != 0)
		return (0);

	if (oa->oa_io[0].or_addr == IOBASEUNK)
		return (0);
	if (oa->oa_irq[0].or_irq == IRQUNK)
		return (0);

	/* XXX should probe for hardware */

	oa->oa_io[0].or_size = WDC_OBIO_REG_SIZE;

	return (1);
}

void
wdc_obio_attach(struct device *parent, struct device *self, void *aux)
{
	struct wdc_obio_softc *sc = (void *)self;
	struct obio_attach_args *oa = aux;
	struct channel_softc *chp = &sc->sc_channel;

	printf("\n");

	chp->cmd_iot = chp->ctl_iot = oa->oa_iot;
	chp->_vtbl = &wdc_obio_vtbl;

	if (bus_space_map(chp->cmd_iot, oa->oa_io[0].or_addr,
	    WDC_OBIO_REG_SIZE, 0, &chp->cmd_ioh)
	 || bus_space_map(chp->ctl_iot,
	    oa->oa_io[0].or_addr + WDC_OBIO_AUXREG_OFFSET,
	    WDC_OBIO_AUXREG_SIZE, 0, &chp->ctl_ioh)) {
		printf(": couldn't map registers\n");
		return;
	}

	sc->sc_ih = obio_intr_establish(oa->oa_irq[0].or_irq, IPL_BIO, wdcintr,
	    chp, self->dv_xname);

	sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_PREATA;
	sc->sc_wdcdev.PIO_cap = 0;
	sc->sc_chanptr = chp;
	sc->sc_wdcdev.channels = &sc->sc_chanptr;
	sc->sc_wdcdev.nchannels = 1;
	chp->channel = 0;
	chp->wdc = &sc->sc_wdcdev;

	chp->ch_queue = wdc_alloc_queue();
	if (chp->ch_queue == NULL) {
		printf("%s: cannot allocate channel queue\n",
		    self->dv_xname);
		obio_intr_disestablish(sc->sc_ih);
		return;
	}

	wdcattach(chp);
	wdc_print_current_modes(chp);
}

u_int8_t
wdc_obio_read_reg(struct channel_softc *chp,  enum wdc_regs reg)
{
	if (reg & _WDC_AUX)
		return (bus_space_read_1(chp->ctl_iot, chp->ctl_ioh,
		    (reg & _WDC_REGMASK) << 1));
	else
		return (bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
		    (reg & _WDC_REGMASK) << 1));
}

void
wdc_obio_write_reg(struct channel_softc *chp,  enum wdc_regs reg, u_int8_t val)
{
	if (reg & _WDC_AUX)
		bus_space_write_1(chp->ctl_iot, chp->ctl_ioh,
		    (reg & _WDC_REGMASK) << 1, val);
	else
		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh,
		    (reg & _WDC_REGMASK) << 1, val);
}


path: sys/arch/landisk/include/CVS/Entries


code: src/sys/arch/landisk/include

path: sys/arch/landisk/include/CVS/Repository


code:
/*	$OpenBSD: _float.h,v 1.1 2012/06/26 16:12:44 deraadt Exp $	*/

#include <sh/_float.h>


code:
/*	$OpenBSD: _types.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/_types.h>


code:
/*	$OpenBSD: atomic.h,v 1.3 2011/03/23 16:54:35 pirofti Exp $	*/

/* Public Domain */

#ifndef _MACHINE_ATOMIC_H_
#define _MACHINE_ATOMIC_H_

#include <sh/atomic.h>

#endif /* _MACHINE_ATOMIC_H_ */


code:
/*	$OpenBSD: autoconf.h,v 1.2 2008/06/26 05:42:11 ray Exp $	*/
/*	$NetBSD: autoconf.h,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/

/*-
 * Copyright (c) 2002 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

struct mainbus_attach_args {
	const char	*ma_name;
};

struct confargs {
	const char	*ca_name;
	u_int		ca_node;

	int		ca_nreg;
	u_int		*ca_reg;

	int		ca_nintr;
	int		*ca_intr;

	u_long		ca_baseaddr;
};


code:
/*	$OpenBSD: bus.h,v 1.8 2011/03/23 16:54:35 pirofti Exp $	*/
/*	$NetBSD: bus.h,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/

/*-
 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
 * NASA Ames Research Center.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
 * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Christopher G. Demetriou
 *	for the NetBSD Project.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_BUS_H_
#define	_MACHINE_BUS_H_

#include <sys/types.h>

typedef	u_long	bus_addr_t;
typedef	u_long	bus_size_t;

typedef struct _bus_space *bus_space_tag_t;
typedef u_long bus_space_handle_t;

struct _bus_space {
	/* cookie */
	void		*bs_cookie;

	/* mapping/unmapping */
	int		(*bs_map)(void *, bus_addr_t, bus_size_t,
			    int, bus_space_handle_t *);
	void		(*bs_unmap)(void *, bus_space_handle_t,
			    bus_size_t);
	int		(*bs_subregion)(void *, bus_space_handle_t,
			    bus_size_t, bus_size_t, bus_space_handle_t *);

	/* allocation/deallocation */
	int		(*bs_alloc)(void *, bus_addr_t, bus_addr_t,
			    bus_size_t, bus_size_t, bus_size_t, int,
			    bus_addr_t *, bus_space_handle_t *);
	void		(*bs_free)(void *, bus_space_handle_t,
			    bus_size_t);

	/* get kernel virtual address */
	void *		(*bs_vaddr)(void *, bus_space_handle_t);

	/* read (single) */
	uint8_t		(*bs_r_1)(void *, bus_space_handle_t,
			    bus_size_t);
	uint16_t	(*bs_r_2)(void *, bus_space_handle_t,
			    bus_size_t);
	uint32_t	(*bs_r_4)(void *, bus_space_handle_t,
			    bus_size_t);
	uint64_t	(*bs_r_8)(void *, bus_space_handle_t,
			    bus_size_t);

	/* read multiple */
	void		(*bs_rm_1)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t *, bus_size_t);
	void		(*bs_rm_2)(void *, bus_space_handle_t,
			    bus_size_t, uint16_t *, bus_size_t);
	void		(*bs_rm_4)(void *, bus_space_handle_t,
			    bus_size_t, uint32_t *, bus_size_t);
	void		(*bs_rm_8)(void *, bus_space_handle_t,
			    bus_size_t, uint64_t *, bus_size_t);

	void		(*bs_rrm_2)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t *, bus_size_t);
	void		(*bs_rrm_4)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t *, bus_size_t);
	void		(*bs_rrm_8)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t *, bus_size_t);

	/* read region */
	void		(*bs_rr_1)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t *, bus_size_t);
	void		(*bs_rr_2)(void *, bus_space_handle_t,
			    bus_size_t, uint16_t *, bus_size_t);
	void		(*bs_rr_4)(void *, bus_space_handle_t,
			    bus_size_t, uint32_t *, bus_size_t);
	void		(*bs_rr_8)(void *, bus_space_handle_t,
			    bus_size_t, uint64_t *, bus_size_t);

	void		(*bs_rrr_2)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t *, bus_size_t);
	void		(*bs_rrr_4)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t *, bus_size_t);
	void		(*bs_rrr_8)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t *, bus_size_t);

	/* write (single) */
	void		(*bs_w_1)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t);
	void		(*bs_w_2)(void *, bus_space_handle_t,
			    bus_size_t, uint16_t);
	void		(*bs_w_4)(void *, bus_space_handle_t,
			    bus_size_t, uint32_t);
	void		(*bs_w_8)(void *, bus_space_handle_t,
			    bus_size_t, uint64_t);

	/* write multiple */
	void		(*bs_wm_1)(void *, bus_space_handle_t,
			    bus_size_t, const uint8_t *, bus_size_t);
	void		(*bs_wm_2)(void *, bus_space_handle_t,
			    bus_size_t, const uint16_t *, bus_size_t);
	void		(*bs_wm_4)(void *, bus_space_handle_t,
			    bus_size_t, const uint32_t *, bus_size_t);
	void		(*bs_wm_8)(void *, bus_space_handle_t,
			    bus_size_t, const uint64_t *, bus_size_t);

	void		(*bs_wrm_2)(void *, bus_space_handle_t,
			    bus_size_t, const uint8_t *, bus_size_t);
	void		(*bs_wrm_4)(void *, bus_space_handle_t,
			    bus_size_t, const uint8_t *, bus_size_t);
	void		(*bs_wrm_8)(void *, bus_space_handle_t,
			    bus_size_t, const uint8_t *, bus_size_t);

	/* write region */
	void		(*bs_wr_1)(void *, bus_space_handle_t,
			    bus_size_t, const uint8_t *, bus_size_t);
	void		(*bs_wr_2)(void *, bus_space_handle_t,
			    bus_size_t, const uint16_t *, bus_size_t);
	void		(*bs_wr_4)(void *, bus_space_handle_t,
			    bus_size_t, const uint32_t *, bus_size_t);
	void		(*bs_wr_8)(void *, bus_space_handle_t,
			    bus_size_t, const uint64_t *, bus_size_t);

	void		(*bs_wrr_2)(void *, bus_space_handle_t,
			    bus_size_t, const uint8_t *, bus_size_t);
	void		(*bs_wrr_4)(void *, bus_space_handle_t,
			    bus_size_t, const uint8_t *, bus_size_t);
	void		(*bs_wrr_8)(void *, bus_space_handle_t,
			    bus_size_t, const uint8_t *, bus_size_t);

	/* set multiple */
	void		(*bs_sm_1)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t, bus_size_t);
	void		(*bs_sm_2)(void *, bus_space_handle_t,
			    bus_size_t, uint16_t, bus_size_t);
	void		(*bs_sm_4)(void *, bus_space_handle_t,
			    bus_size_t, uint32_t, bus_size_t);
	void		(*bs_sm_8)(void *, bus_space_handle_t,
			    bus_size_t, uint64_t, bus_size_t);

	/* set region */
	void		(*bs_sr_1)(void *, bus_space_handle_t,
			    bus_size_t, uint8_t, bus_size_t);
	void		(*bs_sr_2)(void *, bus_space_handle_t,
			    bus_size_t, uint16_t, bus_size_t);
	void		(*bs_sr_4)(void *, bus_space_handle_t,
			    bus_size_t, uint32_t, bus_size_t);
	void		(*bs_sr_8)(void *, bus_space_handle_t,
			    bus_size_t, uint64_t, bus_size_t);

	/* copy */
	void		(*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
			    bus_space_handle_t, bus_size_t, bus_size_t);
	void		(*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
			    bus_space_handle_t, bus_size_t, bus_size_t);
	void		(*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
			    bus_space_handle_t, bus_size_t, bus_size_t);
	void		(*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
			    bus_space_handle_t, bus_size_t, bus_size_t);
};

#ifdef _KERNEL
/*
 * Utility macros; INTERNAL USE ONLY.
 */
#define	__bs_c(a,b)		__CONCAT(a,b)
#define	__bs_opname(op,size)	__bs_c(__bs_c(__bs_c(bs_,op),_),size)

#define	__bs_rs(sz, tn, t, h, o)					\
	(*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)

#define	__bs_ws(sz, tn, t, h, o, v)					\
	(*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)

#define	__bs_nonsingle(type, sz, tn, t, h, o, a, c)			\
	(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)

#define	__bs_set(type, sz, tn, t, h, o, v, c)				\
	(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)

#define	__bs_copy(sz, tn, t, h1, o1, h2, o2, cnt)			\
	(*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)

/*
 * Mapping and unmapping operations.
 */
#define	bus_space_map(t, a, s, f, hp)					\
	(*(t)->bs_map)((t)->bs_cookie, (a), (s), (f), (hp))
#define	bus_space_unmap(t, h, s)					\
	(*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
#define	bus_space_subregion(t, h, o, s, hp)				\
	(*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))

#endif /* _KERNEL */

#define	BUS_SPACE_MAP_CACHEABLE		0x01
#define	BUS_SPACE_MAP_LINEAR		0x02
#define	BUS_SPACE_MAP_PREFETCHABLE     	0x04

#ifdef _KERNEL
/*
 * Allocation and deallocation operations.
 */
#define	bus_space_alloc(t, rs, re, s, a, b, f, ap, hp)			\
	(*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b),	\
	    (f), (ap), (hp))
#define	bus_space_free(t, h, s)						\
	(*(t)->bs_free)((t)->bs_cookie, (h), (s))

/*
 * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
 */
#define bus_space_vaddr(t, h) \
	(*(t)->bs_vaddr)((t)->bs_cookie, (h))

/*
 * Bus barrier operations.  The SH3 does not currently require
 * barriers, but we must provide the flags to MI code.
 */
#define	bus_space_barrier(t, h, o, l, f)				\
	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))

#define	BUS_SPACE_BARRIER_READ	0x01
#define	BUS_SPACE_BARRIER_WRITE	0x02

/*
 * Bus read (single) operations.
 */
#define	bus_space_read_1(t, h, o)	__bs_rs(1,uint8_t,(t),(h),(o))
#define	bus_space_read_2(t, h, o)	__bs_rs(2,uint16_t,(t),(h),(o))
#define	bus_space_read_4(t, h, o)	__bs_rs(4,uint32_t,(t),(h),(o))
#define	bus_space_read_8(t, h, o)	__bs_rs(8,uint64_t,(t),(h),(o))

/*
 * Bus read multiple operations.
 */
#define	bus_space_read_multi_1(t, h, o, a, c)				\
	__bs_nonsingle(rm,1,uint8_t,(t),(h),(o),(a),(c))
#define	bus_space_read_multi_2(t, h, o, a, c)				\
	__bs_nonsingle(rm,2,uint16_t,(t),(h),(o),(a),(c))
#define	bus_space_read_multi_4(t, h, o, a, c)				\
	__bs_nonsingle(rm,4,uint32_t,(t),(h),(o),(a),(c))
#define	bus_space_read_multi_8(t, h, o, a, c)				\
	__bs_nonsingle(rm,8,uint64_t,(t),(h),(o),(a),(c))

#define	bus_space_read_raw_multi_2(t, h, o, a, c)			\
	__bs_nonsingle(rrm,2,uint16_t,(t),(h),(o),(a),(c))
#define	bus_space_read_raw_multi_4(t, h, o, a, c)			\
	__bs_nonsingle(rrm,4,uint32_t,(t),(h),(o),(a),(c))
#define	bus_space_read_raw_multi_8(t, h, o, a, c)			\
	__bs_nonsingle(rrm,8,uint64_t,(t),(h),(o),(a),(c))

/*
 * Bus read region operations.
 */
#define	bus_space_read_region_1(t, h, o, a, c)				\
	__bs_nonsingle(rr,1,uint8_t,(t),(h),(o),(a),(c))
#define	bus_space_read_region_2(t, h, o, a, c)				\
	__bs_nonsingle(rr,2,uint16_t,(t),(h),(o),(a),(c))
#define	bus_space_read_region_4(t, h, o, a, c)				\
	__bs_nonsingle(rr,4,uint32_t,(t),(h),(o),(a),(c))
#define	bus_space_read_region_8(t, h, o, a, c)				\
	__bs_nonsingle(rr,8,uint64_t,(t),(h),(o),(a),(c))

#define	bus_space_read_raw_region_2(t, h, o, a, c)			\
	__bs_nonsingle(rrr,2,uint16_t,(t),(h),(o),(a),(c))
#define	bus_space_read_raw_region_4(t, h, o, a, c)			\
	__bs_nonsingle(rrr,4,uint32_t,(t),(h),(o),(a),(c))
#define	bus_space_read_raw_region_8(t, h, o, a, c)			\
	__bs_nonsingle(rrr,8,uint64_t,(t),(h),(o),(a),(c))

/*
 * Bus write (single) operations.
 */
#define	bus_space_write_1(t, h, o, v)	__bs_ws(1,uint8_t,(t),(h),(o),(v))
#define	bus_space_write_2(t, h, o, v)	__bs_ws(2,uint16_t,(t),(h),(o),(v))
#define	bus_space_write_4(t, h, o, v)	__bs_ws(4,uint32_t,(t),(h),(o),(v))
#define	bus_space_write_8(t, h, o, v)	__bs_ws(8,uint64_t,(t),(h),(o),(v))

/*
 * Bus write multiple operations.
 */
#define	bus_space_write_multi_1(t, h, o, a, c)				\
	__bs_nonsingle(wm,1,uint8_t,(t),(h),(o),(a),(c))
#define	bus_space_write_multi_2(t, h, o, a, c)				\
	__bs_nonsingle(wm,2,uint16_t,(t),(h),(o),(a),(c))
#define	bus_space_write_multi_4(t, h, o, a, c)				\
	__bs_nonsingle(wm,4,uint32_t,(t),(h),(o),(a),(c))
#define	bus_space_write_multi_8(t, h, o, a, c)				\
	__bs_nonsingle(wm,8,uint64_t,(t),(h),(o),(a),(c))

#define	bus_space_write_raw_multi_2(t, h, o, a, c)			\
	__bs_nonsingle(wrm,2,uint16_t,(t),(h),(o),(a),(c))
#define	bus_space_write_raw_multi_4(t, h, o, a, c)			\
	__bs_nonsingle(wrm,4,uint32_t,(t),(h),(o),(a),(c))
#define	bus_space_write_raw_multi_8(t, h, o, a, c)			\
	__bs_nonsingle(wrm,8,uint64_t,(t),(h),(o),(a),(c))

/*
 * Bus write region operations.
 */
#define	bus_space_write_region_1(t, h, o, a, c)				\
	__bs_nonsingle(wr,1,uint8_t,(t),(h),(o),(a),(c))
#define	bus_space_write_region_2(t, h, o, a, c)				\
	__bs_nonsingle(wr,2,uint16_t,(t),(h),(o),(a),(c))
#define	bus_space_write_region_4(t, h, o, a, c)				\
	__bs_nonsingle(wr,4,uint32_t,(t),(h),(o),(a),(c))
#define	bus_space_write_region_8(t, h, o, a, c)				\
	__bs_nonsingle(wr,8,uint64_t,(t),(h),(o),(a),(c))

#define	bus_space_write_raw_region_2(t, h, o, a, c)			\
	__bs_nonsingle(wrr,2,uint16_t,(t),(h),(o),(a),(c))
#define	bus_space_write_raw_region_4(t, h, o, a, c)			\
	__bs_nonsingle(wrr,4,uint32_t,(t),(h),(o),(a),(c))
#define	bus_space_write_raw_region_8(t, h, o, a, c)			\
	__bs_nonsingle(wrr,8,uint64_t,(t),(h),(o),(a),(c))

/*
 * Set multiple operations.
 */
#define	bus_space_set_multi_1(t, h, o, v, c)				\
	__bs_set(sm,1,uint8_t,(t),(h),(o),(v),(c))
#define	bus_space_set_multi_2(t, h, o, v, c)				\
	__bs_set(sm,2,uint16_t,(t),(h),(o),(v),(c))
#define	bus_space_set_multi_4(t, h, o, v, c)				\
	__bs_set(sm,4,uint32_t,(t),(h),(o),(v),(c))
#define	bus_space_set_multi_8(t, h, o, v, c)				\
	__bs_set(sm,8,uint64_t,(t),(h),(o),(v),(c))

/*
 * Set region operations.
 */
#define	bus_space_set_region_1(t, h, o, v, c)				\
	__bs_set(sr,1,uint8_t,(t),(h),(o),(v),(c))
#define	bus_space_set_region_2(t, h, o, v, c)				\
	__bs_set(sr,2,uint16_t,(t),(h),(o),(v),(c))
#define	bus_space_set_region_4(t, h, o, v, c)				\
	__bs_set(sr,4,uint32_t,(t),(h),(o),(v),(c))
#define	bus_space_set_region_8(t, h, o, v, c)				\
	__bs_set(sr,8,uint64_t,(t),(h),(o),(v),(c))

/*
 * Copy region operations.
 */
#define	bus_space_copy_1(t, h1, o1, h2, o2, c)				\
	__bs_copy(1, uint8_t, (t), (h1), (o1), (h2), (o2), (c))
#define	bus_space_copy_2(t, h1, o1, h2, o2, c)				\
	__bs_copy(2, uint16_t, (t), (h1), (o1), (h2), (o2), (c))
#define	bus_space_copy_4(t, h1, o1, h2, o2, c)				\
	__bs_copy(4, uint32_t, (t), (h1), (o1), (h2), (o2), (c))
#define	bus_space_copy_8(t, h1, o1, h2, o2, c)				\
	__bs_copy(8, uint64_t, (t), (h1), (o1), (h2), (o2), (c))

#endif /* _KERNEL */

/*
 * Flags used in various bus DMA methods.
 */
#define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
#define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
#define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
#define	BUS_DMA_COHERENT	0x004	/* map memory to not require sync */
#define	BUS_DMA_STREAMING	0x008	/* hint: sequential, unidirectional */
#define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
#define	BUS_DMA_BUS2		0x020
#define	BUS_DMA_BUS3		0x040
#define	BUS_DMA_BUS4		0x080
#define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
#define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
#define	BUS_DMA_NOCACHE		0x400	/* hint: map non-cached memory */
#define	BUS_DMA_ZERO		0x800	/* zero memory in dmamem_alloc */

/* Forwards needed by prototypes below. */
struct mbuf;
struct uio;

/*
 *	Operations performed by bus_dmamap_sync().
 */
#define	BUS_DMASYNC_PREREAD	0x01
#define	BUS_DMASYNC_POSTREAD	0x02
#define	BUS_DMASYNC_PREWRITE	0x04
#define	BUS_DMASYNC_POSTWRITE	0x08

typedef struct _bus_dma_tag *bus_dma_tag_t;
typedef struct _bus_dmamap *bus_dmamap_t;

#define BUS_DMA_TAG_VALID(t)    ((t) != (bus_dma_tag_t)0)

/*
 *	bus_dma_segment_t
 *
 *	Describes a single contiguous DMA transaction.  Values
 *	are suitable for programming into DMA registers.
 */
struct _bus_dma_segment {
	bus_addr_t	ds_addr;	/* DMA address */
	bus_size_t	ds_len;		/* length of transfer */

	/* private section */
	bus_addr_t	_ds_vaddr;	/* virtual address */
};
typedef struct _bus_dma_segment	bus_dma_segment_t;

/*
 *	bus_dma_tag_t
 *
 *	A machine-dependent opaque type describing the implementation of
 *	DMA for a given bus.
 */

struct _bus_dma_tag {
	void	*_cookie;		/* cookie used in the guts */

	/*
	 * DMA mapping methods.
	 */
	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
		    bus_size_t, struct proc *, int);
	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
		    struct mbuf *, int);
	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
		    struct uio *, int);
	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
		    bus_dma_segment_t *, int, bus_size_t, int);
	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
		    bus_addr_t, bus_size_t, int);

	/*
	 * DMA memory utility functions.
	 */
	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
		    bus_size_t, bus_dma_segment_t *, int, int *, int);
	void	(*_dmamem_free)(bus_dma_tag_t,
		    bus_dma_segment_t *, int);
	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
		    int, size_t, caddr_t *, int);
	void	(*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
		    int, off_t, int, int);
};

#define	bus_dmamap_create(t, s, n, m, b, f, p)			\
	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
#define	bus_dmamap_destroy(t, p)				\
	(*(t)->_dmamap_destroy)((t), (p))
#define	bus_dmamap_load(t, m, b, s, p, f)			\
	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
#define	bus_dmamap_load_mbuf(t, m, b, f)			\
	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
#define	bus_dmamap_load_uio(t, m, u, f)				\
	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
#define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
#define	bus_dmamap_unload(t, p)					\
	(*(t)->_dmamap_unload)((t), (p))
#define	bus_dmamap_sync(t, m, o, l, op)				\
	(void)((t)->_dmamap_sync ?				\
	    (*(t)->_dmamap_sync)((t), (m), (o), (l), (op)) : (void)0)

#define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
#define	bus_dmamem_free(t, sg, n)				\
	(*(t)->_dmamem_free)((t), (sg), (n))
#define	bus_dmamem_map(t, sg, n, s, k, f)			\
	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
#define	bus_dmamem_unmap(t, k, s)				\
	(*(t)->_dmamem_unmap)((t), (k), (s))
#define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))

/*
 *	bus_dmamap_t
 *
 *	Describes a DMA mapping.
 */
struct _bus_dmamap {
	/*
	 * PRIVATE MEMBERS: not for use my machine-independent code.
	 */
	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
	int		_dm_segcnt;	/* number of segs this map can map */
	bus_size_t	_dm_maxsegsz;	/* largest possible segment */
	bus_size_t	_dm_boundary;	/* don't cross this */
	int		_dm_flags;	/* misc. flags */

	void		*_dm_cookie;	/* cookie for bus-specific functions */

	/*
	 * PUBLIC MEMBERS: these are used by machine-independent code.
	 */
	bus_size_t	dm_mapsize;	/* size of the mapping */
	int		dm_nsegs;	/* # valid segments in mapping */
	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
};

#if defined(_LANDISK_BUS_DMA_PRIVATE)
int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
	    bus_size_t, int, bus_dmamap_t *);
void	_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
int	_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t,
	    struct proc *, int);
int	_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *,int);
int	_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
int	_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, bus_dma_segment_t *,
	    int, bus_size_t, int);
void	_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
void	_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
	    bus_size_t, int);

int	_bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
	    bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs,
	    int nsegs, int *rsegs, int flags);
void	_bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
	    int nsegs);
int	_bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs,
	    size_t size, caddr_t *kvap, int flags);
void	_bus_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva, size_t size);
paddr_t	_bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
	    int nsegs, off_t off, int prot, int flags);
#endif	/* _LANDISK_BUS_DMA_PRIVATE */

#endif	/* _MACHINE_BUS_H_ */


code:
/*	$OpenBSD: cdefs.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/cdefs.h>


code:
/*	$OpenBSD: conf.h,v 1.6 2011/07/04 16:52:41 nicm Exp $	*/

/*
 * Copyright (c) 1997 Mark Brinicombe.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by Mark Brinicombe
 *	for the NetBSD Project.
 * 4. The name of the company nor the name of the author may be used to
 *    endorse or promote products derived from this software without specific
 *    prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * RiscBSD kernel project
 *
 * conf.h
 *
 * Prototypes for device driver functions
 */

#ifndef _MACHINE_CONF_H_
#define	_MACHINE_CONF_H_

#include <sys/conf.h>

#define mmread  mmrw
#define mmwrite mmrw
cdev_decl(mm);

bdev_decl(wd);
cdev_decl(wd);
bdev_decl(fd);
cdev_decl(fd);

/* Character device declarations */

/* open, close, read, write, ioctl */
#define	cdev_rtc_init(c,n)	cdev__ocrwi_init(c,n)

/* open, close, ioctl, kqueue */
#define cdev_apm_init(c,n) { \
        dev_init(c,n,open), dev_init(c,n,close), (dev_type_read((*))) enodev, \
        (dev_type_write((*))) enodev, dev_init(c,n,ioctl), \
	(dev_type_stop((*))) enodev, 0, selfalse, \
	(dev_type_mmap((*))) enodev, 0, 0, dev_init(c,n,kqfilter) }

cdev_decl(com);
cdev_decl(rtc);
cdev_decl(wsfont);
cdev_decl(pci);
cdev_decl(apm);
cdev_decl(spkr);
cdev_decl(scif);

#endif	/* _MACHINE_CONF_H_ */


code:
/*	$OpenBSD: cpu.h,v 1.4 2011/06/24 19:47:48 naddy Exp $	*/
/*	$NetBSD: cpu.h,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/

#ifndef	_MACHINE_CPU_H_
#define	_MACHINE_CPU_H_

void machine_reset(void);

#include <sh/cpu.h>

/*
 * CTL_MACHDEP definitions.
 */
#define	CPU_CONSDEV		1	/* dev_t: console terminal device */
		/*		2	   formerly: keyboard reset */
#define	CPU_LED_BLINK		3	/* blink leds */
#define	CPU_MAXID		4	/* number of valid machdep ids */

#define	CTL_MACHDEP_NAMES {						\
	{ 0, 0 },							\
	{ "console_device",	CTLTYPE_STRUCT },			\
	{ 0, 0 },							\
	{ "led_blink",		CTLTYPE_INT }				\
}

#endif	/* _MACHINE_CPU_H_ */


code:
/*	$OpenBSD: cputypes.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/cputypes.h>


code:
/*	$OpenBSD: db_machdep.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/db_machdep.h>


code:
/*	$OpenBSD: disklabel.h,v 1.2 2007/06/17 00:27:27 deraadt Exp $	*/

#include <sh/disklabel.h>


code:
/*	$OpenBSD: endian.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/endian.h>


code:
/*	$OpenBSD: exec.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/exec.h>


code:
/*	$OpenBSD: fenv.h,v 1.2 2013/06/01 21:20:54 jasper Exp $	*/
/* public domain */
#include <sh/fenv.h>


code:
/*	$OpenBSD: frame.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/frame.h>


code:
/*	$OpenBSD: ieee.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/ieee.h>


code:
/*	$OpenBSD: ieeefp.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/ieeefp.h>


code:
/*	$OpenBSD: intr.h,v 1.11 2013/05/17 19:38:52 kettenis Exp $	*/
/*	$NetBSD: intr.h,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/

/*-
 * Copyright (c) 2002 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MACHINE_INTR_H_
#define _MACHINE_INTR_H_

#include <sh/intr.h>

/* Number of interrupt source */
#define _INTR_N		16

/* Interrupt priority levels */
#define	IPL_BIO		10	/* block I/O */
#define	IPL_AUDIO	IPL_BIO
#define	IPL_NET		11	/* network */
#define	IPL_TTY		12	/* terminal */
#define	IPL_VM		12
#define	IPL_CLOCK	14	/* clock */
#define	IPL_SCHED	14	/* scheduling */
#define	IPL_HIGH	15	/* everything */

#define	IPL_MPSAFE	0	/* no "mpsafe" interrupts */

#define	splsoftclock()		_cpu_intr_raise(IPL_SOFTCLOCK << 4)
#define	splsoftnet()		_cpu_intr_raise(IPL_SOFTNET << 4)
#define	splsoftserial()		_cpu_intr_raise(IPL_SOFTSERIAL << 4)
#define	splbio()		_cpu_intr_raise(IPL_BIO << 4)
#define	splnet()		_cpu_intr_raise(IPL_NET << 4)
#define	spltty()		_cpu_intr_raise(IPL_TTY << 4)
#define	splvm()			_cpu_intr_raise(IPL_VM << 4)
#define	splaudio()		_cpu_intr_raise(IPL_AUDIO << 4)
#define	splclock()		_cpu_intr_raise(IPL_CLOCK << 4)
#define	splstatclock()		splclock()
#define	splsched()		_cpu_intr_raise(IPL_SCHED << 4)
#define	splhigh()		_cpu_intr_suspend()
#define	spllock()		splhigh()

#define	spl0()			_cpu_intr_resume(IPL_NONE << 4)
#define	splx(x)			_cpu_intr_resume(x)

#ifdef DIAGNOSTIC
/*
 * Although this function is implemented in MI code, it must be in this MD
 * header because we don't want this header to include MI includes.
 */
void splassert_fail(int, int, const char *);
extern int splassert_ctl;
void splassert_check(int, const char *);
#define	splassert(__wantipl) \
do {									\
	if (splassert_ctl > 0) {					\
		splassert_check(__wantipl, __func__);			\
	}								\
} while (0)
#define splsoftassert(__wantipl) splassert(__wantipl)
#else
#define	splassert(wantipl)	do { /* nothing yet */ } while (0)
#define	splsoftassert(wantipl)	do { /* nothing yet */ } while (0)
#endif

void intr_init(void);
void *extintr_establish(int, int, int (*)(void *), void *, const char *);
void extintr_disestablish(void *ih);
void extintr_enable(void *ih);
void extintr_disable(void *ih);
void extintr_disable_by_num(int irq);

#endif /* !_MACHINE_INTR_H_ */


code:
/*	$OpenBSD: kcore.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/kcore.h>


code:
/*	$OpenBSD: limits.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/limits.h>


code:
/*	$OpenBSD: loadfile_machdep.h,v 1.3 2015/07/17 20:44:38 miod Exp $	*/
/*	$NetBSD: loadfile_machdep.h,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/

/*-
 * Copyright (c) 1999 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Christos Zoulas.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#define BOOT_ELF
#define	ELFSIZE 32

#define LOAD_KERNEL		LOAD_ALL
#define COUNT_KERNEL		COUNT_ALL

#define LOADADDR(a)		(((u_long)(a)) + offset)
#define ALIGNENTRY(a)		((u_long)(a))
#define READ(f, b, c)		read((f), (void *)LOADADDR(b), (c))
#define BCOPY(s, d, c)		memcpy((void *)LOADADDR(d), (void *)(s), (c))
#define BZERO(d, c)		memset((void *)LOADADDR(d), 0, (c))
#define	WARN(a)			(void)(printf a, \
				    printf((errno ? ": %s\n" : "\n"), \
				    strerror(errno)))
#define PROGRESS(a)		(void) printf a
#define ALLOC(a)		alloc(a)
#define FREE(a, b)		free(a, b)


code:
/*	$OpenBSD: lock.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/lock.h>


code:
/*	$OpenBSD: mutex.h,v 1.2 2009/11/24 11:59:59 jasper Exp $	*/

#include <sh/mutex.h>