ext1 <;> simp [hn, hr, e₁.progress_empty, e₂.progress_empty, e₁.events_eq, e₂.events_eq]
α : Type
inst✝ : Proper α
s s₁ s₂ : State α
e₁ : s ↓ₜ s₁
e₂ : s ↓ₜ s₂
hn : s₁.tag = s₂.tag
hr : s₁.rtr = s₂.rtr
⊢ s₁ = s₂
no goals