simp [ext, append, div_add_mul_self, show 0 < i from pos_of_gt hz, hz]
M : Type u_1
inst✝⁵ : Zero M
inst✝⁴ : One M
inst✝³ : Add M
inst✝² : Mul M
inst✝¹ : LT M
inst✝ : M ⊧ₘ* 𝐈𝚫₀
i X z : M
hz : z < i
⊢ ext i (append i X z) = z
no goals