Status on circuit lower bounds for polylog-bounded depth circuits Bounded depth circuit complexity is one of the main areas of research within circuit complexity theory. This topic has origins in results like "the parity function is not in $AC^{0}$" and "the mod $p$ function is not computed by $AC^{0}[q]$", where $AC^0[q]$ is the class of languages decidable by non-uniform, constant depth, polynomial size, unbounded fan-in AND, OR, NOT and modulo $q$ gates, where $\gcd(p,q)=1$. However, getting concrete lower bounds results on polylogarithmic depth circuits seems to be out of reach by using classical methods like restricting inputs and approximating polynomials on finite fields.

I know a STOC'96 paper which leads to geometric complexity theory and which shows that efficient parallel computing using operations without bit-wise ones cannot compute the min-cost-flow problem.

This means that in certain limited settings, we can prove $NC$ lower bounds for some $P$-complete problem.

First, are there other methods or techniques that may be plausible approaches for proving polylogarithmic depth circuit lower bounds?

Second, how useful is the following statement for the theory community?

The size of an $NC$ circuit computing a Boolean function $f\colon\{0,1\}^{n}\rightarrow \{0,1\}$ is at least $l$, where $l$ is some mathematical quantity depending on the hardness of the target function $f$. The value of $l$ may be, for example, a combinatorial quantity like discrepancy, a linear algebraic quantity like the rank of certain type of matrix over a field, or some entirely new quantity which has not previously been used in complexity theory.
On techniques for proving poly-log circuit-depth lower bounds, all current approaches work under restricted settings.
Like, in the work leading to GCT that you mention, the lower bound applies to a restricted PRAM model without bit operations.

Under another restriction, which is the monotone restriction for monotone boolean functions, there is a Fourier-analytic (or enumerative-combinatorial) approach for proving monotone circuit-depth lower bounds, in my joint work with Aaron Potechin (ECCC and STOC).
This improves on an earlier result by Ran Raz and Pierre McKenzie, which extends the communication game framework of Mauricio Karchmer and Avi Wigderson concerning circuit-depth.

Another line of research to extend the Karchmer–Wigderson game was proposed as a referred communication game by Scott Aaronson and Avi Wigderson, whose extension to a competing-prover protocol is suggested as an approach to separate NC from P by Gillat Kol and Ran Raz (ECCC and ITCS).

Apart from studying the syntactic restriction of monotonicity, there is an approach to study a semantic restriction related to pebble games (called thrifty branching programs) by Stephen Cook, Pierre McKenzie, Dustin Wehr, Mark Braverman, and Rahul Santhanam.
There is a strong lower bound under the thrifty restriction by Dustin Wehr, matching the best known upper bound for P-complete problems.
These results concern deterministic space complexity, which lower bounds parallel time or circuit-depth by known simulation results (e.g. since $\text{AlternatingTime}[t] \subseteq \text{DeterministicSpace}[t]$).

About the question relating the size and depth of circuits, the following approach may be related.
Richard Lipton and Ryan Williams show that, given a sufficiently strong lower bound on depth (i.e. $n^{1-O(1)}$), a weak size lower bound (i.e. $n^{1+\Omega(1)}$) can separate NC from P.
This result follows from a size-depth trade-off argument based on block-respecting simulations.
An earlier result on trading depth for size is due to Allender and Koucký based on the idea of self-reducibility, but it studied smaller complexity classes like NC$^1$ and NL.

Note that among the above mentioned approaches, some of them consider both the size and the depth of circuits, while other approaches consider only circuit-depth.
In particular, the semi-algebro-geometric approach of Mulmuley, the competing-prover protocol approach studied by Kol–Raz, and the size-depth trade-off approach of Allender–Koucký  and Lipton–Williams all concern both the size and the depth of circuits.
The results in Chan–Potechin, Raz–McKenzie, Cook–McKenzie–Wehr–Braverman–Santhanam, and Wehr give circuit-depth lower bounds under restricted settings regardless of size.
Also, the referred communication game of Aaronson–Wigderson concerns only circuit-depth.

It is still consistent with our knowledge that some P-complete problem cannot be computed by circuits of small depth (i.e. $\log^{O(1)}n$), regardless of size.
If size does not matter for small depth circuits (of bounded fan-in), then perhaps it makes sense to focus more on circuit-depth, than to focus on the size of small depth circuits.