def get_lru(mem_cells, max_size=100):
    """Least recently used (LRU) cache mechanism.
    :param mem_cells - sequence of memory cells that should be placed in cache, list, in example, 1, 2, 3, 4, 5, 4, 6].
    :param max_size - cache size, generally in memory cells, usually in bytes, in example, 4.
    :return final cache state, list with memory cells; for given examples of mem_cells and max_size is [5, 6, 3, 4]."""
    cache = list()
    age_bits = dict()

    for order, i in enumerate(mem_cells):
        # Check out if memory cell is presented in the cache
        try:
            cell_index = cache.index(i)

        except ValueError:
            # Cell isn't presented in cache.
            if len(cache) == max_size:  # Memory cache is filled up; replace LRU cell
                # Find LRU cell index
                lru_index = sorted(age_bits.items(), key=lambda x: x[1])[0][0]
                # Replace LRU cell with new one.
                cache[lru_index] = i
            else:
                # Add cell in available cache slot.
                cache.append(i)
            # Update cell' age bit
            age_bits[cache.index(i)] = order

        else:
            # Cell already presented in cache. Updated age bit for that cell
            age_bits[cell_index] = order

    return cache