from py65.devices import mpu6502 
from py65.utils.devices import make_instruction_decorator

# The 65Org16 is a derivative of the 6502 architecture
#   - with 32-bit address space (by using 16-bit bytes)
#   - with no specific support for 8-bit bytes
#   - with BCD mode not supported
#   - and otherwise all opcodes and addressing modes are like the NMOS 6502
#   - sign bit is bit 15, overflow bit is bit 14
#
# One implementation can be found here: https://github.com/BigEd/verilog-6502/wiki

class MPU(mpu6502.MPU):

    def __init__(self, byteWidth=16, addrWidth=32, addrFmt="%08x", byteFmt="%04x", *args, **kwargs):
        mpu6502.MPU.__init__(self, byteWidth=byteWidth, addrWidth=addrWidth, addrFmt=addrFmt, byteFmt=byteFmt, *args, **kwargs)
        self.name = '65Org16'
        self.waiting = False
        self.IrqTo   = (1<<self.addrWidth)-2
        self.ResetTo = (1<<self.addrWidth)-4
        self.NMITo   = (1<<self.addrWidth)-6
        self.NEGATIVE = 1 << 15
        self.OVERFLOW = 1 << 14

    def step(self):
        if self.waiting:
            self.processorCycles += 1
        else:
            mpu6502.MPU.step(self)
        return self

    # Make copies of the lists
    instruct    = mpu6502.MPU.instruct[:]
    cycletime   = mpu6502.MPU.cycletime[:]
    extracycles = mpu6502.MPU.extracycles[:]
    disassemble = mpu6502.MPU.disassemble[:]

    def reprformat(self):
        return ("%s PC      AC   XR   YR   SP   NV---------BDIZC\n" + \
                "%s: %08x %04x %04x %04x %04x %s"
               )

@@ -25,17 +25,16 @@
  mpu6502
- 
 %0Afrom py
@@ -85,17 +85,51 @@
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-#
+class MPU(mpu6502.MPU):%0A    %22%22%22%0A   
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@@ -174,17 +174,19 @@
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@@ -232,17 +232,19 @@
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@@ -281,17 +281,19 @@
 t bytes%0A
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+   
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@@ -317,20 +317,22 @@
 pported%0A
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+ 
 - and ot
@@ -395,17 +395,19 @@
 OS 6502%0A
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+   
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@@ -450,11 +450,12 @@
  14%0A
-#%0A#
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@@ -536,32 +536,15 @@
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-%0Aclass MPU(mpu6502.MPU):
+    %22%22%22
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