class DebugPort:

    ID_CODES = (
        0x1BA01477,  # EFM32
        0x2BA01477,  # STM32
        0x0BB11477,  # NUC1xx
        )

    def __init__(self, swd):
        self.swd = swd
        # read the IDCODE
        idcode = self.idcode()
        if idcode not in DebugPort.ID_CODES:
            print "warning: unexpected idcode: ", idcode
        # power up
        self.swd.writeSWD(False, 1, 0x54000000)
        if (self.status() >> 24) != 0xF4:
            print "error powering up system"
            sys.exit(1)
        # get the SELECT register to a known state
        self.select(0, 0)
        self.curAP = 0
        self.curBank = 0

    def idcode(self):
        return self.swd.readSWD(False, 0)

    def abort(self, orunerr, wdataerr, stickyerr, stickycmp, dap):
        value = 0x00000000
        value = value | (0x10 if orunerr else 0x00)
        value = value | (0x08 if wdataerr else 0x00)
        value = value | (0x04 if stickyerr else 0x00)
        value = value | (0x02 if stickycmp else 0x00)
        value = value | (0x01 if dap else 0x00)
        self.swd.writeSWD(False, 0, value)

    def status(self):
        return self.swd.readSWD(False, 1)

    def control(self, trnCount=0, trnMode=0, maskLane=0, orunDetect=0):
        value = 0x54000000
        value = value | ((trnCount & 0xFFF) << 12)
        value = value | ((maskLane & 0x00F) << 8)
        value = value | ((trnMode  & 0x003) << 2)
        value = value | (0x1 if orunDetect else 0x0)
        self.swd.writeSWD(False, 1, value)

    def select(self, apsel, apbank):
        value = 0x00000000
        value = value | ((apsel  & 0xFF) << 24)
        value = value | ((apbank & 0x0F) << 4)
        self.swd.writeSWD(False, 2, value)

    def readRB(self):
        return self.swd.readSWD(False, 3)

    def readAP(self, apsel, address):
        adrBank = (address >> 4) & 0xF
        adrReg  = (address >> 2) & 0x3
        if apsel != self.curAP or adrBank != self.curBank:
            self.select(apsel, adrBank)
            self.curAP = apsel
            self.curBank = adrBank
        return self.swd.readSWD(True, adrReg)

    def writeAP(self, apsel, address, data, ignore=False):
        adrBank = (address >> 4) & 0xF
        adrReg  = (address >> 2) & 0x3
        if apsel != self.curAP or adrBank != self.curBank:
            self.select(apsel, adrBank)
            self.curAP = apsel
            self.curBank = adrBank
        self.swd.writeSWD(True, adrReg, data, ignore)

@@ -1,8 +1,386 @@
+from SWDProtocol import *%0Afrom SWDErrors import *%0A# Debug Port registers%0A# p.6-5%0AREG_IDCODE = 0 %3C%3C 3     # Read%0AREG_ABORT = 0 %3C%3C 3      # Write%0AREG_CTRL_STAT = 1 %3C%3C 3  # Read/Write, CTRLSEL=0%0AREG_WCR = 1 %3C%3C 3        # Read/Write, CTRLSEL=1%0AREG_RESEND = 2 %3C%3C 3     # Read%0AREG_SELECT = 2 %3C%3C 3     # Write%0AREG_READBUFF = 3 %3C%3C 3   # Read%0AREG_ROUTESEL = 3 %3C%3C 3   # Write, reserved%0A%0A%0A
 class De
@@ -1070,28 +1070,37 @@
 swd.read
-SWD(False, 0
+Cmd(OP_DP, REG_IDCODE
 )%0A%0A    d
@@ -1158,16 +1158,22 @@
 cmp, dap
+=False
 ):%0A     
@@ -1481,20 +1481,28 @@
 rite
-SWD(False, 0
+Cmd(OP_DP, REG_ABORT
 , va
@@ -1557,28 +1557,40 @@
 swd.read
-SWD(False, 1
+Cmd(OP_DP, REG_CTRL_STAT
 )%0A%0A    d
@@ -1909,28 +1909,40 @@
 wd.write
-SWD(False, 1
+Cmd(OP_DP, REG_CTRL_STAT
 , value)
@@ -2128,20 +2128,29 @@
 rite
-SWD(False, 2
+Cmd(OP_DP, REG_SELECT
 , va
@@ -2168,17 +2168,23 @@
 ef readR
-B
+eadbuff
 (self):%0A
@@ -2215,20 +2215,31 @@
 read
-SWD(False, 3
+Cmd(OP_DP, REG_READBUFF
 )%0A%0A 
@@ -2546,24 +2546,25 @@
 swd.read
-SWD(True
+Cmd(OP_AP
 , adrReg
@@ -2894,16 +2894,17 @@
 rite
-SWD(True
+Cmd(OP_AP
 , ad

rewrite to use new API and symbolic constants.