import math
import polyphony
from polyphony import module, pure
from polyphony import testbench
from polyphony.io import Port
from polyphony.typing import bit, int8
from polyphony.timing import clksleep, clkfence, wait_rising, wait_falling

#import sin_wave

@polyphony.module
class dac_ds:
    def __init__(self):
        self.i_port  = Port(int8, 'in', protocol='none')
        self.i_detect  = Port(bit, 'in', protocol='none')
        self.o_data  = Port(bit, 'out', protocol='none')
        self.append_worker(self.dac_ds_worker, self.i_port, self.i_detect, self.o_data)

    def dac_ds_worker(self, i_port, i_detect, o_data):
        while polyphony.is_worker_running():
            enable = i_detect.rd()
            while ( enable == 0 ) :
                enable = i_detect.rd()
            v = i_port.rd()
            print("v:", v)
                
m = dac_ds()

#def do_one(v):
#    module.i_port.wr(v)
#    module.i_detect.wr(1)
#    module.i_detect.wr(0)

@testbench
def test(m):
    #do_one(123)
    m.i_port.wr(12)
    m.i_detect.wr(1)
    m.i_detect.wr(0)
    m.i_port.wr(123)
    m.i_detect.wr(1)
    m.i_detect.wr(0)

test(m)

@@ -238,24 +238,320 @@
 ng%0A%0A
-#import sin_wave
+MAX_VALUE = 127%0ASIN_CYCLE = 798%0A%0A@pure%0Adef sin_value(xv):%0A    return int(math.sin(1.0/MAX_VALUE * xv) * MAX_VALUE + 0.5)%0A    %0A@pure%0Adef make_sin_table():%0A    table = %5B0%5D * SIN_CYCLE%0A    for i in range(SIN_CYCLE):%0A        v = sin_value(i)%0A        table%5Bi%5D = sin_value(i)%0A    return table%0A%0Atable = make_sin_table()
 %0A%0A@p
@@ -601,16 +601,39 @@
 t__(self
+, use_sin_table = False
 ):%0A     
@@ -845,16 +845,31 @@
 _worker,
+ use_sin_table,
  self.i_
@@ -930,16 +930,31 @@
 er(self,
+ use_sin_table,
  i_port,
@@ -973,16 +973,30 @@
 _data):%0A
+        i = 0%0A
         
@@ -1028,24 +1028,227 @@
 _running():%0A
+            if use_sin_table : %0A                v = table%5Bi%5D%0A                if i == (SIN_CYCLE - 1) :%0A                    i = 0%0A                else:%0A                    i = i + 1%0A            else:%0A    
             
@@ -1262,32 +1262,36 @@
 = i_detect.rd()%0A
+    
             whil
@@ -1318,32 +1318,36 @@
                 
+    
 enable = i_detec
@@ -1361,24 +1361,28 @@
             
+    
 v = i_port.r
@@ -1444,271 +1444,159 @@
 _ds(
-)%0A%0A#def do_one(v):%0A#    module.i_port.wr(v)%0A#    module.i_detect.wr(1)%0A#    module.i_detect.wr(0)%0A%0A@testbench%0Adef test(m):%0A    #do_one(123)%0A    m.i_port.wr(12)%0A    m.i_detect.wr(1)%0A    m.i_detect.wr(0)%0A    m.i_port.wr(123)%0A    m.i_detect.wr(1)%0A    m.i_detect.wr(0
+use_sin_table = True)%0A%0A@testbench%0Adef test(m):%0A    print(%22test%22)%0A    for i in range(800):%0A        v = m.o_data.rd()%0A        print(v)%0A        clksleep(1
 )%0A%0At

use sin table in dac_ds