riscv_machine_timer: optimize MTIME/MTIMECMP registers access in riscv64
riscv_machine_timer: optimize MTIME/MTIMECMP registers access in riscv64

riscv64 CPUs can access full 64-bit memory-mapped register by a single
instruction, so we can directly access these registers.

Signed-off-by: Jim Shu <1635390bb889c4cdee38f53a57b0915ac07d9bd9@andestech.com>

nashif/zephyr,Vudentz/zephyr,galak/zephyr,Vudentz/zephyr,galak/zephyr,Vudentz/zephyr,nashif/zephyr,Vudentz/zephyr,zephyrproject-rtos/zephyr,Vudentz/zephyr,nashif/zephyr,finikorg/zephyr,nashif/zephyr,zephyrproject-rtos/zephyr,finikorg/zephyr,finikorg/zephyr,galak/zephyr,nashif/zephyr,zephyrproject-rtos/zephyr,zephyrproject-rtos/zephyr,Vudentz/zephyr,galak/zephyr,zephyrproject-rtos/zephyr,finikorg/zephyr,galak/zephyr,finikorg/zephyr