stm32: fix RTC configuration on STM32H7
stm32: fix RTC configuration on STM32H7

The DBP bit needs to be set in the PWR_CR1 register before doing the RTC
configuration (in order to be able to right RTC registers).

Signed-off-by: Vincent Palatin <70a9964ec8fd10b0b08fcc8623c2add25ddf99ac@chromium.org>

BRANCH=none
BUG=b:67081508
TEST=on ZerbleBarn, dump the RTC_TR register and it is incrementing
every second, e.g. 'rw 0x58004000'.

Change-Id: I02dc6c6f1852ced934bccf3e401f4fdc1aad57d9
Reviewed-on: https://chromium-review.googlesource.com/941224
Commit-Ready: Vincent Palatin <70a9964ec8fd10b0b08fcc8623c2add25ddf99ac@chromium.org>
Tested-by: Vincent Palatin <70a9964ec8fd10b0b08fcc8623c2add25ddf99ac@chromium.org>
Reviewed-by: Aseda Aboagye <12c9b286316a940fd31c24070da5ab64cdd4d0e7@chromium.org>

coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec