g: simulate open drain GPIO behavior
g: simulate open drain GPIO behavior

Some upcoming designs based on the g chip require GPIOs connected to
open drain circuits.

Even though the chip explicitly provides only two open drain GPIOs,
the desired behavior of the rest of the pins when configured as 'open
drain' could be simulated by software if when 'high' is required the
output is disabled instead of driving the pin value.

To make sure there is no fallout from RO driving the pins, also add an
explicit 'disable output' initialization in case a GPIO is configured
for open drain and the initial output value is 'high'.

BRANCH=cr50
BUG=none
TEST=verified that Cr50 booted successfully, also confirmed that on
     the test board that GPIOs defined as Open Drain allow we set
     output to 1 only if pulled up.

Change-Id: Id2daa19b992bab7fb01148b6fa7b57fd0728b33d
Signed-off-by: Vadim Bendebury <5515d6d2d0829cbe0dd0dcf2094aaded06d58514@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/848152
Reviewed-by: Randall Spangler <62698fdbb84d1779579ee80c3f39fac22017e5bc@chromium.org>

coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec