spi: sirf: correct TXFIFO empty interrupt status bit
spi: sirf: correct TXFIFO empty interrupt status bit

the old code uses wrong marco - SIRFSOC_SPI_FIFO_FULL is not for
FIFO interrupt status, it is for FIFO status. here in the ISR,
SIRFSOC_SPI_TXFIFO_EMPTY is the right bit for SPI TXFIFO interrupt
status.

Signed-off-by: Qipan Li <7edc63b2168f7aeebdbedbd3916b18244ee96ac4@csr.com>
Signed-off-by: Barry Song <a856445693a373abed3e477bd705f7011cbd8a1d@csr.com>
Signed-off-by: Mark Brown <b51b9a92386687a9ac927cebfa0f978adeb8cea5@linaro.org>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs