nct38xx: Avoid LPM exit when not alerting
nct38xx: Avoid LPM exit when not alerting

This avoids taking an nct38xx port out of low power mode when it is not
alerting. The nct38xx chips exit low power mode when they assert Alert.
This means we don't have to explicitly take the port out of LPM to check
its Alert status register. So, directly access the Alert register to
check if the associated port was the source of the Alert.

The nct3808 is a dual port chip with a single Alert pin. We need to be
careful when servicing Alerts because the usual tcpc_read(),
et. al. functions are wrappers that take the port out of LPM mode. When
this happens, the nct3808 generates a CC status change alert on a
disconnected port. Servicing this "phantom" Alert causes the other port
to similarly generate a "phantom" alert. These CC status Alerts can
effectively oscilalte between the two ports for a long time.

BRANCH=none
BUG=b:191531291
TEST=brya no longer gets into ALERT loops on C0/C2

Change-Id: Ib4be6b49a98f3053e5639477e8651b6ba487a0f9
Signed-off-by: Caveh Jalali <08e24a66aefda7a55ca7d73f8903e0fb16eec763@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977473
Reviewed-by: Denis Brockus <6b21e8190fb5e373363fb95271367073a16474ef@chromium.org>
Reviewed-by: Diana Z <cb2016afc7183e5356c690dc63b4ba817470501a@chromium.org>
Commit-Queue: Diana Z <cb2016afc7183e5356c690dc63b4ba817470501a@chromium.org>

coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec