* According to the reference code, AR_WA_D3_L1_DISBABLE is bit 14. * Add some other WAR bits (very usefully described too) in preparation for   porting over some suspend/resume fixes from ath9k/Atheros.
* According to the reference code, AR_WA_D3_L1_DISBABLE is bit 14.
* Add some other WAR bits (very usefully described too) in preparation for
  porting over some suspend/resume fixes from ath9k/Atheros.

Obtained from:	Qualcomm Atheros

jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase