Cr50: Revise FIFO SRAM settings
Cr50: Revise FIFO SRAM settings

This allocates more space for FIFO buffers, according to the
instructions in the Programmer's Guide. Many more comments and
some slight refactoring was added to explain the configuration
more clearly.

BUG=chrome-os-partner:34893
BRANCH=none
TEST=make buildall, manual

Connect the Cr50 to my workstation via USB:
* /bin/dmesg reports no errors
* verify EP0 with lsusb -v -d 18d1:5014
* verify EP1 with './extra/usb_console -e 1 -p 5014' (reverses
  case of input text)
* verify EP2 with the 'hid' command on the EC console (types a 'g')

Signed-off-by: Bill Richardson <129945214b1d548d8e49b6c29c43094f8c78057f@chromium.org>
Change-Id: I1a870a4b1dc628729f7cd1b80bab7ec6dfd11f37
Reviewed-on: https://chromium-review.googlesource.com/318262
Reviewed-by: Dominic Rizzo <a9e5fb9a80871b4edba0a94343af83678d394845@google.com>

coreboot/chrome-ec,akappy7/ChromeOS_EC_LED_Diagnostics,akappy7/ChromeOS_EC_LED_Diagnostics,coreboot/chrome-ec,akappy7/ChromeOS_EC_LED_Diagnostics,akappy7/ChromeOS_EC_LED_Diagnostics,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,akappy7/ChromeOS_EC_LED_Diagnostics