[AArch64] Corrected spill size for DDD register class. NFCI
[AArch64] Corrected spill size for DDD register class. NFCI

Summary:
The spill size was incorrectly set to 196 bits,
which isn't a multiple of 8. This problem was detected when
experimenting with asserts that the spill size should be a
multiple of the byte size.

New corrected value for the spill size is set to 192 bits.

Note that tablegen (RegisterInfoEmitter) will divide the
size set in the RegisterClass definition by 8. So this
change should not have any impact on the tablegen output
(trunc(192/8) == trunc(196/8) == 24 bytes).

Reviewers: t.p.northover

Subscribers: llvm-commits, aemerson, rengolin

Differential Revision: https://reviews.llvm.org/D25818

git-svn-id: 0ff597fd157e6f4fc38580e8d64ab130330d2411@284814 91177308-0d34-0410-b5e6-96231b3b80d8

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