cpu: Fix the traffic gen read percentage
cpu: Fix the traffic gen read percentage

This patch fixes the computation that determines whether to perform a
read or a write such that the two corner cases (0 and 100) are both
more efficient and handled correctly.

HwisooSo/gemV-update,KuroeKurose/gem5,KuroeKurose/gem5,SanchayanMaity/gem5,Weil0ng/gem5,gedare/gem5,gedare/gem5,gem5/gem5,rallylee/gem5,SanchayanMaity/gem5,joerocklin/gem5,sobercoder/gem5,powerjg/gem5-ci-test,rallylee/gem5,aclifton/cpeg853-gem5,rallylee/gem5,briancoutinho0905/2dsampling,Weil0ng/gem5,TUD-OS/gem5-dtu,rjschof/gem5,SanchayanMaity/gem5,HwisooSo/gemV-update,rallylee/gem5,markoshorro/gem5,aclifton/cpeg853-gem5,briancoutinho0905/2dsampling,powerjg/gem5-ci-test,samueldotj/TeeRISC-Simulator,briancoutinho0905/2dsampling,gem5/gem5,austinharris/gem5-riscv,TUD-OS/gem5-dtu,sobercoder/gem5,rjschof/gem5,powerjg/gem5-ci-test,HwisooSo/gemV-update,HwisooSo/gemV-update,gem5/gem5,SanchayanMaity/gem5,KuroeKurose/gem5,SanchayanMaity/gem5,TUD-OS/gem5-dtu,cancro7/gem5,KuroeKurose/gem5,joerocklin/gem5,TUD-OS/gem5-dtu,HwisooSo/gemV-update,cancro7/gem5,kaiyuanl/gem5,sobercoder/gem5,rallylee/gem5,yb-kim/gemV,TUD-OS/gem5-dtu,powerjg/gem5-ci-test,yb-kim/gemV,gedare/gem5,markoshorro/gem5,austinharris/gem5-riscv,kaiyuanl/gem5,Weil0ng/gem5,rallylee/gem5,HwisooSo/gemV-update,aclifton/cpeg853-gem5,qizenguf/MLC-STT,joerocklin/gem5,sobercoder/gem5,HwisooSo/gemV-update,samueldotj/TeeRISC-Simulator,aclifton/cpeg853-gem5,gem5/gem5,aclifton/cpeg853-gem5,cancro7/gem5,kaiyuanl/gem5,cancro7/gem5,rjschof/gem5,powerjg/gem5-ci-test,qizenguf/MLC-STT,KuroeKurose/gem5,aclifton/cpeg853-gem5,yb-kim/gemV,samueldotj/TeeRISC-Simulator,TUD-OS/gem5-dtu,joerocklin/gem5,yb-kim/gemV,gedare/gem5,zlfben/gem5,kaiyuanl/gem5,briancoutinho0905/2dsampling,joerocklin/gem5,Weil0ng/gem5,gedare/gem5,yb-kim/gemV,austinharris/gem5-riscv,austinharris/gem5-riscv,sobercoder/gem5,briancoutinho0905/2dsampling,cancro7/gem5,yb-kim/gemV,joerocklin/gem5,samueldotj/TeeRISC-Simulator,joerocklin/gem5,markoshorro/gem5,qizenguf/MLC-STT,qizenguf/MLC-STT,Weil0ng/gem5,austinharris/gem5-riscv,KuroeKurose/gem5,kaiyuanl/gem5,austinharris/gem5-riscv,markoshorro/gem5,qizenguf/MLC-STT,gedare/gem5,sobercoder/gem5,briancoutinho0905/2dsampling,briancoutinho0905/2dsampling,yb-kim/gemV,aclifton/cpeg853-gem5,powerjg/gem5-ci-test,zlfben/gem5,cancro7/gem5,zlfben/gem5,rjschof/gem5,samueldotj/TeeRISC-Simulator,markoshorro/gem5,gedare/gem5,SanchayanMaity/gem5,TUD-OS/gem5-dtu,yb-kim/gemV,austinharris/gem5-riscv,zlfben/gem5,markoshorro/gem5,qizenguf/MLC-STT,rallylee/gem5,gem5/gem5,rjschof/gem5,qizenguf/MLC-STT,gem5/gem5,rjschof/gem5,sobercoder/gem5,markoshorro/gem5,kaiyuanl/gem5,cancro7/gem5,Weil0ng/gem5,zlfben/gem5,samueldotj/TeeRISC-Simulator,SanchayanMaity/gem5,samueldotj/TeeRISC-Simulator,joerocklin/gem5,gem5/gem5,powerjg/gem5-ci-test,rjschof/gem5,zlfben/gem5,zlfben/gem5,kaiyuanl/gem5,Weil0ng/gem5,KuroeKurose/gem5