util/flash_ec: npcx7 supports programming SPI flash via UART
util/flash_ec: npcx7 supports programming SPI flash via UART

This CL adds scripts to support updating ec image to the SPI flash by
UUT(UART Update Tool) for npcx ec. A new array BOARDS_NPCX_UUT is
introduced to include the board name which will use the UUT mechanism.

The detail of test setup/procedure is listed below:
1. Connect the following singals between npcx7 evb and Servo board v2.
   NPCX7 EVB            Servo V2
   ---------------------------------------
   GPIO64/CR_SIN  <-->  UART1_SERVO_DUT_TX
   GPIO65/CR_SOUT <-->  UART1_DUT_SERVO_TX
   VDD_3.3V       <-->  PPDUT_UART1_VREF
2. Manually pull the UUT mode strap pin(GPIO65/CR_SOUT) to ground with a
10 KOhm resistor.
3. Assert a EC VCC1_RST reset or issue a Power-Up reset.
4. Remove the pull-down in step 2.
5. Move npcx7_evb from array BOARDS_NPCX_7M6X_JTAG to BOARDS_NPCX_UUT in
flash_ec.
6. ./util/flash_ec --board=npcx7_evb.

BRANCH=none
BUG=none
TEST=Follow the steps above. Dump the SPI flash content to a file via
JTAG. Compare the file and ec image. Make sure their content is all
the same. Check the ec can reboot after programming.
Run "sysjump rw"; make sure RW image works well.

Change-Id: Iada5acb53179bdb78459c4fea7488fd2691575b6
Signed-off-by: CHLin <84d2fca36f9d804bb7b1903655f14e4c722a99c4@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/826763
Commit-Ready: CH Lin <49997681dc186e71092740314bf6c6feeca6e227@nuvoton.com>
Tested-by: CH Lin <49997681dc186e71092740314bf6c6feeca6e227@nuvoton.com>
Reviewed-by: Shawn N <5259333ce42e3ace6a73988cec7115ed9d3a661a@chromium.org>

coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec