[ARM] OMAP3 clock: optimize DPLL rate rounding algorithm
[ARM] OMAP3 clock: optimize DPLL rate rounding algorithm

The previous DPLL rate rounding algorithm counted the divider (N) down
from the maximum to 1.  Since we currently use a broad DPLL rate
tolerance, and lower N values are more power-efficient, we can often
bypass several iterations through the loop by counting N upwards from
1.

Peter de Schrijver <aa3d98b104b3cf5b2e612876674918b028abace2@nokia.com> put up with several
test cycles of this patch - thanks Peter.

linux-omap source commit is 6f6d82bb2f80fa20a841ac3e95a6f44a5a156188.

Signed-off-by: Paul Walmsley <a027184a55211cd23e3f3094f1fdc728df5e0500@pwsan.com>
Cc: Peter de Schrijver <aa3d98b104b3cf5b2e612876674918b028abace2@nokia.com>
Signed-off-by: Tony Lindgren <1001e8702733cced254345e193c88aaa47a4f5de@atomide.com>
Signed-off-by: Russell King <f6aa0246ff943bfa8602cdf60d40c481b38ed232@arm.linux.org.uk>

TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs