Force sensitive CPUID bits to true
Force sensitive CPUID bits to true

Some CPUID bits describe features that are available on all CPUs that
support SGX, so they should always be reported as set when using the SGX
backend.

Some could cause potential security issues if set to false. Namely:
 - AESNI, SSE*, PCLMULQDQ: if set to false, crypto algorithms may fall
   back to non-constant-time implementations that can leak side-channel
   information.
 - RDRAND, RDSEED: if set to false, code needing entropy may fall back
   to less secure sources of entropy. This is somewhat mitigated in
   Asylo because the typical fallback is using /dev/(u)random, which we
   implement with RDRAND (within the enclave) anyway.

PiperOrigin-RevId: 275563459
Change-Id: Ic63e39d3436fd304f584eef5746fb4bd9db28e30

google/asylo,google/asylo,google/asylo,google/asylo,google/asylo,google/asylo