plat-zynq7k: fix cpu power control register init
plat-zynq7k: fix cpu power control register init

Before this change, a reserved bit was set in the PCR instead of
enabling the clock gating support, as configured in other supported
Cortex-A9 platforms.

Reported-by: Yves Lefloch <10478231738abb32ba1aba5267dc92e970f85552@sigmadesigns.com>
Signed-off-by: Etienne Carriere <f21bc5b8f3ea1962eb45af359f1abea6578cab94@linaro.org>
Reviewed-by: Jens Wiklander <7706914404370d7502c27a0eff493dcf491feb51@linaro.org>

pascal-brand-st-dev/optee_os,pascal-brand-st-dev/optee_os,pascal-brand-st-dev/optee_os,pascal-brand-st-dev/optee_os,pascal-brand-st-dev/optee_os