MIPS: bugfix: missed cache flush of TLB refill handler
MIPS: bugfix: missed cache flush of TLB refill handler

Commit

    Commit 1d40cfcd3442a53e98468cdb3e6d4d9a568d76cf
    Author: Ralf Baechle <92f48d309cda194c8eda36aa8f9ae28c488fa208@linux-mips.org>
    Date:   Fri Jul 15 15:23:23 2005 +0000

    Avoid SMP cacheflushes.  This is a minor optimization of startup but
    will also avoid smp_call_function from doing stupid things when called
    from a CPU that is not yet marked online.

missed an appropriate cache flush of TLB refill handler because that time it was
at fixed location CAC_BASE. After years the refill handler in EBASE vector
is not at that location and can be allocated in some another memory and needs
I-cache sync as other TLB exception vectors.

Besides that, the new function - local_flash_icache_range() was introduced
to avoid SMP cacheflushes.

Signed-off-by: Leonid Yegoshin <d6aca6b5694d055adc6cbbaf8ff810fc31ed7c5d@imgtec.com>
Cc: 562397917b9a8bf316569a848858b12fb417723f@linux-mips.org
Cc: ae947f3c8df96e1dc851c5e3e5a930ce6d3f1f74@windriver.com
Cc: 1bc8cf2274d8680f3a9b88ac7b7d2a9e0d1d4ca2@broadcom.com
Cc: 2578944098299abf708b08eff6fcf60565553586@vger.kernel.org
Cc: eec15f2dea0e7d114bf41a5bde8a2858b8f3e893@cavium.com
Patchwork: https://patchwork.linux-mips.org/patch/7312/
Signed-off-by: Ralf Baechle <92f48d309cda194c8eda36aa8f9ae28c488fa208@linux-mips.org>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs