[RISCV] Fix range check for HI20/LO12/RVC_LUI relocations
[RISCV] Fix range check for HI20/LO12/RVC_LUI relocations

The code previously specified a 32-bit range for R_RISCV_HI20 and
R_RISCV_LO12_[IS], however this is incorrect as the maximum offset on
RV64 that can be formed from the immediate of lui and the displacement
of an I-type or S-type instruction is -0x80000800 to 0x7ffff7ff. There
is also the same issue with a c.lui and LO12 pair, whose actual
addressable range should be -0x20800 to 0x1f7ff.

The tests will be included in the next patch that converts all RISC-V
tests to use llvm-mc instead of yaml2obj, as assembler support has
matured enough to write tests in them.

Differential Revision: https://reviews.llvm.org/D60414

git-svn-id: f6089bf0e6284f307027cef4f64114ee9ebb0424@357995 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-mirror/lld,llvm-mirror/lld