npcx: Enable VW's valid bits of SCI#/SMI# if no CONFIG_SCI_GPIO.
npcx: Enable VW's valid bits of SCI#/SMI# if no CONFIG_SCI_GPIO.

Enable valid bits of SCI#/SMI# of eSPI's VW if there's no CONFIG_SCI_GPIO
definition in board-level driver. This CL also fixed the order of VW
event bits in comments.

Modified sources:
1. espi.c: Enable valid bits of SCI#/SMI#.

BRANCH=none
BUG=chrome-os-partner:34346
TEST=make all; test nuvoton IC specific drivers

Change-Id: I8d094513284b4ed42c5c26fe1975d71bbf050aa4
Signed-off-by: Mulin Chao <6bbc5af053a1dfdc363be6857f30de4ac3bcbd16@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/396618
Reviewed-by: Duncan Laurie <70662b43bc1a20b57ded72a2b08be88dd0da4841@google.com>

coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec