[otbn] Feed blanked shifter output into Adder Y when not using Adder Y
[otbn] Feed blanked shifter output into Adder Y when not using Adder Y

Previously, the MOD WSR was fed into Adder Y during some ALU operations
not requiring Adder Y at all (RSHI, XOR, OR, AND, NOT). Since the
output of Adder Y is connected to the zero flag generation (ORing all
bits together), this could lead to undesired SCA leakage.

As we already correctly blank the shifter output connected to Adder Y,
it's better select this as input for Adder Y when not using Adder Y to
avoid undesired leakage due to the zero flag generation.

Signed-off-by: Pirmin Vogel <386a7fc8e7338ed7899b4d9883c0ebec5de81366@lowrisc.org>

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