ARM: l2c: tegra: remove cache size override
ARM: l2c: tegra: remove cache size override

The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Acked-by: Stephen Warren <5ef2a23ba3aff51d1cfc8c113c1ec34b608b3b13@nvidia.com>
Tested-by: Stephen Warren <5ef2a23ba3aff51d1cfc8c113c1ec34b608b3b13@nvidia.com>
Acked-by: Peter De Schrijver <651dda1e35c6fe8f72c3112540c405a2364bcd71@nvidia.com>
Signed-off-by: Russell King <f6aa0246ff943bfa8602cdf60d40c481b38ed232@arm.linux.org.uk>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs