[X86] Enable -mprefer-vector-width=256 by default for Skylake-avx512 and later Intel CPUs.
[X86] Enable -mprefer-vector-width=256 by default for Skylake-avx512 and later Intel CPUs.

AVX512 instructions can cause a frequency drop on these CPUs. This
can negate the performance gains from using wider vectors. Enabling
prefer-vector-width=256 will prevent generation of zmm registers
unless explicit 512 bit operations are used in the original source
code.

I believe gcc and icc both do something similar to this by default.

Differential Revision: https://reviews.llvm.org/D67259

git-svn-id: ffe668792ed300d6c2daa1f6eba2e0aa28d7ec6c@371694 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-mirror/clang,llvm-mirror/clang,llvm-mirror/clang,llvm-mirror/clang,llvm-mirror/clang,llvm-mirror/clang,llvm-mirror/clang,llvm-mirror/clang,llvm-mirror/clang,llvm-mirror/clang