drm/i915: Assume 400MHz cdclk for the rest of gen4-7
drm/i915: Assume 400MHz cdclk for the rest of gen4-7

We don't currently have cdclk extraction code for 965g,snb,ivb.
Let's assume 400 MHz until we know better. That seems to match hints
in various vague documents. Whether that's good enough is not
entirely clear.

Signed-off-by: Ville Syrjälä <cd6e8d405ca90be3a03d5427c5b24fbd2d68dcc4@linux.intel.com>
Signed-off-by: Mika Kahola <37fffaeeafa52a2e0cb802ff3a2d512d52ac25a1@intel.com>
Acked-by: Damien Lespiau <64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com>
Signed-off-by: Daniel Vetter <c1b6782c4af8f0673da8923a0702a1832e5940f4@ffwll.ch>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs