Fix the SPR field for MTLR, MFLR, MTCTR, and MFCTR instructions. The decimal value given in the manual (8 or 9) really needs to be multiplied by a factor of 32 because of the group of 5 zero bits after the register code.
Fix the SPR field for MTLR, MFLR, MTCTR, and MFCTR instructions.
The decimal value given in the manual (8 or 9) really needs to be multiplied by
a factor of 32 because of the group of 5 zero bits after the register code.


git-svn-id: 0ff597fd157e6f4fc38580e8d64ab130330d2411@17182 91177308-0d34-0410-b5e6-96231b3b80d8

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