Feat: Booting on the Beaglebone!
Feat: Booting on the Beaglebone!

Added some Beaglebone Black specific code to _loader.s this should
eventually be moved somewhere in the platform/beagleboneblack/
directory.

The changes:
Disable the watchdog timer so that the system does not reset. This code
is implemented in _disable_wdt procedure.

ATAGs are not available on the Beaglebone Black. uBoot sets up a device
tree somewhere. For now the system specific values we need are
hardcoded.

0x9f700000 needs to be identity mapped since I believe
uBoots exception vectors are located somewhere in this page. For some
reason Enabling the MMU causes a jump to this page. I'm not sure why yet
but it possibly has something to do with a instruction or data abort
(not sure which one yet, probably instruction since the instructions in
the pipeline are probably invalid?) which jumps to this page thus causing
another abort since this page is not mapped! Infinite aborts! Not good, so I
temporarily identity mapped that page. The next step is to figure out
why exactly does the CPU jump here when enabling the MMU?

TI's AM3358 ARM Cortex-A8 CPU throws an exception when executing a LDREX
or STREX or any *EX instruction for that matter if accessing a memory
region with shareability enabled. It's a single core processor so it
doesn't include a global monitor to manage exclusive accesses to memory
marked as inner/outer shareable which means it can't execute the *EX
instructions without aborting or something like that. The solution? Just
mark all normal memory regions as non-shareable in the PRRR. In this
scenario, the LDREX/STREX instructions behave just like the regular
LDR/STR instructions.

0ctobyte/arm-kernel,0ctobyte/arm-kernel