radeonsi: implement coherent memory access (v2)
radeonsi: implement coherent memory access (v2)

v2: set glc=1 for volatile also on buffers

Reviewed-by: Marek Olšák <8c7344a1abdb103e79ecfd488098373070c3c70e@amd.com>

metora/MesaGLSLCompiler,metora/MesaGLSLCompiler,metora/MesaGLSLCompiler