First add.  Pins are in same "top to bottom" order as in the snickerdoodle r2 schematic at https://github.com/krtkl/open-source-schematics/blob/master/snickerdoodle/snickerdoodle-schematic-r2.pdf
First add.  Pins are in same "top to bottom" order as in the snickerdoodle r2 schematic
at https://github.com/krtkl/open-source-schematics/blob/master/snickerdoodle/snickerdoodle-schematic-r2.pdf

Only the FPGA IO connectors JA1/2, JB1/2, and JC1 (snickerdoodle black / 7020 only) are here.

This table is completely untested, I don't have hardware yet, only putting up for review

rbarris/genx