ruby: Changed the default set size to 1
ruby: Changed the default set size to 1

Previously, the set size was set to 4.  This was mostly do to the fact that a
crazy graduate student use to create networks with 256 l2 cache banks.  Now it
is far more likely that users will create systems with less than 64 of any
particular controller type.  Therefore Ruby should be optimized for a set size
of 1.

aclifton/cpeg853-gem5,KuroeKurose/gem5,markoshorro/gem5,joerocklin/gem5,rjschof/gem5,sobercoder/gem5,SanchayanMaity/gem5,joerocklin/gem5,cancro7/gem5,powerjg/gem5-ci-test,TUD-OS/gem5-dtu,KuroeKurose/gem5,austinharris/gem5-riscv,rallylee/gem5,gem5/gem5,HwisooSo/gemV-update,austinharris/gem5-riscv,yb-kim/gemV,briancoutinho0905/2dsampling,yb-kim/gemV,rjschof/gem5,kaiyuanl/gem5,austinharris/gem5-riscv,aclifton/cpeg853-gem5,joerocklin/gem5,zlfben/gem5,Weil0ng/gem5,samueldotj/TeeRISC-Simulator,rallylee/gem5,markoshorro/gem5,zlfben/gem5,Weil0ng/gem5,gem5/gem5,Weil0ng/gem5,gem5/gem5,SanchayanMaity/gem5,markoshorro/gem5,SanchayanMaity/gem5,HwisooSo/gemV-update,powerjg/gem5-ci-test,gedare/gem5,powerjg/gem5-ci-test,joerocklin/gem5,yb-kim/gemV,samueldotj/TeeRISC-Simulator,zlfben/gem5,zlfben/gem5,sobercoder/gem5,qizenguf/MLC-STT,qizenguf/MLC-STT,TUD-OS/gem5-dtu,joerocklin/gem5,kaiyuanl/gem5,rjschof/gem5,samueldotj/TeeRISC-Simulator,powerjg/gem5-ci-test,TUD-OS/gem5-dtu,gem5/gem5,TUD-OS/gem5-dtu,qizenguf/MLC-STT,markoshorro/gem5,powerjg/gem5-ci-test,markoshorro/gem5,austinharris/gem5-riscv,HwisooSo/gemV-update,rjschof/gem5,KuroeKurose/gem5,rallylee/gem5,HwisooSo/gemV-update,SanchayanMaity/gem5,sobercoder/gem5,zlfben/gem5,TUD-OS/gem5-dtu,gem5/gem5,yb-kim/gemV,HwisooSo/gemV-update,rjschof/gem5,austinharris/gem5-riscv,kaiyuanl/gem5,qizenguf/MLC-STT,rallylee/gem5,TUD-OS/gem5-dtu,gedare/gem5,qizenguf/MLC-STT,samueldotj/TeeRISC-Simulator,samueldotj/TeeRISC-Simulator,briancoutinho0905/2dsampling,SanchayanMaity/gem5,briancoutinho0905/2dsampling,Weil0ng/gem5,joerocklin/gem5,cancro7/gem5,powerjg/gem5-ci-test,sobercoder/gem5,rallylee/gem5,kaiyuanl/gem5,gem5/gem5,briancoutinho0905/2dsampling,KuroeKurose/gem5,powerjg/gem5-ci-test,cancro7/gem5,aclifton/cpeg853-gem5,kaiyuanl/gem5,KuroeKurose/gem5,yb-kim/gemV,austinharris/gem5-riscv,SanchayanMaity/gem5,Weil0ng/gem5,TUD-OS/gem5-dtu,cancro7/gem5,Weil0ng/gem5,austinharris/gem5-riscv,gedare/gem5,samueldotj/TeeRISC-Simulator,rallylee/gem5,briancoutinho0905/2dsampling,gem5/gem5,cancro7/gem5,zlfben/gem5,briancoutinho0905/2dsampling,aclifton/cpeg853-gem5,joerocklin/gem5,gedare/gem5,joerocklin/gem5,KuroeKurose/gem5,rjschof/gem5,aclifton/cpeg853-gem5,markoshorro/gem5,yb-kim/gemV,aclifton/cpeg853-gem5,HwisooSo/gemV-update,gedare/gem5,yb-kim/gemV,samueldotj/TeeRISC-Simulator,sobercoder/gem5,qizenguf/MLC-STT,kaiyuanl/gem5,markoshorro/gem5,gedare/gem5,cancro7/gem5,cancro7/gem5,zlfben/gem5,yb-kim/gemV,qizenguf/MLC-STT,HwisooSo/gemV-update,briancoutinho0905/2dsampling,SanchayanMaity/gem5,sobercoder/gem5,Weil0ng/gem5,rjschof/gem5,gedare/gem5,KuroeKurose/gem5,rallylee/gem5,sobercoder/gem5,kaiyuanl/gem5,aclifton/cpeg853-gem5