aarch64.risu: add LD/ST reg (unscaled imm) insns
aarch64.risu: add LD/ST reg (unscaled imm) insns

add the load/store register (unscaled immediate) instructions.
Also change the 32-bit and 64-bit register mnemonics from
32/64 to W/-, which improves readability for me.

Signed-off-by: Claudio Fontana <5fe97b97070bc75ff3c7a6b130e2dcc62cbb9b58@linaro.org>

vivier/risu,stsquad/risu,vivier/risu,stsquad/risu,stsquad/risu