soc/intel_adsp: Don't depend on XCHAL_EXCM_LEVEL
soc/intel_adsp: Don't depend on XCHAL_EXCM_LEVEL

The MP startup code had a hardcoded INTLEVEL field of 5 in the initial
value of PS.  That's needless, INTLEVEL is a full 4 bit field even if
the number of hardware interrupt levels is lower (and in fact 0xf is
the documented hardware reset state).  Set that instead, so that this
code will work with any XEA2 hardware.  This also matches the similar
code path in boot startup.

Signed-off-by: Andy Ross <c70f9a6bf6ee0cd69c8af4ce5e6b131945769315@intel.com>

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