drm/msm: hdmi phy 8960 phy pll
drm/msm: hdmi phy 8960 phy pll

On downstream kernel the clk driver directly bangs hdmi phy registers.
For upstream kernel, we need to model this as a clock and register with
the clock framework.

Signed-off-by: Rob Clark <915c10c999604870200b6defbe633d857c856ca0@gmail.com>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs