i965/fs: Lower DDY instructions to SIMD8 during SIMD lowering time
i965/fs: Lower DDY instructions to SIMD8 during SIMD lowering time

...on hardware lacking compressed Align16 support.  Will allow
simplifying the generator code and fixing it for SIMD32 codegen.

Reviewed-by: Jason Ekstrand <68c46a606457643eab92053c1c05574abb26f861@jlekstrand.net>

metora/MesaGLSLCompiler,metora/MesaGLSLCompiler,metora/MesaGLSLCompiler