AVR8: Fix lpm/elpm implementation in SLEIGH specification
AVR8: Fix lpm/elpm implementation in SLEIGH specification

When Z & 0x1 == 1, the dereferenced data must be right-shifted 8 bits
before assigning val:1 to the target register.

When Z & 0x0 == 0, val:1 is assigned to the target register straight
away.

In short, we can reduce these conditions to:

	tmp:2 = *[code]:2 (ptr >> 1);
	val:2 = (tmp >> (8 * (Z & 0x1)));
	R0 = val:1;

NOTE: Author's original commit was modified to address conflicts and a necessary rebase. -ryanmkurtz
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