[top] Sync verilated earlgrey board model with others
[top] Sync verilated earlgrey board model with others

Make the pin-out for the verilated earlgrey model match the GPIOs
available on the FPGA board.

Signed-off-by: Alexander Williams <d0fb8a15e7b6f5e62278a4cf44515038c232186c@google.com>

lowRISC/opentitan,lowRISC/opentitan,lowRISC/opentitan,lowRISC/opentitan,lowRISC/opentitan,lowRISC/opentitan