UefiCpuPkg/CpuCommonFeaturesLib: Aesni.c uses BIT0 and BIT1 reversedly
UefiCpuPkg/CpuCommonFeaturesLib: Aesni.c uses BIT0 and BIT1 reversedly

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1621

According to Intel SDM as below, the BIT0 should be treated as
lock bit, and BIT1 should be treated as disable(1)/enable(0) bit.

"11b: AES instructions are not available until next
RESET.
Otherwise, AES instructions are available.
If the configuration is not 01b, AES
instructions can be mis-configured if a privileged agent
unintentionally writes 11b"

Cc: Laszlo Ersek <7437296077edea1cb64451c122c4dac071f0cfbc@redhat.com>
Cc: Eric Dong <fa9eeec52367040ac98013bc4b2913db170588f8@intel.com>
Cc: Ruiyu Ni <9fa3a6894a36bca79e6a72ad65af5a5702efecd1@intel.com>
Cc: Chandana Kumar <d8ad1a3257db12f09ef9b73630ba6aafdd8a9659@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <5c6bb72efe464613af94e84c05522a361b23844a@intel.com>
Reviewed-by: Eric Dong <fa9eeec52367040ac98013bc4b2913db170588f8@intel.com>

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