[Blackfin] arch: fix bug when DMA operation related core B of BF561
[Blackfin] arch: fix bug when DMA operation related core B of BF561

- Before DMA'ing data to core B L1 memory, caches have to be flushed.
- Before DMA'ing data from core B L1 memory, caches have to be invalidated.
- Fix lock/unlock.

Signed-off-by: Enrik Berkhan <fdf84144e28111a7ce81619a91804f93a5293efa@ge.com>
Signed-off-by: Mike Frysinger <7ee330f275fa607260a41dd426b54c02c938a76a@analog.com>
Signed-off-by: Bryan Wu <465f0e91e61585f5bc1128e7fe63296c33a56926@analog.com>


TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs