mfd: wm5110: Set DCVDD voltage to 1.175V before entering sleep mode
mfd: wm5110: Set DCVDD voltage to 1.175V before entering sleep mode

The low power sleep mode on wm5110 requires that the LDO1 regulator be
set to 1.175V prior to entering sleep, then returned to 1.2V after
exiting sleep mode. This patch apply these regulator settings.

Signed-off-by: Charles Keepax <8e4aa0015eb43ed5ca66aaca3fb498609e1e427c@opensource.wolfsonmicro.com>
Acked-by: Mark Brown <b51b9a92386687a9ac927cebfa0f978adeb8cea5@kernel.org>
Signed-off-by: Lee Jones <630e34333487a351a857f6b705e04d30b37c1629@linaro.org>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs