powerpc/85xx: mpc85xxcds - Fix PCI I/O space resource of PCI bridge
powerpc/85xx: mpc85xxcds - Fix PCI I/O space resource of PCI bridge

There is a PCI bridge(Tsi310) between the MPC8548 and a VIA
southbridge chip.

The bootloader sets the PCI bridge to open a window from 0x0000
to 0x1fff on the PCI I/O space. But the kernel can't set the I/O
resource. In the routine pci_read_bridge_io(), if the base which
is read from PCI_IO_BASE is equal to zero, the routine don't set
the I/O resource of the child bus.

To allow the legacy I/O space on the VIA southbridge to be accessed,
use the fixup to fix the PCI I/O space of the PCI bridge.

Signed-off-by: Zhao Chenhui <07d9f5a554d4415975845fb521b9fecbb531a839@freescale.com>
Signed-off-by: Li Yang <ecc108c9e46a7124cf4a03d161d413e34ffc15a7@freescale.com>
Signed-off-by: Kumar Gala <383ef5577c6e1178b93f59ec8d0936f76d2a98c4@kernel.crashing.org>

TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas