i965: Really don't emit Q or UQ moves on Gen < 8
i965: Really don't emit Q or UQ moves on Gen < 8

It's much easier to do this in the generator rather than while coming
out of NIR.  brw_type_for_nir_type doesn't know the Gen, so we'd have to
add a bunch of plumbing.  The alternate fix is to not emit int64 moves
for doubles in the first place... but that seems even more difficult.

This change won't catch non-MOV instructions that try to use 64-bit
integer types on Gen < 8.  This may convert certain kinds of bugs in to
different kinds of bugs that are more difficult to detect (since the
assertions in the function won't catch them).

NOTE: I don't think anything can emit mixed-type 64-bit moves until the
same platform supports both ARB_gpu_shader_fp64 and
ARB_gpu_shader_int64.  When we enable int64 on Gen < 8, we can solve
this problem other ways.

This prevents regressions on HSW in the next patch.

Signed-off-by: Ian Romanick <2b237cafb16dc45038e85df6c85e74e6d899eba9@intel.com>
Reviewed-by: Matt Turner <789b315743a28dd066a4ba1459c35951c291d8a6@gmail.com>

metora/MesaGLSLCompiler,metora/MesaGLSLCompiler,metora/MesaGLSLCompiler