drm/i915: Gen9 shadowed registers
drm/i915: Gen9 shadowed registers

For MMIO registers which are shadowed, force wake is not needed to
write to these registers.

v2: Rebase on top of nightly (Damien)

v3: Rebase on top of "Gen9 multiple-engine forcewake" changes

v4: (Mika, Bob, done by Damien)
- Reorder the shadowed registers by popularity

Reviewed-by: Mika Kuoppala <cd221c71e765d1ce593d15b204fee351fb09fd98@intel.com>
Signed-off-by: Zhe Wang <ea4a67bba8d8429f3b9c0ec66ab60a1d60b4de8c@intel.com>
Signed-off-by: Damien Lespiau <64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com>
Signed-off-by: Daniel Vetter <c1b6782c4af8f0673da8923a0702a1832e5940f4@ffwll.ch>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs