ARM: KVM: add missing dsb before invalidating Stage-2 TLBs
ARM: KVM: add missing dsb before invalidating Stage-2 TLBs

commit 479c5ae2f8a55509b691494cd13691d3dc31d102 upstream.

When performing a Stage-2 TLB invalidation, it is necessary to
make sure the write to the page tables is observable by all CPUs.

For this purpose, add a dsb instruction to __kvm_tlb_flush_vmid_ipa
before doing the TLB invalidation itself.

Signed-off-by: Marc Zyngier <a16cc0c82647c52d401177f8e50567df5499e36c@arm.com>
Signed-off-by: Christoffer Dall <39e5ecfe2ecc327c3e39af72d8d83d1bd0709aad@linaro.org>
Signed-off-by: Jonghwan Choi <a1b1c34da4eddaa3495f0b6a971517234e873a08@samsung.com>
Signed-off-by: Greg Kroah-Hartman <4645f7897fd33786a2ee1264d590b3c400559d85@linuxfoundation.org>


TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas