freedreno/ir3/sched: fixup new instr's block
freedreno/ir3/sched: fixup new instr's block

If we split addr/pred, the original instruction could have originated
from a different block.  If we don't fixup the block ptr we hit asserts
later (in debug builds).

NOTE: perhaps we don't want to try to preserve addr/pred reg's across
block boundaries.. this at least needs some thought in case addr/pred
writes end up inside a conditional block..

Signed-off-by: Rob Clark <6f78cdb10adbe0a7fbbf4098125a51f401c77a5f@freedesktop.org>

metora/MesaGLSLCompiler,metora/MesaGLSLCompiler,metora/MesaGLSLCompiler