ArmPkg/ArmGicLib: manage GICv3 SPI state at the distributor
ArmPkg/ArmGicLib: manage GICv3 SPI state at the distributor

Unlike SGIs and PPIs, which are private to the CPU and are managed at
the redistributor level (which is also a per-CPU construct), shared
interrupts (SPIs) are shared between all CPUs, and therefore managed at
the distributor level (just as on GICv2).

Reported-by: Narinder Dhillon <4dd8e2ecbf02d124d81441e02f1cdd515f7f9a61@gmail.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <66d3c5fdaeea7ff1f996ad04f2c45e08ab38e2f5@linaro.org>
Reviewed-by: Leif Lindholm <a613079f0455438b29e28a9c5b9eb3779a81a33a@linaro.org>

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