stm32: more robust SPI slave on STM32H7
stm32: more robust SPI slave on STM32H7

Try to ensure the SPI host protocol byte codes (aka EC_SPI_xxx) are
transmitted and at the right time despite the errata and other brokenness
of the SPI HW controller in the STM32H7 rev Y silicon.

Signed-off-by: Vincent Palatin <70a9964ec8fd10b0b08fcc8623c2add25ddf99ac@chromium.org>

BRANCH=poppy
BUG=b:73947203
TEST=on Meowth, run:
'while true; do ectool --name=cros_fp version || break ; done'
same thing with 'fpinfo', 'fptemplate', 'fpframe'.

Change-Id: Ia455dc0d4b2803a150122655460ef5c11afcda6c
Reviewed-on: https://chromium-review.googlesource.com/1012202
Commit-Ready: Vincent Palatin <70a9964ec8fd10b0b08fcc8623c2add25ddf99ac@chromium.org>
Tested-by: Vincent Palatin <70a9964ec8fd10b0b08fcc8623c2add25ddf99ac@chromium.org>
Reviewed-by: Nicolas Boichat <f3daba1cdc403799935674d3cd4b0e5bd1804232@chromium.org>
Reviewed-by: Vincent Palatin <70a9964ec8fd10b0b08fcc8623c2add25ddf99ac@chromium.org>

coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec