Fixed two bugs.  One failed to write-back when the pre/post flag for (either) LDR or STR (or the byte variants) was set for post.  The manual states that writeback is unnecessary in post mode because otherwise post doesn't make sense.  :-)
Fixed two bugs.  One failed to write-back when the pre/post flag for
(either) LDR or STR (or the byte variants) was set for post.  The manual
states that writeback is unnecessary in post mode because otherwise post
doesn't make sense.  :-)

The other bug failed to STORE to memory.  The code was writing the register
number not the contents of the register.



git-svn-id: 2a42d4147853adcf1a20d13614e77797555e50d1@18 d0763410-cf01-4c7c-9b55-0f7f3399ec47

rthelen/arm-sim,rthelen/arm-sim,rthelen/arm-sim