clk: at91: fix div by zero in USB clock driver
clk: at91: fix div by zero in USB clock driver

Test rate value before calculating the div value to avoid div by zero.

Signed-off-by: Boris BREZILLON <4e91513d4f418754031d3d36b3fc73980c40a38c@free-electrons.com>
Reported-by: Gaël PORTAY <1666f60cfa201a60b0ea694168a0b6932673170a@gmail.com>
Tested-by: Gaël PORTAY <1666f60cfa201a60b0ea694168a0b6932673170a@gmail.com>
Signed-off-by: Mike Turquette <6dab61939fc5e23761050a66932f032dceda5ebf@linaro.org>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs