i2c: mv64xxx: The n clockdiv factor is 0 based on sunxi SoCs
i2c: mv64xxx: The n clockdiv factor is 0 based on sunxi SoCs

According to the datasheets the n factor for dividing the tclk is
2 to the power n on Allwinner SoCs, not 2 to the power n + 1 as it is
on other mv64xxx implementations.

I've contacted Allwinner about this and they have confirmed that the
datasheet is correct.

This commit fixes the clk-divider calculations for Allwinner SoCs
accordingly.

Signed-off-by: Hans de Goede <9fa1be1a5b5729e4c6b404f34c9ce49ff4882fd8@redhat.com>
Acked-by: Maxime Ripard <2d324f4ca95610bde432fa2af2f28cd21110687d@free-electrons.com>
Tested-by: Olliver Schinagl <c539153ba1f947bd4b6f910263b967c4a0a62357@schinagl.nl>
Signed-off-by: Wolfram Sang <fd4ce474653598159cad06f3c83387a05cd53a44@the-dreams.de>
Cc: 4fbacc2fa0ffdbb11bf1ad6925b886ebd08dd15f@kernel.org

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs