[PATCH] mbxfb: Fix a chip bug? resulting in wrong pixclock
[PATCH] mbxfb: Fix a chip bug? resulting in wrong pixclock

This is a workaround for what I think is a bug in the 2700G chip.

The PLL output frequency is adustable using 3 values (M, N and P.  See code
for formula).  The N value range is documented to be 1 to 7 but when it is set
to 1, the output frequency is lower than it should be (divided by 2), giving
unexpected results such as no sync on a CRT display.

This patch prevents N=1 when searching for the best value for the requested
pixclock.

Signed-off-by: Raphael Assenat <cdc1a1a98b37c828f72b2df5550d658c6f092848@8d.com>
Signed-off-by: Antonino Daplas <be03a811842969f6b435f66cb85a30eb479a8702@pol.net>
Signed-off-by: Andrew Morton <5c1e68b099950c134891f0b6e179498a8ebe9cf9@osdl.org>
Signed-off-by: Linus Torvalds <69652caca27c8b940640ad396ab71f93cacec34f@osdl.org>

TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas