FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality...
FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality...

src/arch/isa_parser.py:
    add back deleted writeback in Control Operand

hoangt/tpzsimul.gem5,vovojh/gem5,hoangt/tpzsimul.gem5,vovojh/gem5,pombredanne/http-repo.gem5.org-gem5-,pombredanne/http-repo.gem5.org-gem5-,vovojh/gem5,pombredanne/http-repo.gem5.org-gem5-,pombredanne/http-repo.gem5.org-gem5-,hoangt/tpzsimul.gem5,pombredanne/http-repo.gem5.org-gem5-,pombredanne/http-repo.gem5.org-gem5-,hoangt/tpzsimul.gem5,pombredanne/http-repo.gem5.org-gem5-,vovojh/gem5,vovojh/gem5,hoangt/tpzsimul.gem5,hoangt/tpzsimul.gem5,vovojh/gem5,hoangt/tpzsimul.gem5,vovojh/gem5