xilinx: Rework labels for faster Verilator testing
xilinx: Rework labels for faster Verilator testing

Signed-off-by: David Shah <bfcdf3e6ca6cef45543bfbb57509c92aec9a39fb@ds0.me>

YosysHQ/yosys,YosysHQ/yosys,SymbiFlow/yosys,SymbiFlow/yosys,antmicro/yosys,antmicro/yosys,YosysHQ/yosys,cliffordwolf/yosys,antmicro/yosys,antmicro/yosys,antmicro/yosys,SymbiFlow/yosys,antmicro/yosys,antmicro/yosys,YosysHQ/yosys,YosysHQ/yosys,cliffordwolf/yosys,SymbiFlow/yosys,cliffordwolf/yosys,YosysHQ/yosys,cliffordwolf/yosys,antmicro/yosys,SymbiFlow/yosys,YosysHQ/yosys,cliffordwolf/yosys,cliffordwolf/yosys,cliffordwolf/yosys,cliffordwolf/yosys,cliffordwolf/yosys,YosysHQ/yosys,SymbiFlow/yosys,SymbiFlow/yosys,SymbiFlow/yosys