[dv] Reduce the length of POR and fix regression failures
[dv] Reduce the length of POR and fix regression failures

Reset took too long which caused wait timeout.

Addressed #15026 and fixed these 2 tests
- chip_sw_lc_ctrl_transition
- chip_sw_clkmgr_external_clk_src_for_lc

Signed-off-by: Weicai Yang <4fa8c7762ee4da95e3dee7dae2c3263ea16637f9@google.com>

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