[prim_packer] Silence verilator width warnings
[prim_packer] Silence verilator width warnings

There are two changes here. The first is to explicitly zero-extend
wdata_i from InW up to OutW when computing wdata_shifted in pack mode.
The second is to slice out just the bits we need from MaxW / MinW when
comparing depth_q against it (otherwise Verilator complains that we're
comparing a small bitvector against a 32-bit int).

Signed-off-by: Rupert Swarbrick <290093e2ad2515ed2f14d749293c8cf8e02ca274@lowrisc.org>

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