clk: berlin: add cpuclk
clk: berlin: add cpuclk

Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider
fixed to 1.

Signed-off-by: Antoine Tenart <7fc24f17b07747ca12864f96f551beca43e4577d@free-electrons.com>
Acked-by: Stephen Boyd <010521127f513270fe503d86ab8316ac5147f4b7@codeaurora.org>
Signed-off-by: Sebastian Hesselbarth <1d402fe89ace836b52164ed4c0f247cb6f80efc1@gmail.com>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs