intel_pstate: add sample time scaling
intel_pstate: add sample time scaling

The PID assumes that samples are of equal time, which for a deferable
timers this is not true when the system goes idle.  This causes the
PID to take a long time to converge to the min P state and depending
on the pattern of the idle load can make the P state appear stuck.

The hold-off value of three sample times before using the scaling is
to give a grace period for applications that have high performance
requirements and spend a lot of time idle,  The poster child for this
behavior is the ffmpeg benchmark in the Phoronix test suite.

Cc: 3.14+ <4fbacc2fa0ffdbb11bf1ad6925b886ebd08dd15f@vger.kernel.org> # 3.14+
Signed-off-by: Dirk Brandewie <90b1bc8a6ba9849b6d077cb338e79c4550ccbc5f@intel.com>
Signed-off-by: Rafael J. Wysocki <27ffc44a8ec6a212fba98cfc3246c6ce8ab131e0@intel.com>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs