net/i40e: relax barrier in Tx for NEON
net/i40e: relax barrier in Tx for NEON

To keep ordering of mixed accesses, 'DMB OSH' is sufficient.
'DSB' inside the I40E_PCI_REG_WRITE is overkill.[1]

This patch fixes by replacing with just sufficient barriers in the
normal PMD and vPMD.

It showed 7% performance uplift on ThunderX2 and 4% on Arm N1SDP.
The test case is the RFC2544 zero-loss test running testpmd.

[1] http://inbox.dpdk.org/dev/CALBAE1M-ezVWCjqCZDBw+MMDEC4O9
qf0Kpn89EMdGDajepKoZQ@mail.gmail.com

Fixes: ae0eb310f253 ("net/i40e: implement vector PMD for ARM")
Cc: stable@dpdk.org

Signed-off-by: Gavin Hu <207ee22c2cf71e20c5b5df8395050c07c07d8709@arm.com>
Acked-by: Jerin Jacob <352c4d4f9291b869992ddb67daa45ddc149fed30@marvell.com>

john-mcnamara-intel/dpdk,john-mcnamara-intel/dpdk,john-mcnamara-intel/dpdk,john-mcnamara-intel/dpdk