tests: interrupt: Change IRQ priorities in test
tests: interrupt: Change IRQ priorities in test

Keeping IRQ0 priority as 1 and IRQ1 priority as 0
so that system timer which of priority 0 in ARC
will be interrupted by IRQ1 of same priority.
In ARM, system timer is of priority 1, hence
making ISR0 priority as 2 and ISR1 priority as 1.
Thus system timer will always be interrupted by
ISR1 in both the architectures.

Fixes: #12147

Signed-off-by: Spoorthi K <c4ff46ff4cba9c2c6c6c9d55497ae534451b4309@intel.com>

GiulianoFranchetto/zephyr,explora26/zephyr,nashif/zephyr,finikorg/zephyr,nashif/zephyr,GiulianoFranchetto/zephyr,punitvara/zephyr,finikorg/zephyr,ldts/zephyr,Vudentz/zephyr,punitvara/zephyr,GiulianoFranchetto/zephyr,galak/zephyr,finikorg/zephyr,ldts/zephyr,galak/zephyr,galak/zephyr,zephyrproject-rtos/zephyr,ldts/zephyr,Vudentz/zephyr,ldts/zephyr,ldts/zephyr,zephyrproject-rtos/zephyr,explora26/zephyr,finikorg/zephyr,nashif/zephyr,nashif/zephyr,Vudentz/zephyr,punitvara/zephyr,punitvara/zephyr,Vudentz/zephyr,zephyrproject-rtos/zephyr,zephyrproject-rtos/zephyr,galak/zephyr,GiulianoFranchetto/zephyr,punitvara/zephyr,finikorg/zephyr,explora26/zephyr,galak/zephyr,Vudentz/zephyr,explora26/zephyr,Vudentz/zephyr,nashif/zephyr,GiulianoFranchetto/zephyr,explora26/zephyr,zephyrproject-rtos/zephyr