drivers/timer/xtensa_sys_timer: Add init/update hooks for asm2
drivers/timer/xtensa_sys_timer: Add init/update hooks for asm2

The earlier xtensa layer put the timer initialization and update
directly into the interrupt handler, which is... weird.  Under asm2,
it's just a regular ISR and needs to do the work in the driver.

Really, this driver needs a bunch of cleanup.  The xtensa CPU timer is
two registers and one ISR: a global cycle count register, and a
compare register that will fire the IRQ when they match.  There is
*way* too much code here.

Signed-off-by: Andy Ross <c70f9a6bf6ee0cd69c8af4ce5e6b131945769315@intel.com>

explora26/zephyr,Vudentz/zephyr,nashif/zephyr,galak/zephyr,zephyriot/zephyr,nashif/zephyr,GiulianoFranchetto/zephyr,finikorg/zephyr,kraj/zephyr,ldts/zephyr,Vudentz/zephyr,Vudentz/zephyr,explora26/zephyr,ldts/zephyr,finikorg/zephyr,Vudentz/zephyr,ldts/zephyr,explora26/zephyr,nashif/zephyr,punitvara/zephyr,GiulianoFranchetto/zephyr,kraj/zephyr,finikorg/zephyr,kraj/zephyr,punitvara/zephyr,nashif/zephyr,nashif/zephyr,zephyriot/zephyr,mbolivar/zephyr,mbolivar/zephyr,zephyrproject-rtos/zephyr,GiulianoFranchetto/zephyr,Vudentz/zephyr,mbolivar/zephyr,kraj/zephyr,ldts/zephyr,galak/zephyr,galak/zephyr,punitvara/zephyr,finikorg/zephyr,GiulianoFranchetto/zephyr,explora26/zephyr,GiulianoFranchetto/zephyr,ldts/zephyr,galak/zephyr,punitvara/zephyr,mbolivar/zephyr,kraj/zephyr,mbolivar/zephyr,punitvara/zephyr,zephyrproject-rtos/zephyr,zephyriot/zephyr,zephyrproject-rtos/zephyr,explora26/zephyr,finikorg/zephyr,zephyrproject-rtos/zephyr,zephyriot/zephyr,zephyrproject-rtos/zephyr,Vudentz/zephyr,zephyriot/zephyr,galak/zephyr