lpc: Removing unnecessary register writes
lpc: Removing unnecessary register writes

According to Nuvoton datasheet, when SHM windows are in IO mode, only the
bottom 16-bits of registers @ offset xF4 and xF8 are used.

"This register is ignored when WRAM1_IO bit in WIN_CFG register is set to
1 (LPC / eSPI Peripheral Channel I/O access with 16-bit address). This
register is set to its default value by Host Domain reset."

BRANCH=none
BUG=none
TEST=boot grunt and verify host communication still works.

Change-Id: I3e48ea1b09355eaf6967b9f7522bc3d35459b76b
Signed-off-by: Jett Rink <9d4aef0593e6843318d99df31597fb6153b89787@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/919006
Reviewed-by: Aseda Aboagye <12c9b286316a940fd31c24070da5ab64cdd4d0e7@chromium.org>
Reviewed-by: Furquan Shaikh <6be5c96c464778f89679b1062a2e0a6af93d2aa5@chromium.org>
Reviewed-by: Mulin Chao <6bbc5af053a1dfdc363be6857f30de4ac3bcbd16@nuvoton.com>

coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec