i965/fs: set execution size to 8 with simd8 ddy instruction
i965/fs: set execution size to 8 with simd8 ddy instruction

Commit dd5c825 changed the way how execution size for instructions
get set. Previously it was based on destination register width, now
it is set explicitly when emitting instructions.

Signed-off-by: Tapani Pälli <cdcb67a5e49297de94340ca09f25994bd5e7f762@intel.com>
Reviewed-by: Francisco Jerez <5906ff32bdd9fd8db196f6ba5ad3afd6f9257ea5@riseup.net>
Reviewed-by: Matt Turner <789b315743a28dd066a4ba1459c35951c291d8a6@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90258

metora/MesaGLSLCompiler,metora/MesaGLSLCompiler,metora/MesaGLSLCompiler