[arch][x86] bug fix in TSS descriptor base address
[arch][x86] bug fix in TSS descriptor base address

In 64-bit mode, the TSS descriptor is expanded to 16 bytes.
Currently, high 32-bit of TSS base address is set to be zero.
Updte descriptor structure definition, add high 32-bit high adress
and reserved bit.

Signed-off-by: Zhong,Fangjian <1530261eca083f66ca150bbd72ee2d2b4beaf7eb@intel.com>

hollanderic/lkstuff,travisg/lk,hollanderic/lkstuff,hollanderic/lkstuff,littlekernel/lk,travisg/lk,littlekernel/lk,littlekernel/lk,littlekernel/lk,travisg/lk,travisg/lk,hollanderic/lkstuff