Introduce CPU_XSCALE_CORE3, as XScale Core 3 is significally different than regular Xscale (it has no mini data cache, has armv6-style 16MB supersections, and can address 36bits). Define it for i81342.
Introduce CPU_XSCALE_CORE3, as XScale Core 3 is significally different than
regular Xscale (it has no mini data cache, has armv6-style 16MB
supersections, and can address 36bits).
Define it for i81342.

jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase