drm/i915: Disable caches for Global GTT.
drm/i915: Disable caches for Global GTT.

Global GTT doesn't have pat_sel[2:0] so it always point to pat_sel = 000;
So the only way to avoid screen corruptions is setting PAT 0 to Uncached.

MOCS can still be used though. But if userspace is trusting PTE for
cache selection the safest thing to do is to let caches disabled.

BSpec: "For GGTT, there is NO pat_sel[2:0] from the entry,
so RTL will always use the value corresponding to pat_sel = 000"

- System agent ggtt writes (i.e. cpu gtt mmaps) already work before
this patch, i.e. the same uncached + snooping access like on gen6/7
seems to be in effect.
- So this just fixes blitter/render access. Again it looks like it's
not just uncached access, but uncached + snooping. So we can still
hold onto all our assumptions wrt cpu clflushing on LLC machines.

v2: Cleaner patch as suggested by Chris.
v3: Add Daniel's comment

Reference: https://bugs.freedesktop.org/show_bug.cgi?id=85576
Cc: Chris Wilson <711c73f64afdce07b7e38039a96d2224209e9a6c@chris-wilson.co.uk>
Cc: James Ausmus <f3ef53135d075b8aa563ebd9d076a1a3f7086345@intel.com>
Cc: Daniel Vetter <c1b6782c4af8f0673da8923a0702a1832e5940f4@ffwll.ch>
Cc: Jani Nikula <ba783f3beccaedfda693f41a15407d612a629408@intel.com>
Cc: d96e5b2dd07c1733b2b013bd82922c22baade37d@vger.kernel.org
Tested-by: James Ausmus <f3ef53135d075b8aa563ebd9d076a1a3f7086345@intel.com>
Reviewed-by: James Ausmus <f3ef53135d075b8aa563ebd9d076a1a3f7086345@intel.com>
Signed-off-by: Rodrigo Vivi <f714145d6ee82178e54021e0c168f56d17b53c9c@intel.com>
Signed-off-by: Jani Nikula <ba783f3beccaedfda693f41a15407d612a629408@intel.com>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs