x86, fpu, amd: Clear exceptions in AMD FXSAVE workaround
x86, fpu, amd: Clear exceptions in AMD FXSAVE workaround

Before we do an EMMS in the AMD FXSAVE information leak workaround we
need to clear any pending exceptions, otherwise we trap with a
floating-point exception inside this code.

Reported-by: halfdog <b1c1d8736f20db3fb6c1c66bb1455ed43909f0d8@halfdog.net>
Tested-by: Borislav Petkov <0691a664b24b6f15b20cd5aee64b72271db08be1@suse.de>
Link: 3a06a0dbb9b575b3b2104cef43209f7722616a7d@mail.gmail.com
Signed-off-by: H. Peter Anvin <8a453bad9912ffe59bc0f0b8abe03df9be19379e@zytor.com>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs