Adding mio sub system module -Much easier to use and test, includes clockdiv and regs in one module -Note that it's still possible to use the mio_dp raw if you tie off signals to constants and bring your own clock. -Having both approachs should make everyone happy. Have found that SW developers usually can't write verilog and HW folks don't know C (so can't write to registers)...
Adding mio sub system module
-Much easier to use and test, includes clockdiv and regs in one module
-Note that it's still possible to use the mio_dp raw if you tie off signals to constants and bring your own clock.
-Having both approachs should make everyone happy. Have found that SW developers usually can't write verilog and HW folks don't know C (so can't write to registers)...

olajep/oh,peteasa/oh,olajep/oh,olajep/oh,parallella/oh,parallella/oh,peteasa/oh,parallella/oh,olajep/oh,peteasa/oh,parallella/oh,peteasa/oh