xive/p9: Clarify the global IRQ number encoding
xive/p9: Clarify the global IRQ number encoding

On P9, the global IRQ number is limited to 24 bits because the XICS
emulation encodes the CPPR value in the top 8 bits. The following
4 bits are used to encode the XIVE block number, which leaves 20 bits
for the interrupt index number. Introduce a definition reflecting the
size of this bitfield and check that number of interrupts per chip is
not overflowing our encoding.

Reviewed-by: Gustavo Romero <ce43015c4046df936ab2a5b45f555e3b8ab74301@linux.ibm.com>
Signed-off-by: Cédric Le Goater <2d8cace2254d4e43578d21933db015d84bcc468a@kaod.org>
Signed-off-by: Oliver O'Halloran <3dfaff8fa6ae977f042064a112a6aac576279b9b@gmail.com>

qemu/skiboot,qemu/skiboot,qemu/skiboot,legoater/skiboot,open-power/skiboot,shenki/skiboot,legoater/skiboot,qemu/skiboot,shenki/skiboot,open-power/skiboot,shenki/skiboot,open-power/skiboot,legoater/skiboot,shenki/skiboot,open-power/skiboot,legoater/skiboot,shenki/skiboot,legoater/skiboot,qemu/skiboot,open-power/skiboot