Regression: Set the clock for twosys-tsunami CPUs
Regression: Set the clock for twosys-tsunami CPUs

This patch merely adds a clock other than the default 1 Tick for the
CPUs of both the test system and drive system for the twosys-tsunami
regression.

The CPU frequency of the driver system is choosed to be twice that of
the test system to ensure it is not the bottleneck (although in this
case it mostly serves as a demonstration of a two-system setup),

cancro7/gem5,joerocklin/gem5,zlfben/gem5,KuroeKurose/gem5,gedare/gem5,KuroeKurose/gem5,briancoutinho0905/2dsampling,qizenguf/MLC-STT,HwisooSo/gemV-update,TUD-OS/gem5-dtu,SanchayanMaity/gem5,gem5/gem5,TUD-OS/gem5-dtu,KuroeKurose/gem5,rjschof/gem5,kaiyuanl/gem5,briancoutinho0905/2dsampling,briancoutinho0905/2dsampling,qizenguf/MLC-STT,SanchayanMaity/gem5,zlfben/gem5,gedare/gem5,Weil0ng/gem5,markoshorro/gem5,briancoutinho0905/2dsampling,aclifton/cpeg853-gem5,sobercoder/gem5,samueldotj/TeeRISC-Simulator,austinharris/gem5-riscv,markoshorro/gem5,joerocklin/gem5,rallylee/gem5,zlfben/gem5,samueldotj/TeeRISC-Simulator,HwisooSo/gemV-update,markoshorro/gem5,aclifton/cpeg853-gem5,kaiyuanl/gem5,kaiyuanl/gem5,rjschof/gem5,rjschof/gem5,yb-kim/gemV,SanchayanMaity/gem5,powerjg/gem5-ci-test,kaiyuanl/gem5,qizenguf/MLC-STT,briancoutinho0905/2dsampling,SanchayanMaity/gem5,gedare/gem5,zlfben/gem5,powerjg/gem5-ci-test,joerocklin/gem5,powerjg/gem5-ci-test,samueldotj/TeeRISC-Simulator,sobercoder/gem5,markoshorro/gem5,Weil0ng/gem5,sobercoder/gem5,samueldotj/TeeRISC-Simulator,Weil0ng/gem5,rjschof/gem5,TUD-OS/gem5-dtu,rallylee/gem5,TUD-OS/gem5-dtu,HwisooSo/gemV-update,sobercoder/gem5,HwisooSo/gemV-update,aclifton/cpeg853-gem5,markoshorro/gem5,TUD-OS/gem5-dtu,gedare/gem5,rallylee/gem5,markoshorro/gem5,joerocklin/gem5,sobercoder/gem5,qizenguf/MLC-STT,samueldotj/TeeRISC-Simulator,austinharris/gem5-riscv,zlfben/gem5,aclifton/cpeg853-gem5,austinharris/gem5-riscv,TUD-OS/gem5-dtu,gem5/gem5,yb-kim/gemV,KuroeKurose/gem5,austinharris/gem5-riscv,joerocklin/gem5,sobercoder/gem5,rjschof/gem5,cancro7/gem5,cancro7/gem5,powerjg/gem5-ci-test,powerjg/gem5-ci-test,rjschof/gem5,markoshorro/gem5,powerjg/gem5-ci-test,Weil0ng/gem5,SanchayanMaity/gem5,HwisooSo/gemV-update,aclifton/cpeg853-gem5,yb-kim/gemV,gem5/gem5,KuroeKurose/gem5,kaiyuanl/gem5,gem5/gem5,Weil0ng/gem5,zlfben/gem5,joerocklin/gem5,rjschof/gem5,SanchayanMaity/gem5,gem5/gem5,austinharris/gem5-riscv,yb-kim/gemV,joerocklin/gem5,austinharris/gem5-riscv,Weil0ng/gem5,cancro7/gem5,briancoutinho0905/2dsampling,HwisooSo/gemV-update,HwisooSo/gemV-update,SanchayanMaity/gem5,aclifton/cpeg853-gem5,gem5/gem5,austinharris/gem5-riscv,KuroeKurose/gem5,Weil0ng/gem5,yb-kim/gemV,samueldotj/TeeRISC-Simulator,rallylee/gem5,cancro7/gem5,briancoutinho0905/2dsampling,rallylee/gem5,gem5/gem5,KuroeKurose/gem5,cancro7/gem5,aclifton/cpeg853-gem5,cancro7/gem5,qizenguf/MLC-STT,joerocklin/gem5,powerjg/gem5-ci-test,gedare/gem5,kaiyuanl/gem5,zlfben/gem5,kaiyuanl/gem5,sobercoder/gem5,qizenguf/MLC-STT,TUD-OS/gem5-dtu,yb-kim/gemV,qizenguf/MLC-STT,rallylee/gem5,samueldotj/TeeRISC-Simulator,yb-kim/gemV,gedare/gem5,yb-kim/gemV,rallylee/gem5,gedare/gem5