  * Make the asm checks for fsin/fcos and fldln2/fxch/fyl2x more robust by     forcing the tested code to use register contraints.
  * Make the asm checks for fsin/fcos and fldln2/fxch/fyl2x more robust by
    forcing the tested code to use register contraints.

git-svn-id: 3f9eced0add15b5a9fa491ea3f7f263c10f60fd6@2535 92316355-f0b4-4df1-b90c-862c8a59935f

Distrotech/libcaca,mcfiredrill/libcaca-old,mcfiredrill/libcaca-old,mcfiredrill/libcaca-old,Distrotech/libcaca,mcfiredrill/libcaca-old,mcfiredrill/libcaca-old,mcfiredrill/libcaca-old,Distrotech/libcaca,Distrotech/libcaca,Distrotech/libcaca,mcfiredrill/libcaca-old,Distrotech/libcaca,mcfiredrill/libcaca-old,Distrotech/libcaca,Distrotech/libcaca,mcfiredrill/libcaca-old,Distrotech/libcaca