cpu: fix case with o3 cpu blocking and unblocking decode in cycle
cpu: fix case with o3 cpu blocking and unblocking decode in cycle

Fix a case in the O3 CPU where the decode stage blocks and unblocks in a
single cycle sending both signals to fetch which causes an assert or worse.
The previous check could never work before since the status was set to Blocked
before a test for the status being Unblocking was executed.

sobercoder/gem5,aclifton/cpeg853-gem5,rjschof/gem5,TUD-OS/gem5-dtu,gem5/gem5,qizenguf/MLC-STT,markoshorro/gem5,cancro7/gem5,gem5/gem5,TUD-OS/gem5-dtu,austinharris/gem5-riscv,aclifton/cpeg853-gem5,aclifton/cpeg853-gem5,powerjg/gem5-ci-test,rallylee/gem5,austinharris/gem5-riscv,joerocklin/gem5,zlfben/gem5,austinharris/gem5-riscv,SanchayanMaity/gem5,aclifton/cpeg853-gem5,HwisooSo/gemV-update,samueldotj/TeeRISC-Simulator,rjschof/gem5,yb-kim/gemV,HwisooSo/gemV-update,powerjg/gem5-ci-test,cancro7/gem5,briancoutinho0905/2dsampling,markoshorro/gem5,qizenguf/MLC-STT,TUD-OS/gem5-dtu,joerocklin/gem5,TUD-OS/gem5-dtu,rjschof/gem5,kaiyuanl/gem5,sobercoder/gem5,samueldotj/TeeRISC-Simulator,yb-kim/gemV,samueldotj/TeeRISC-Simulator,sobercoder/gem5,austinharris/gem5-riscv,Weil0ng/gem5,SanchayanMaity/gem5,rjschof/gem5,samueldotj/TeeRISC-Simulator,aclifton/cpeg853-gem5,cancro7/gem5,gedare/gem5,yb-kim/gemV,gedare/gem5,KuroeKurose/gem5,HwisooSo/gemV-update,rallylee/gem5,SanchayanMaity/gem5,rjschof/gem5,kaiyuanl/gem5,gedare/gem5,cancro7/gem5,yb-kim/gemV,briancoutinho0905/2dsampling,kaiyuanl/gem5,KuroeKurose/gem5,rallylee/gem5,rjschof/gem5,joerocklin/gem5,gem5/gem5,austinharris/gem5-riscv,gedare/gem5,gedare/gem5,KuroeKurose/gem5,gem5/gem5,KuroeKurose/gem5,rallylee/gem5,qizenguf/MLC-STT,kaiyuanl/gem5,sobercoder/gem5,zlfben/gem5,yb-kim/gemV,qizenguf/MLC-STT,SanchayanMaity/gem5,Weil0ng/gem5,zlfben/gem5,kaiyuanl/gem5,zlfben/gem5,powerjg/gem5-ci-test,HwisooSo/gemV-update,austinharris/gem5-riscv,joerocklin/gem5,KuroeKurose/gem5,gem5/gem5,SanchayanMaity/gem5,qizenguf/MLC-STT,sobercoder/gem5,yb-kim/gemV,markoshorro/gem5,joerocklin/gem5,aclifton/cpeg853-gem5,TUD-OS/gem5-dtu,powerjg/gem5-ci-test,briancoutinho0905/2dsampling,HwisooSo/gemV-update,KuroeKurose/gem5,zlfben/gem5,joerocklin/gem5,markoshorro/gem5,TUD-OS/gem5-dtu,samueldotj/TeeRISC-Simulator,briancoutinho0905/2dsampling,yb-kim/gemV,yb-kim/gemV,samueldotj/TeeRISC-Simulator,Weil0ng/gem5,sobercoder/gem5,austinharris/gem5-riscv,samueldotj/TeeRISC-Simulator,cancro7/gem5,rallylee/gem5,HwisooSo/gemV-update,Weil0ng/gem5,markoshorro/gem5,qizenguf/MLC-STT,qizenguf/MLC-STT,sobercoder/gem5,SanchayanMaity/gem5,gem5/gem5,rallylee/gem5,powerjg/gem5-ci-test,zlfben/gem5,Weil0ng/gem5,cancro7/gem5,gem5/gem5,SanchayanMaity/gem5,TUD-OS/gem5-dtu,KuroeKurose/gem5,markoshorro/gem5,Weil0ng/gem5,joerocklin/gem5,gedare/gem5,briancoutinho0905/2dsampling,kaiyuanl/gem5,powerjg/gem5-ci-test,aclifton/cpeg853-gem5,joerocklin/gem5,briancoutinho0905/2dsampling,HwisooSo/gemV-update,zlfben/gem5,kaiyuanl/gem5,Weil0ng/gem5,rjschof/gem5,rallylee/gem5,briancoutinho0905/2dsampling,markoshorro/gem5,powerjg/gem5-ci-test,cancro7/gem5,gedare/gem5