i965: Adjust gen check in can_do_pipelined_register_writes
i965: Adjust gen check in can_do_pipelined_register_writes

Allow for pipelined register writes for gen < 7.

v2:
 * Split from another patch and adjust comment (jljusten)

Reviewed-by: Jordan Justen <a79006884ba9cf5f4f7fcbb92a15b208780d8c97@intel.com>
Reviewed-by: Kristian Høgsberg  <ca9b5b1e27d4fa7f4ba6848bdd08ca52cfd6330c@bitplanet.net>

metora/MesaGLSLCompiler,metora/MesaGLSLCompiler,metora/MesaGLSLCompiler