arm64: mm: Make icache synchronisation logic huge page aware
arm64: mm: Make icache synchronisation logic huge page aware

The __sync_icache_dcache routine will only flush the dcache for the
first page of a compound page, potentially leading to stale icache
data residing further on in a hugetlb page.

This patch addresses this issue by taking into consideration the
order of the page when flushing the dcache.

Reported-by: Mark Brown <b51b9a92386687a9ac927cebfa0f978adeb8cea5@linaro.org>
Tested-by: Mark Brown <b51b9a92386687a9ac927cebfa0f978adeb8cea5@linaro.org>
Signed-off-by: Steve Capper <20bdc7169d3cb6e97bf912a5efd111f83cbbb42b@linaro.org>
Acked-by: Will Deacon <b913f13ef92ac157955c954ccaaff7be065faba4@arm.com>
Signed-off-by: Catalin Marinas <15ce75b290ebaf27c3f9fd73ab848685ed3d8261@arm.com>
Cc: <4fbacc2fa0ffdbb11bf1ad6925b886ebd08dd15f@vger.kernel.org> # v3.11+

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs