Add workgroup size attribute to AMDGPU functions in codegen (#4342)
Add workgroup size attribute to AMDGPU functions in codegen (#4342)

When we did not set the workgroup size, LLVM will use too many registers
for kernel launches with many threads. This resulted in "invalid ISA"
errors. Here we set the maximum workgroup size to the maximum threads
per block from the device API.

Of course, one might look into allowing configurations with fewer
threads at runtime to use more registers.
tqchen/tvm,dmlc/tvm,dmlc/tvm,Laurawly/tvm-1,dmlc/tvm,tqchen/tvm,sxjscience/tvm,tqchen/tvm,dmlc/tvm,Laurawly/tvm-1,dmlc/tvm,Laurawly/tvm-1,Laurawly/tvm-1,sxjscience/tvm,sxjscience/tvm,tqchen/tvm,tqchen/tvm,sxjscience/tvm,dmlc/tvm,dmlc/tvm,dmlc/tvm,sxjscience/tvm,Laurawly/tvm-1,Laurawly/tvm-1,Laurawly/tvm-1,sxjscience/tvm,sxjscience/tvm,sxjscience/tvm,tqchen/tvm,tqchen/tvm,Laurawly/tvm-1,tqchen/tvm,Laurawly/tvm-1,Laurawly/tvm-1,tqchen/tvm,tqchen/tvm,sxjscience/tvm,dmlc/tvm