irqchip: gicv3-its: Fix domain free in multi-MSI case
irqchip: gicv3-its: Fix domain free in multi-MSI case

Fix stupid thinko on the path freeing the interrupts, where only
the first interrupt would get reset, and none of the others.

This should only affect multi-MSI allocations.

Reported-by: Wuyun Wu (Abel) <5a192a0fd705103476017f53b6e2a3294204b2bb@huawei.com>
Signed-off-by: Marc Zyngier <a16cc0c82647c52d401177f8e50567df5499e36c@arm.com>
Cc: f99ef57ccac738b558d0fc2e44478b3c5def9522@lists.infradead.org
Cc: Robert Richter <22a70fd9773e4de05b12c05075e9bcd605577f4d@caviumnetworks.com>
Cc: Jason Cooper <68c46a606457643eab92053c1c05574abb26f861@lakedaemon.net>
Signed-off-by: Thomas Gleixner <00e4cf8f46a57000a44449bf9dd8cbbcc209fd2a@linutronix.de>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs