net/mlx5: replace memory barrier type
net/mlx5: replace memory barrier type

The reason for the requirement of a barrier between the txq writes
and the doorbell record writes is to avoid a case where the device
reads the doorbell record's new value before the txq writes are flushed
to memory.

The current use of rte_wmb is not necessary, and can be replaced by
rte_io_wmb which is more relaxed.

Replacing the rte_wmb is also expected to improve the throughput.

Signed-off-by: Shahaf Shuler <59427d49da6f2b944fbf4cb5ee70ef3ac25f744f@mellanox.com>
Signed-off-by: Yongseok Koh <76b37c91816d73ef9cf709e3e83a68f2d162f1e2@mellanox.com>
Signed-off-by: Alexander Solganik <c5ead667a69b1a48cae093a60913848e634022b0@gmail.com>
Signed-off-by: Sagi Grimberg <bf169a711b430cb763859053627bb76d98a96051@grimberg.me>
Acked-by: Nelio Laranjeiro <2f8dd9032d5b85ca4b53dec8ce664eb6998836be@6wind.com>

john-mcnamara-intel/dpdk,john-mcnamara-intel/dpdk,john-mcnamara-intel/dpdk,john-mcnamara-intel/dpdk