Fixed #41 - SRAM fails write and read in self test
Fixed #41 - SRAM fails write and read in self test

Adding 2ms a sleep before and after the POT USART config/unconfig
provided enough delay for the USART to enter to a good state before
transmitting the next byte.

aschulm/battor,aschulm/battor,aschulm/battor,aschulm/battor