dev-arm: Polish SMMUv3 CMDQ setup
dev-arm: Polish SMMUv3 CMDQ setup

The patch is aiming to be spec compliant when it comes to setup
the SMMU command queue (while CR0.CMDQEN = 0), in the following ways:

* Writes to CMDQ_CONS (read index) are allowed during initialization
* Writes to CMDQ_BASE (cmdq pointer) are allowed during initialization

According to spec,
If they happen when the command queue is in fuction (CR0.CMDQEN = 1),
behaviour is constrained unpredictable, with the following options

1) The write is ignored
2) The register takes the value and it is unpredictable whether it
affects the SMMU command queue internal state.

In the model/patch we go for option 1.

Change-Id: I1c55bc571a8b3a1c0b0a525e429ab7b1480544ff
Signed-off-by: Giacomo Travaglini <8eef13a4f970e2e9372c8d26ad0737b760f99c02@arm.com>
Reviewed-by: Michiel Van Tol <aa3e25a24483968878fd2754b9cf9d494fc5c6e2@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19633
Reviewed-by: Andreas Sandberg <c9f5686ee5bd561c93f9de79681eee75bfa7f36e@arm.com>
Maintainer: Andreas Sandberg <c9f5686ee5bd561c93f9de79681eee75bfa7f36e@arm.com>
Tested-by: kokoro <2ac7b1f3fa578934c95181d4272be0d3bca00121@google.com>

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