drm/i915: Write the FDI RX TU size reg at the right time
drm/i915: Write the FDI RX TU size reg at the right time

According to "Graphics BSpec: vol4g North Display Engine Registers [IVB],
Display Mode Set Sequence" We need to write the TU size register
of the fdi RX unit _before_ starting to train the link.

Note: The current code is actually correct as Paulo mentioned in
review, but it's a bit confusion since only the fdi rx/tx plls need to
be enabled before the cpu pipes/planes. Hence it's still a good idea
to move the TU_SIZE setting to the "right" spot in the sequence, to
better match Bspec.

Reviewed-by: Paulo Zanoni <cc0e04a2103c45cd195651d976f79813d0f66bdf@intel.com>
Signed-off-by: Daniel Vetter <c1b6782c4af8f0673da8923a0702a1832e5940f4@ffwll.ch>

TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs