Fix decoding of MOVHP[SD] instruction (#27)
Fix decoding of MOVHP[SD] instruction (#27)

The operand with of the register should be 128 bit as the high part of
the register is read/written. Ideally, the memory operand would have an
operand with of 64 bit, but this triggers a generator assertion.
lrr-tum/dbrew,lrr-tum/dbrew,lrr-tum/dbrew,lrr-tum/dbrew,lrr-tum/dbrew