mem: Cancel cache retry event when blocking port
mem: Cancel cache retry event when blocking port

This patch solves the corner case scenario where the sendRetryEvent could be
scheduled twice, when an io device stresses the IOcache in the system. This
should not be possible in the cache system.

zlfben/gem5,sobercoder/gem5,HwisooSo/gemV-update,aclifton/cpeg853-gem5,qizenguf/MLC-STT,powerjg/gem5-ci-test,markoshorro/gem5,aclifton/cpeg853-gem5,gem5/gem5,TUD-OS/gem5-dtu,markoshorro/gem5,briancoutinho0905/2dsampling,powerjg/gem5-ci-test,rjschof/gem5,gedare/gem5,markoshorro/gem5,yb-kim/gemV,joerocklin/gem5,rjschof/gem5,briancoutinho0905/2dsampling,SanchayanMaity/gem5,kaiyuanl/gem5,Weil0ng/gem5,cancro7/gem5,KuroeKurose/gem5,markoshorro/gem5,SanchayanMaity/gem5,qizenguf/MLC-STT,aclifton/cpeg853-gem5,sobercoder/gem5,samueldotj/TeeRISC-Simulator,gedare/gem5,KuroeKurose/gem5,austinharris/gem5-riscv,austinharris/gem5-riscv,KuroeKurose/gem5,markoshorro/gem5,joerocklin/gem5,zlfben/gem5,kaiyuanl/gem5,kaiyuanl/gem5,gedare/gem5,aclifton/cpeg853-gem5,austinharris/gem5-riscv,TUD-OS/gem5-dtu,joerocklin/gem5,austinharris/gem5-riscv,TUD-OS/gem5-dtu,zlfben/gem5,joerocklin/gem5,gem5/gem5,rallylee/gem5,SanchayanMaity/gem5,kaiyuanl/gem5,gedare/gem5,zlfben/gem5,aclifton/cpeg853-gem5,Weil0ng/gem5,Weil0ng/gem5,sobercoder/gem5,gem5/gem5,aclifton/cpeg853-gem5,rallylee/gem5,kaiyuanl/gem5,KuroeKurose/gem5,powerjg/gem5-ci-test,zlfben/gem5,TUD-OS/gem5-dtu,powerjg/gem5-ci-test,samueldotj/TeeRISC-Simulator,markoshorro/gem5,rjschof/gem5,joerocklin/gem5,gem5/gem5,gem5/gem5,KuroeKurose/gem5,rjschof/gem5,cancro7/gem5,joerocklin/gem5,austinharris/gem5-riscv,sobercoder/gem5,powerjg/gem5-ci-test,qizenguf/MLC-STT,gem5/gem5,Weil0ng/gem5,KuroeKurose/gem5,cancro7/gem5,qizenguf/MLC-STT,joerocklin/gem5,powerjg/gem5-ci-test,rallylee/gem5,Weil0ng/gem5,Weil0ng/gem5,yb-kim/gemV,HwisooSo/gemV-update,austinharris/gem5-riscv,HwisooSo/gemV-update,SanchayanMaity/gem5,kaiyuanl/gem5,gedare/gem5,TUD-OS/gem5-dtu,yb-kim/gemV,TUD-OS/gem5-dtu,rallylee/gem5,gedare/gem5,yb-kim/gemV,austinharris/gem5-riscv,joerocklin/gem5,cancro7/gem5,rjschof/gem5,rallylee/gem5,samueldotj/TeeRISC-Simulator,kaiyuanl/gem5,zlfben/gem5,samueldotj/TeeRISC-Simulator,HwisooSo/gemV-update,qizenguf/MLC-STT,cancro7/gem5,qizenguf/MLC-STT,zlfben/gem5,SanchayanMaity/gem5,samueldotj/TeeRISC-Simulator,cancro7/gem5,qizenguf/MLC-STT,briancoutinho0905/2dsampling,yb-kim/gemV,aclifton/cpeg853-gem5,rjschof/gem5,gedare/gem5,rallylee/gem5,sobercoder/gem5,SanchayanMaity/gem5,HwisooSo/gemV-update,yb-kim/gemV,HwisooSo/gemV-update,sobercoder/gem5,rallylee/gem5,KuroeKurose/gem5,powerjg/gem5-ci-test,sobercoder/gem5,SanchayanMaity/gem5,cancro7/gem5,briancoutinho0905/2dsampling,gem5/gem5,TUD-OS/gem5-dtu,rjschof/gem5,yb-kim/gemV,HwisooSo/gemV-update,briancoutinho0905/2dsampling,yb-kim/gemV,samueldotj/TeeRISC-Simulator,briancoutinho0905/2dsampling,markoshorro/gem5,briancoutinho0905/2dsampling,Weil0ng/gem5,samueldotj/TeeRISC-Simulator