Fix UVBWLIST SBE Chip Op
Fix UVBWLIST SBE Chip Op

The address where SBE is to populate the ultravisor white/blacklist
is to be put in Mbox reg1, which means that the register needs to
be masked in the command we're sending. Before this change, only
Mbox reg0 was masked, and SBE was not getting the correct address
at which to populate the UVBWLIST. This change masks Mbox Reg 1 so
that SBE can receive the correct address for the UVBWLIST.

Change-Id: I841db74dc407f51c14f005b9ccd457d5641ffa7e
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87112
Tested-by: Jenkins Server <8e3f934e4c44875bc48d33da3ea13d93ba9a233f@us.ibm.com>
Tested-by: Jenkins OP Build CI <e610bd72261d3c0a48f1e8ae36832ab00774d426@us.ibm.com>
Reviewed-by: Daniel M Crowell <912029ca9254ac7b5854e56910561d682e1fa2d0@us.ibm.com>

open-power/hostboot,open-power/hostboot,open-power/hostboot,open-power/hostboot,open-power/hostboot