set the correct cache control in the EPT entries
set the correct cache control in the EPT entries

Previously, Dune was setting EPT entries as uncacheable (UC) if the
corresponding Linux PT entry was not associated with a "struct page".
I/O memory is not associated with a "struct page" so it was correctly
marked as UC. Unfortunately, the vvar area is mapped to userspace by the
function io_remap_pfn_range, which (erroneously) marks it as I/O memory.
The correct way to go is to consult the vma->vm_page_prot and set up
cache control appropriately.

The situation before is described by the following extract of PT and EPT
entries:

             |GVA         |HPA     |PT flags         |EPT flags
-------------+------------+--------+-----------------+-------------
PT entry #249 7ffff7ef9000 d0f14000 RW PCD ACC NX DRT RW- MT=0 IPAT
PT entry #506 7ffff7ffa000 01d1b000 ro     ACC NX     R-- MT=0 IPAT

The first entry corresponds to I/O memory and the second to the vvar.
The solution fixes the second entry's EPT flags so that MT=6.

linux vvar DWORD read latency 0.8 ns (2.0 cycles)
before vvar DWORD read latency 108.4 ns (260.2 cycles)
after vvar DWORD read latency 0.8 ns (2.0 cycles)

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