[AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned store instructions when the original store was only 16 byte aligned if the store is from the lower bits of a subvector extract.
[AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned store instructions when the original store was only 16 byte aligned if the store is from the lower bits of a subvector extract.

git-svn-id: 0ff597fd157e6f4fc38580e8d64ab130330d2411@286341 91177308-0d34-0410-b5e6-96231b3b80d8

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