arm: Correctly display disassembly of vldmia/vstmia
arm: Correctly display disassembly of vldmia/vstmia

The MicroMemOp class generates the disassembly for both integer
and floating point instructions, but it would always print its
first operand as an integer register without considering that the
op may be a floating instruction in which case a float register
should be displayed instead.

kaiyuanl/gem5,HwisooSo/gemV-update,gedare/gem5,aclifton/cpeg853-gem5,SanchayanMaity/gem5,sobercoder/gem5,sobercoder/gem5,kaiyuanl/gem5,TUD-OS/gem5-dtu,cancro7/gem5,gem5/gem5,briancoutinho0905/2dsampling,gedare/gem5,HwisooSo/gemV-update,rjschof/gem5,qizenguf/MLC-STT,qizenguf/MLC-STT,gem5/gem5,qizenguf/MLC-STT,SanchayanMaity/gem5,SanchayanMaity/gem5,austinharris/gem5-riscv,markoshorro/gem5,briancoutinho0905/2dsampling,Weil0ng/gem5,sobercoder/gem5,zlfben/gem5,SanchayanMaity/gem5,kaiyuanl/gem5,kaiyuanl/gem5,markoshorro/gem5,briancoutinho0905/2dsampling,gedare/gem5,TUD-OS/gem5-dtu,kaiyuanl/gem5,Weil0ng/gem5,KuroeKurose/gem5,powerjg/gem5-ci-test,qizenguf/MLC-STT,rjschof/gem5,cancro7/gem5,zlfben/gem5,austinharris/gem5-riscv,qizenguf/MLC-STT,KuroeKurose/gem5,gem5/gem5,aclifton/cpeg853-gem5,rjschof/gem5,briancoutinho0905/2dsampling,powerjg/gem5-ci-test,cancro7/gem5,kaiyuanl/gem5,aclifton/cpeg853-gem5,zlfben/gem5,TUD-OS/gem5-dtu,briancoutinho0905/2dsampling,rallylee/gem5,gem5/gem5,HwisooSo/gemV-update,austinharris/gem5-riscv,TUD-OS/gem5-dtu,rallylee/gem5,rallylee/gem5,aclifton/cpeg853-gem5,briancoutinho0905/2dsampling,TUD-OS/gem5-dtu,sobercoder/gem5,briancoutinho0905/2dsampling,cancro7/gem5,markoshorro/gem5,TUD-OS/gem5-dtu,qizenguf/MLC-STT,rjschof/gem5,zlfben/gem5,sobercoder/gem5,rallylee/gem5,markoshorro/gem5,sobercoder/gem5,kaiyuanl/gem5,aclifton/cpeg853-gem5,powerjg/gem5-ci-test,cancro7/gem5,gedare/gem5,HwisooSo/gemV-update,rallylee/gem5,powerjg/gem5-ci-test,Weil0ng/gem5,KuroeKurose/gem5,gedare/gem5,gem5/gem5,KuroeKurose/gem5,aclifton/cpeg853-gem5,sobercoder/gem5,cancro7/gem5,powerjg/gem5-ci-test,rjschof/gem5,rallylee/gem5,zlfben/gem5,markoshorro/gem5,markoshorro/gem5,zlfben/gem5,gedare/gem5,qizenguf/MLC-STT,gem5/gem5,SanchayanMaity/gem5,HwisooSo/gemV-update,zlfben/gem5,SanchayanMaity/gem5,rallylee/gem5,TUD-OS/gem5-dtu,HwisooSo/gemV-update,Weil0ng/gem5,Weil0ng/gem5,KuroeKurose/gem5,rjschof/gem5,HwisooSo/gemV-update,austinharris/gem5-riscv,gedare/gem5,austinharris/gem5-riscv,cancro7/gem5,austinharris/gem5-riscv,Weil0ng/gem5,aclifton/cpeg853-gem5,powerjg/gem5-ci-test,Weil0ng/gem5,gem5/gem5,markoshorro/gem5,KuroeKurose/gem5,austinharris/gem5-riscv,powerjg/gem5-ci-test,SanchayanMaity/gem5,rjschof/gem5,KuroeKurose/gem5