ARM: mvebu: Allow to power down L2 cache controller in idle mode
ARM: mvebu: Allow to power down L2 cache controller in idle mode

This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.

This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.

Signed-off-by: Gregory CLEMENT <cd8db494d8ed74d7c3f56ec5c769dff3d51dd397@free-electrons.com>
Link: https://lkml.kernel.org/r/1397488214-20685-8-git-send-email-cd8db494d8ed74d7c3f56ec5c769dff3d51dd397@free-electrons.com
Signed-off-by: Jason Cooper <68c46a606457643eab92053c1c05574abb26f861@lakedaemon.net>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs