Increase L0 ADC sample time
Increase L0 ADC sample time

With default sampling time, the MBED2 and CI test shield tests would fail
because the stabilization slope of ADC is relatively slow.
ERROR (out:0.8000) - (in:0.7407) = (0.0593)
ERROR (out:0.9000) - (in:0.8354) = (0.0646)
ERROR (out:1.0000) - (in:0.9289) = (0.0711)

This is related to the 10kOhms resistors used to connect Ain to
Aout mounted on the CI shileds, and internal capacitance of L0 targets.
If connecting Ain and Aout with wires, bypassing the resistors, the test
is passed. So we're increasing the sampling time to let the automated
ci shiled tests PASS.

OK    (out:0.8000) - (in:0.7863) = (0.0137)
OK    (out:0.9000) - (in:0.8869) = (0.0131)
OK    (out:1.0000) - (in:0.9844) = (0.0156)

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