Fix incorrect code generation with interleaving 3+ vectors using OpenCL
Fix incorrect code generation with interleaving 3+ vectors using OpenCL


Former-commit-id: 594f409c85c2cff80ced8ca885af285d74f1d9d3
darkbuck/Halide,Trass3r/Halide,darkbuck/Halide,Trass3r/Halide,Trass3r/Halide,darkbuck/Halide,Trass3r/Halide,Trass3r/Halide,Trass3r/Halide,darkbuck/Halide,darkbuck/Halide,darkbuck/Halide,darkbuck/Halide,Trass3r/Halide