Core(M): Fixed MPUv7 inner cache policy evaluation in ARM_MPU_ACCESS_NORMAL definition. (#532)
Core(M): Fixed MPUv7 inner cache policy evaluation in ARM_MPU_ACCESS_NORMAL definition. (#532)

Change-Id: Ie796c33e671e410c27602961694aaae0bf5e490a

ARM-software/CMSIS_5,ARM-software/CMSIS_5,ARM-software/CMSIS_5,ARM-software/CMSIS_5,ARM-software/CMSIS_5,JonatanAntoni/CMSIS_5,JonatanAntoni/CMSIS_5,ARM-software/CMSIS_5,JonatanAntoni/CMSIS_5,JonatanAntoni/CMSIS_5,JonatanAntoni/CMSIS_5,JonatanAntoni/CMSIS_5