guybrush: Pull eSPI RST# high to disable
guybrush: Pull eSPI RST# high to disable

eSPI RST# is asserted during S0ix but eSPI is not reinitialized during
resume. eSPI RST# isn't actually needed because PLTRST# is used during
initialization.

BUG=b:186135022, b:186470159
TEST=Boot without eSPI errors. No eSPI errors during S0iX resume on
board with eSPI RST# floating.
BRANCH=None

Signed-off-by: Rob Barnes <3ced0940a2329ce70499686f01d3d60685ec66ed@google.com>
Change-Id: I2c8276854733e23f9f1324422e281c38d86d6ad8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2854121
Reviewed-by: Raul E Rangel <9a9c998e11a2655b1de9a05eeeef5f710c0dc7ed@chromium.org>

coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec,coreboot/chrome-ec