Don't diddle VRSAVE if no registers need to be added/removed from it.  This allows us to codegen functions as:
Don't diddle VRSAVE if no registers need to be added/removed from it.  This
allows us to codegen functions as:

_test_rol:
        vspltisw v2, -12
        vrlw v2, v2, v2
        blr

instead of:

_test_rol:
        mfvrsave r2, 256
        mr r3, r2
        mtvrsave r3
        vspltisw v2, -12
        vrlw v2, v2, v2
        mtvrsave r2
        blr

Testcase here: CodeGen/PowerPC/vec_vrsave.ll


git-svn-id: 0ff597fd157e6f4fc38580e8d64ab130330d2411@27777 91177308-0d34-0410-b5e6-96231b3b80d8

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