Add simulation capabilities to soc.py
Add simulation capabilities to soc.py

Sample invocation (from soc directory):
../scripts/pyrun soc.py --sim-ram-init ../basic_cfu/basic.bin --cfu ../proj/proj_example/cfu.v --sim-trace

This results in soc/build/sim/gateware/sim.fst being written, which can
then be opened by gtkwave and allows inspection of CFU state.

google/CFU-Playground,google/CFU-Playground,google/CFU-Playground,google/CFU-Playground