stdlib: Fix RISCVBoard when running O3 CPU with Ruby
stdlib: Fix RISCVBoard when running O3 CPU with Ruby

The long/nightly tests were failing,
https://jenkins.gem5.org/job/nightly/47, due to a misconfiguration in
the RISCVBoard that caused a "fatal: Unable to find destination " error
when running the O3 CPU with a Ruby cache coherence protocol.

This patch resolves the issue by adding a "BadAddr" to handle bad
addresses occasionally produced by the O3 CPU.

Change-Id: I07fe06544e7588f45984032a022e73cd41d8a1e6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52963
Reviewed-by: Jason Lowe-Power <92de577f37050ad05b60626d2f17913f40dcb1a2@gmail.com>
Maintainer: Jason Lowe-Power <92de577f37050ad05b60626d2f17913f40dcb1a2@gmail.com>
Tested-by: kokoro <2ac7b1f3fa578934c95181d4272be0d3bca00121@google.com>

gem5/gem5,gem5/gem5,gem5/gem5,gem5/gem5,gem5/gem5,gem5/gem5,gem5/gem5