ASoC: register cache should be 1 byte aligned for 1 byte long register
ASoC: register cache should be 1 byte aligned for 1 byte long register

Signed-off-by: Cliff Cai <c2a2d640411a9ea91ab6abd6e9e9e46272f72647@analog.com>
Signed-off-by: Mike Frysinger <8f3f75c74bd5184edcfa6534cab3c13a00a2f794@gentoo.org>
Acked-by: Liam Girdwood <a57ef363056e61beffa2efa59c68550d40db03b0@slimlogic.co.uk>
Signed-off-by: Mark Brown <b51b9a92386687a9ac927cebfa0f978adeb8cea5@opensource.wolfsonmicro.com>
Cc: 4fbacc2fa0ffdbb11bf1ad6925b886ebd08dd15f@kernel.org

KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas