Lower ZS_DELAY() back to what it was, but issue a bus_space_barrier() after every register write. Hinted by IRIX' <sys/z8530.h>.
Lower ZS_DELAY() back to what it was, but issue a bus_space_barrier() after
every register write. Hinted by IRIX' <sys/z8530.h>.

While there, flip the CTS, DCD, RTS and DTR bits in registers #0 and #5.
Aforementioned header says they are inverted due to a hardware bug.

Tested on IP20, IP22 and IP24.

orumin/openbsd-efivars,orumin/openbsd-efivars,orumin/openbsd-efivars,orumin/openbsd-efivars