V4L/DVB (10075): pxa-camera: setup the FIFO inactivity time-out register
V4L/DVB (10075): pxa-camera: setup the FIFO inactivity time-out register

Using PXA270's FIFO inactivity time-out register (CITOR) reduces FIFO overruns.
The time-out is calculated in CICLK / LCDCLK ticks and has to be longer than
one pixel time. For this we have to know the pixel clock frequency, which
usually is provided by the camera. We use the struct soc_camera_sense to
request PCLK frequency from the camera driver upon each data format change.

Tested-by: Robert Jarzmik <94b2a0a74cb42a2dd0cf1b763601af7f13907aa9@free.fr>
Signed-off-by: Guennadi Liakhovetski <50875182aae23d69ca7738697596f18a14e926fc@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <ad86ba2154032c9f55743a190faa2459a9d61d42@redhat.com>

TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas,KristFoundation/Programs,TeamVee-Kanas/android_kernel_samsung_kanas