uart: Keep synchronous console flush when IRQ not working
uart: Keep synchronous console flush when IRQ not working

Some boards are missing an EC for interrupts (or might not have
the FPGA properly flashed). In that case the serial interrupt isn't
working.

We attempt to detect this by enabling all interrupts by default and
when the first one occurs, we mark interrupts as "functional".

Until they are detected as such, we keep all output flushes fully
synchronous.

Signed-off-by: Benjamin Herrenschmidt <a7089bb6e7e92505d88aaff006cbdd60cc9120b6@kernel.crashing.org>

shenki/skiboot,open-power/skiboot,neelegup/skiboot,csmart/skiboot,neelegup/skiboot,jk-ozlabs/skiboot,ddstreet/skiboot,qemu/skiboot,qemu/skiboot,qemu/skiboot,apopple/skiboot,cyrilbur-ibm/skiboot,shenki/skiboot,legoater/skiboot,neelegup/skiboot,cyrilbur-ibm/skiboot,legoater/skiboot,qemu/skiboot,stewart-ibm/skiboot,qemu/skiboot,jk-ozlabs/skiboot,ddstreet/skiboot,legoater/skiboot,legoater/skiboot,ddstreet/skiboot,apopple/skiboot,apopple/skiboot,open-power/skiboot,shenki/skiboot,csmart/skiboot,mikey/skiboot,open-power/skiboot,shenki/skiboot,mikey/skiboot,open-power/skiboot,shenki/skiboot,csmart/skiboot,mikey/skiboot,stewart-ibm/skiboot,legoater/skiboot,stewart-ibm/skiboot,jk-ozlabs/skiboot,cyrilbur-ibm/skiboot,open-power/skiboot