Add the Processor and T3 classes.
Add the Processor and T3 classes.

The Processor is an abstract base class for emulating
fetch-increment-execute processors.  The T3 is a very simple balanced
ternary implementation of Processor which supports fixed-size 6-trit
instructions with 3-trit opcodes.

At the moment it doesn't do anything except halt, because I haven't
defined any other instructions, but it proves the concept by halting
correctly!

Next I should write some tests and then build up the instruction set.
The T3 has a single-operand instruction set, with the default register
000 being used to store the results of operations.

direvus/btern