MIPS: perf: Allow for more perf events
MIPS: perf: Allow for more perf events

In mipsxx_pmu_map_raw_event(), set event_id to base_id after the cpu
type conditional code to allow that code to override the base_id to use
more bits from the config and a higher bit for parity.

This will allow cores with up to 512 events between all even/odd
counters (an 8-bit event id) such as P5600 to use bit 8 for parity.

Signed-off-by: James Hogan <547fa85bb3888a0222eed8ec39e36708605c6d53@imgtec.com>
Signed-off-by: Markos Chandras <5cdbcb0e11d2b5ebc39222958c54a1c6329d0c9d@imgtec.com>
Cc: 562397917b9a8bf316569a848858b12fb417723f@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7243/
Signed-off-by: Ralf Baechle <92f48d309cda194c8eda36aa8f9ae28c488fa208@linux-mips.org>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs