tty/8250_dw: Add support for OCTEON UARTS.
tty/8250_dw: Add support for OCTEON UARTS.

A few differences needed by OCTEON:

o These are DWC UARTS, but have USR at a different offset.

o Internal SoC buses require reading back from registers to maintain
  write ordering.

o 8250 on OCTEON appears with 64-bit wide registers, so when using
  readb/writeb in big endian mode we have to adjust the membase to hit
  the proper part of the register.

o No UCV register, so we hard code some properties.

Because OCTEON doesn't have a UCV register, I change where
dw8250_setup_port(), which reads the UCV, is called by pushing it in
to the OF and ACPI probe functions, and move unchanged
dw8250_setup_port() earlier in the file.

Signed-off-by: David Daney <eec15f2dea0e7d114bf41a5bde8a2858b8f3e893@cavium.com>
Acked-by: Greg Kroah-Hartman <4645f7897fd33786a2ee1264d590b3c400559d85@linuxfoundation.org>
Cc: Arnd Bergmann <f2c659f01951776204a6c5b902787d9019fbeebd@arndb.de>
Cc: Heikki Krogerus <0364a60538b3766c953bdea7e7e4859afd98436c@linux.intel.com>
Cc: 562397917b9a8bf316569a848858b12fb417723f@linux-mips.org
Cc: Jamie Iles <b4dde37aa2aac745c0e6c43447507eaeace3e59f@jamieiles.com>
Cc: Jiri Slaby <dfbf39eb5bf303a3db5454d815cb8c8888cbadf9@suse.cz>
Cc: f97bd3735ebb06ec9fde555afdf685a9966cf521@vger.kernel.org
Cc: 2578944098299abf708b08eff6fcf60565553586@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5516/
Acked-by: Arnd Bergmann <f2c659f01951776204a6c5b902787d9019fbeebd@arndb.de>
Reviewed-by: Heikki Krogerus <0364a60538b3766c953bdea7e7e4859afd98436c@linux.intel.com>
Signed-off-by: Ralf Baechle <92f48d309cda194c8eda36aa8f9ae28c488fa208@linux-mips.org>

KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs,KristFoundation/Programs