soc/intel_adsp: Fix timing/clock register ownership on cAVS 1.8+
soc/intel_adsp: Fix timing/clock register ownership on cAVS 1.8+

The wall clock timer is not (per documentation) part of the
"timestamping" register set on the DSP.  And its counter and
comparator registers work fine always.  But if the DSP isn't set as
the "owner" of the timestamp hardware, wall clock interrupts never
arrive.

Also grab the PLL ownership too, because SOF already does anyway.
While we don't have a dynamic clock driver yet, we will surely want
one soon and will needt this.

Signed-off-by: Andy Ross <c70f9a6bf6ee0cd69c8af4ce5e6b131945769315@intel.com>

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