build: Consistently use $@ in silent rules
build: Consistently use $@ in silent rules

This results in e.g.

CC foo.o

rather than

CC foo.c

i.e. show the target being produced rather than the prerequisite(s).
This is consistent with how other build systems do it, and with other
rules in the Makefiles.

mato/solo5,mato/solo5,mato/solo5,Solo5/solo5,Solo5/solo5